MAXIM MAX1446 Technical data

General Description
The MAX1446 10-bit, 3V analog-to-digital converter (ADC) features a fully differential input, a pipelined 10­stage ADC architecture with digital error correction and wideband track and hold (T/H) incorporating a fully dif­ferential signal path. This ADC is optimized for low­power, high dynamic performance applications in imaging and digital communications. The MAX1446 operates from a single 2.7V to 3.6V supply, consuming only 90mW while delivering a 59.5dB signal-to-noise ratio (SNR) at a 20MHz input frequency. The fully differ­ential input stage has a 400MHz, -3dB bandwidth and may be operated with single-ended inputs. In addition to low operating power, the MAX1446 features a 5µA power-down mode for idle periods.
An internal 2.048V precision bandgap reference is used to set the ADC full-scale range. A flexible reference structure allows the user to supply a buffered, direct or externally derived reference for applications requiring increased accuracy or a different input voltage range.
Lower and higher speed, pin-compatible versions of the MAX1446 are also available. Refer to the MAX1444 data sheet for a 40Msps version, the MAX1448 data sheet for an 80Msps version, and the MAX1449 data sheet for a 105Msps version.
The MAX1446 has parallel, offset binary, three-state outputs that can be operated from 1.7V to 3.3V to allow flexible interfacing. The device is available in a 5mm x 5mm, 32-pin TQFP package and is specified over the extended industrial (-40°C to +85°C) and automotive (-40°C to +105°C) temperature ranges.
________________________Applications
Ultrasound Imaging
CCD Imaging
Baseband and IF Digitization
Digital Set-Top Boxes
Video Digitizing Applications
Features
o Single 3.0V Operation
o Excellent Dynamic Performance
59.5dB SNR at f
IN
= 20MHz
73dB SFDR at fIN= 20MHz
o Low Power:
30mA (Normal Operation)
5µA (Shutdown Mode)
o Fully Differential Analog Input
o Wide 2V
P-P
Differential Input Voltage Range
o 400MHz -3dB Input Bandwidth
o On-Chip 2.048V Precision Bandgap Reference
o CMOS-Compatible Three-State Outputs
o 32-Pin TQFP Package
o Evaluation Kit Available (MAX1448 EV Kit)
MAX1446
10-Bit, 60Msps, 3.0V, Low-Power
ADC with Internal Reference
________________________________________________________________
Maxim Integrated Products
1
Functional Diagram
19-1729; Rev 4; 11/08
EVALUATION KIT
AVAILABLE
Ordering Information
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Pin-Compatible,
Lower/Higher Speed Versions
+
Denotes a lead(Pb)-free/RoHS-compliant package.
PART TEMP RANGE
MAX1446EHJ+ -40°C to +85°C 32 TQFP
MAX1446GHJ+ -40°C to +105°C 32 TQFP
PIN­PACKAGE
PART SAMPLING SPEED (Msps)
MAX1444 40
MAX1448 80
MAX1449 105
CLK
IN+
MAX1446
CONTROL
10
D
T/H
IN-
PD
REF
PIPELINE ADC
REF SYSTEM +
BIAS
REFINREFOUT REFP COM REFN OE
E C
OUTPUT DRIVERS
V
DD
GND
D9–D0
OV
DD
OGND
MAX1446
10-Bit, 60Msps, 3.0V, Low-Power ADC with Internal Reference
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= 3.0V, OVDD= 2.7V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; V
REFIN
= 2.048V, REFOUT connected
to REFIN through a 10kΩ resistor, V
IN
= 2V
P-P
(differential with respect to COM), CL≈ 10pF at digital outputs, f
CLK
= 62.5MHz
(50% duty cycle), T
A
= T
MIN
to T
MAX
, unless otherwise noted. +25°C guaranteed by production test, < +25°C guaranteed by design
and characterization. Typical values are at T
A
= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VDD, OVDDto GND ...............................................-0.3V to +3.6V
OGND to GND.......................................................-0.3V to +0.3V
IN+, IN- to GND........................................................-0.3V to V
DD
REFIN, REFOUT, REFP,
REFN, and COM to GND.........................-0.3V to (V
DD
+ 0.3V)
OE, PD, CLK to GND..................................-0.3V to (V
DD
+ 0.3V)
D9–D0 to GND.........................................-0.3V to (OV
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
32-Pin TQFP (derate 18.7mW/°C above +70°C)......1495.3mW
Operating Temperature Ranges:
MAX1446EHJ+ .................................................-40°C to +85°C
MAX1446GHJ+...............................................-40°C to +105°C
Storage Temperature Range ............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DC ACCURACY
Resolution 10 Bits
Integral Nonlinearity INL f
Differential Nonlinearity DNL No missing codes, f Offset Error -1.6 < ±0.1 ±1.9 % FS
Gain Error TA +25°C 0 ±2.0 % FS
ANALOG INPUT
Input Differential Range V
Common-Mode Voltage Range V
Input Resistance R
Input Capacitance C
CONVERSION RATE
Maximum Clock Frequency f
Data Latency 5.5 Cycles
DYNAMIC CHARACTERISTICS
Signal-to-Noise + Distortion (Up to 5th Harmonic)
Spurious-Free Dynamic Range
DIFF
COM
CLK
SINAD
SFDR
= 7.492MHz, TA +25°C ±0.6 ±1.9 LSB
IN
= 7.492MHz ±0.4 ±1.0 LSB
IN
Differential or single-ended inputs ±1.0 V
Switched capacitor load 33 kΩ
IN
IN
fIN = 7.492MHz 57 59.5
fIN = 19.943MHz 56.5 59.5Signal-to-Noise Ratio SNR
= 39.9MHz (Note 1) 59
f
IN
fIN = 7.492MHz 56.6 59.4
fIN = 19.943MHz 56.2 59
f
= 39.9MHz (Note 1) 58.5
IN
fIN = 7.492MHz 65 74
fIN = 19.943MHz 63 73
f
= 39.9MHz (Note 1) 71
IN
VDD/2
± 0.5
5pF
60 MHz
V
dB
dB
dBc
MAX1446
10-Bit, 60Msps, 3.0V, Low-Power
ADC with Internal Reference
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.0V, OVDD= 2.7V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; V
REFIN
= 2.048V, REFOUT connected
to REFIN through a 10kΩ resistor, V
IN
= 2V
P-P
(differential with respect to COM), CL≈ 10pF at digital outputs, f
CLK
= 62.5MHz
(50% duty cycle), T
A
= T
MIN
to T
MAX
, unless otherwise noted. +25°C guaranteed by production test, < +25°C guaranteed by design
and characterization. Typical values are at T
A
= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
fIN = 7.492MHz -74
dBc
Two-Tone Intermodulation Distortion
Third-Order Intermodulation Distortion
IMD
IM3
TT
fIN = 19.943MHz -73Third-Harmonic Distortion HD3
= 39.9MHz (Note 1) -71
f
IN
f
= 19MHz at -6.5dBFS,
1
f
= 21MHz at -6.5dBFS (Note 2)
2
f
= 19MHz at -6.5dBFS
1
= 21MHz at -6.5dBFS (Note 2)
f
2
-75 dBc
-75 dBc
fIN = 7.492MHz -70 -64
Total Harmonic Distortion (First 5 Harmonics)
THD
fIN = 19.943MHz -70 -63
f
= 39.9MHz (Note 1) -69
IN
dBc
Small-Signal Bandwidth Input at -20dBFS, differential inputs 500 MHz
Full-Power Bandwidth FPBW Input at -0.5dBFS, differential inputs 400 MHz
Aperture Delay t
Aperture Jitter t
AD
AJ
1ns
2 psrms
Overdrive Recovery Time For 1.5 × full-scale input 2 ns Differential Gain ±1% Differential Phase ±0.25 °
Output Noise IN+ = IN- = COM 0.2 LSBrms
INTERNAL REFERENCE
Reference Output Voltage REFOUT
Reference Temperature Coefficient
TC
REF
2.048
±1%
60 ppm/°C
V
Load Regulation 1.25 mV/mA
BUFFERED EXTERNAL REFERENCE (V
REFIN Input Voltage V
P osi ti ve Refer ence Outp ut V ol tag eV
N eg ati ve Refer ence Outp ut V ol tag e
Common-Mode Level V
Differential Reference Output Voltage Range
REFIN Resistance R
Maximum REFP, COM Source Current
Maximum REFP, COM Sink Current
REFIN
REFP
V
REFN
COM
ΔV
REFIN
I
SOURCE
I
SINK
REFIN
REF
= 2.048V)
ΔV
= V
REF
REFP
- V
2.048
2.012 V
0.988 V
VDD/2 V
, TA ≥ +25°C 0.98 1.024 1.07 V
REFN
> 50 MΩ
5mA
-250 µA
MAX1446
10-Bit, 60Msps, 3.0V, Low-Power ADC with Internal Reference
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.0V, OVDD= 2.7V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; V
REFIN
= 2.048V, REFOUT connected
to REFIN through a 10kΩ resistor, V
IN
= 2V
P-P
(differential with respect to COM), CL≈ 10pF at digital outputs, f
CLK
= 62.5MHz
(50% duty cycle), T
A
= T
MIN
to T
MAX
, unless otherwise noted. +25°C guaranteed by production test, < +25°C guaranteed by design
and characterization. Typical values are at T
A
= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Maximum REFN Source Current I
Maximum REFN Sink Current I
UNBUFFERED EXTERNAL REFERENCE (V
REFP, REFN Input Resistance
REFP, REFN, COM Input Capacitance
Differential Reference Input Voltage Range
COM Input Voltage Range V
REFP Input Voltage V
REFN Input Voltage V
DIGITAL OUTPUTS (CLK, PD, OE)
Input High Threshold V
Input Low Threshold V
Input Hysteresis V
Input Leakage
Input Capacitance C
DIGITAL OUTPUTS (D9–D0)
Output Voltage Low V
Output Voltage High V
Three-State Leakage Current I
SOURCE
SINK
= AGND, reference voltage applied to REFP, REFN, and COM)
REFIN
R
,
Measured between REFP and COM and REFN and COM
IN
ΔV
REF
REF
= V
REFP
- V
REFN
R
ΔV
REFP
REFN
C
COM
REFP
REFN
CLK
IH
PD, OE
CLK
IL
PD, OE
HYST
I
IH
I
IL
OL
OH
LEAK
VIH = V
DD
= OV
DD
VIL = 0 ±5
IN
I
= 200µA 0.2 V
SINK
I
OE = OV
SOURCE
= 200µA
DD
250 µA
-5 mA
4KΩ
15 pF
1.024 ±10%
VDD/2 ±10%
V
+
COM
/2
ΔV
REF
V
-
COM
/2
ΔV
REF
0.8 x V
DD
0.8 x
OV
D D
0.2 x V
0.2 x
OV
0.1 V
±5
5pF
OV
-
DD
0.2
±10 µA
DD
D D
V
V
V
V
V
V
µA
V
Three-State Output Capacitance C
OUT
OE = OV
DD
5pF
MAX1446
Note 1: SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dBFS referenced to a 1.024V full-scale
input voltage range.
Note 2: Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is
6dB better, if referenced to the two-tone envelope.
Note 3: Digital outputs settle to V
IH
, VIL.
Note 4: Wake-up time is defined as the time from complete reference power-down until the ADC performs within 0.3 ENOB of the
final performance for f
IN
= 10MHz at -0.5dBFS input amplitude. V
REFIN
= 2.048V, REFP, REFN, and CML decoupled with
2.3µF.
Note 5: Dynamic characteristics guaranteed at f
IN
= 19.943MHz for the specified duty-cycle range.
Note 6: Guaranteed by design and engineering characterization.
10-Bit, 60Msps, 3.0V, Low-Power
ADC with Internal Reference
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.0V, OVDD= 2.7V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; V
REFIN
= 2.048V, REFOUT connected
to REFIN through a 10kΩ resistor, V
IN
= 2V
P-P
(differential with respect to COM), CL≈ 10pF at digital outputs, f
CLK
= 62.5MHz
(50% duty cycle), T
A
= T
MIN
to T
MAX
, unless otherwise noted. +25°C guaranteed by production test, < +25°C guaranteed by design
and characterization. Typical values are at T
A
= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER REQUIREMENTS
Analog Supply Voltage V
Output Supply Voltage OV
Analog Supply Current I
Output Supply Current I
Power-Supply Rejection PSRR
TIMING CHARACTERISTICS
CLK Rise to Output Data Valid t
OE Fall to Output Enable t OE Rise to Output Disable t
Clock Duty Cycle Figure 6, clock period 16ns (Notes 5, 6) 45 55 %
Wake-Up Time t
DD
VDD
OVDD
DO
ENABLE
DISABLE
WAKE
CL = 10pF 1.7 3.0 3.6 V
DD
Operating, fIN = 19.943MHz at -0.5dBFS 30 37 mA Shutdown, clock idle, PD = OE = OV
Operating, CL = 15pF, fIN = 19.943MHz at
-0.5dBFS Shutdown, clock idle, PD = OE = OV
Offset ± 0.1 mV/V Gain ± 0.1 %/V
Figure 5 (Notes 3, 6) 2 5 8 ns
Figure 5 10 ns
Figure 5 1.5 ns
(Notes 4, 6) 366 520 µs
DD
DD
2.7 3.0 3.6 V
41A
7mA
12A
MAX1446
10-Bit, 60Msps, 3.0V, Low-Power ADC with Internal Reference
6 _______________________________________________________________________________________
Typical Operating Characteristics
(VDD= 3.0V, OVDD= 2.7V, internal reference, differential input at -0.5dBFS, f
CLK
= 62.35MHz, CL≈ 10pF, TA= +25°C, unless
otherwise noted.)
MAX1446 toc01
-100
-70
-80
-90
-50
-60
-10
-20
-30
-40
0
0 5 10 15 20 25 30 35
FFT PLOT
(f
IN
= 7.5MHz, 8192-POINT FFT,
DIFFERENTIAL INPUT)
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
SFDR = 72.2dBc SNR = 60.1dB THD = -71.5dBc SINAD = 59.8dB
HD2
HD3
-100
-70
-80
-90
-50
-60
-10
-20
-30
-40
0
0 5 10 15 20 25 30 35
FFT PLOT
(f
IN
= 13.3MHz, 8192-POINT FFT,
DIFFERENTIAL INPUT)
MAX1446 toc02
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
SINAD = 59.3dB SNR = 59.5dB THD = -72.9dBc SFDR = 74.3dBc
HD2
HD3
-100
-70
-80
-90
-50
-60
-10
-20
-30
-40
0
0 5 10 15 20 25 30 35
FFT PLOT
(f
IN
= 20MHz, 8192-POINT FFT,
DIFFERENTIAL INPUT)
MAX1446 toc03
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
SINAD = 59.3dB SNR = 59.6dB THD = -70.7dBc SFDR = 72.2dBc
HD2
HD3
-100
-70
-80
-90
-50
-60
-10
-20
-30
-40
0
0 5 10 15 20 25 30 35
FFT PLOT
(f
IN
= 26.8MHz, 8192-POINT FFT,
DIFFERENTIAL INPUT)
MAX1446 toc04
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
SINAD = 59.0dB SNR = 59.4dB THD = -70.5dBc SFDR = 72.9dBc
HD2
HD3
-100
-70
-80
-90
-50
-60
-10
-20
-30
-40
0
0 5 10 15 20 25 30 35
FFT PLOT
(f
IN
= 50MHz, 8192-POINT FFT,
DIFFERENTIAL INPUT)
MAX1446 toc05
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
SFDR = 70dBc SNR = 59.1dB THD = -67.1dBc SINAD = 58.5dB
HD2
HD3
-100
-70
-80
-90
-50
-60
-10
-20
-30
-40
0
0 5 10 15 20 25 30 35
FFT PLOT
(f
IN
= 7.5MHz, 8192-POINT FFT,
SINGLE-ENDED INPUT)
MAX1446 toc06
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
SINAD = 59.5dB SNR = 59.7dB THD = -73.0dBc SFDR = 73.6dBc
HD2
HD3
-100
-70
-80
-90
-50
-60
-10
-20
-30
-40
0
0 5 10 15 20 25 30 35
FFT PLOT
(f
IN
= 20MHz, 8192-POINT FFT,
SINGLE-ENDED INPUT)
MAX1446 toc07
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
SINAD = 59.2dB SNR = 59.5dB THD = -70.7dBc SFDR = 71.1dBc
HD2
HD3
-100
-70
-80
-90
-50
-60
-10
-20
-30
-40
0
0 5 10 15 20 25 30 35
TWO-TONE INTERMODULATION
(8192-POINT IMD,
DIFFERENTIAL INPUT)
MAX1446 toc08
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
f1 = 19MHz AT -6.5dBFS f2 = 21MHz AT -6.5dBFS 3RD IMD = -76dBc
SPURIOUS-FREE DYNAMIC RANGE
vs. ANALOG INPUT FREQUENCY
(A
IN
= -0.5dBFS)
ANALOG INPUT FREQUENCY (MHz)
SFDR (dBc)
MAX1446 toc09
0 102030405060708090
50
55
60
65
70
75
80
DIFFERENTIAL
SINGLE-ENDED
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