MAXIM MAX1437B User Manual
General Description
The MAX1437B octal, 12-bit analog-to-digital converter
(ADC) features fully differential inputs, a pipelined
architecture, and digital error correction incorporating a
fully differential signal path. This ADC is optimized for
low-power and high-dynamic performance in medical
imaging instrumentation and digital communications
applications. The MAX1437B operates from a 1.8V single supply and consumes only 768mW (96mW per
channel) while delivering a 70.2dB (typ) signal-to-noise
ratio (SNR) at a 5.3MHz input frequency. In addition to
low operating power, the MAX1437B features a lowpower standby mode for idle periods.
An internal 1.24V precision bandgap reference sets the
full-scale range of the ADC. A flexible reference structure allows the use of an external reference for applications requiring increased accuracy or a different input
voltage range. The reference architecture is optimized
for low noise.
A single-ended clock controls the data-conversion
process. An internal duty-cycle equalizer compensates
for wide variations in clock duty cycle. An on-chip
phase-locked loop (PLL) generates the high-speed serial low-voltage differential signal (LVDS) clock.
The MAX1437B has self-aligned serial LVDS outputs for
data, clock, and frame-alignment signals. The output
data is presented in two’s complement format.
The MAX1437B offers a maximum sample rate of
50Msps. This device is available in a small, 10mm x
10mm x 0.8mm, 68-pin TQFN package with exposed
pad and is specified for the extended industrial (-40°C
to +85°C) temperature range.
Applications
Ultrasound and Medical Imaging
Instrumentation
Multichannel Communications
Features
o Excellent Dynamic Performance
70.2dB SNR at 5.3MHz
98dBc SFDR at 5.3MHz
82dB Channel Isolation at 5.3MHz
o Ultra-Low Power
96mW per Channel (Normal Operation)
o Serial LVDS Outputs
o Pin-Selectable LVDS/SLVS (Scalable Low-Voltage
Signal) Mode
o LVDS Outputs Support Up to 30in FR-4 Backplane
Connections
o Test Mode for Digital Signal Integrity
o Fully Differential Analog Inputs
o Wide Differential Input Voltage Range (1.4V
P-P
)
o On-Chip 1.24V Precision Bandgap Reference
o Clock Duty-Cycle Equalizer
o Compact, 68-Pin TQFN Package with Exposed
Pad
o Evaluation Kit Available (Order MAX1437BEVKIT)
MAX1437B
Octal, 12-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
19-4204; Rev 2; 2/11
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Pin Configuration appears at end of data sheet.
EVALUATION KIT
AVAILABLE
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed pad.
PART TEMP RANGE PIN-PACKAGE
MAX1437BETK+ -40°C to +85°C 68 TQFN-EP*
MAX1437B
Octal, 12-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(Voltages referenced to GND)
AVDD.....................................................................-0.3V to +2.0V
CVDD.....................................................................-0.3V to +3.6V
OVDD ....................................................................-0.3V to +2.0V
IN_P, IN_N ..............................................-0.3V to (V
AVDD
+ 0.3V)
CLK ........................................................-0.3V to (V
CVDD
+ 0.3V)
OUT_P, OUT_N, FRAME_, CLKOUT_ ......-0.3V to (V
OVDD
+ 0.3V)
DT, SLVS/LVDS, LVDSTEST, PLL_,
REFIO, REFADJ, CMOUT...................-0.3V to (V
AVDD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
TQFN (derate 70mW/°C above +70°C) .....................4000mW
Operating Temperature Range ...........................-40°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (θ
JA
) ...........20°C/W
Junction-to-Case Thermal Resistance (θ
JC
) ...............0.5°C/W
ELECTRICAL CHARACTERISTICS
(V
AVDD
= 1.8V, V
OVDD
= 1.8V, V
CVDD
= 3.3V, V
GND
= 0V, external V
REFIO
= 1.24V, C
REFIO
= 0.1µF || 1.0µF, C
REFP
= 10µF, C
REFN
=
10µF, f
CLK
= 50MHz (50% duty cycle), VDT= 0V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.)
(Notes 2, 3)
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial
.
DC ACCURACY (Note 2)
Resolution N 12 Bits
Integral Nonlinearity INL ±0.3 ±2.5 LSB
Differential Nonlinearity DNL No missing codes over temperature ±0.25 ±1 LSB
Offset Error ±0.5 %FS
Gain Error -3 ±0.5 +2 %FS
ANALOG INPUTS (IN_P, IN_N)
Input Differential Range V
Common-Mode Voltage Range V
Common-Mode Voltage Range
Tolerance
Differential Input Impedance R
Differential Input Capacitance C
CONVERSION RATE
Maximum Conversion Rate f
Minimum Conversion Rate f
Data Latency 6.5 Cycles
DYNAMIC CHARACTERISTICS (differential inputs, 4096-point FFT) (Note 5)
Signal-to-Noise Ratio SNR
Signal-to-Noise and Distortion SINAD
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
ID
CMO
IN
IN
SMAX
SMIN
Differential input 1.4 V
(Note 4) ±50 mV
Switched capacitor load 2 kΩ
fIN = 5.3MHz at -0.5dBFS 70.2
f
IN
fIN = 5.3MHz at -0.5dBFS 70.2
f
IN
= 20MHz at -0.5dBFS 67 70.2
= 20MHz at -0.5dBFS 67 70.1
0.76 V
12.5 pF
50 MHz
4.0 MHz
P-P
dB
dB
MAX1437B
Octal, 12-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= 1.8V, V
OVDD
= 1.8V, V
CVDD
= 3.3V, V
GND
= 0V, external V
REFIO
= 1.24V, C
REFIO
= 0.1µF || 1.0µF, C
REFP
= 10µF, C
REFN
=
10µF, f
CLK
= 50MHz (50% duty cycle), VDT= 0V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.)
(Notes 2, 3)
Effective Number of Bits ENOB
Spurious-Free Dynamic Range SFDR
Total Harmonic Distortion THD
Intermodulation Distortion IMD
Third-Order Intermodulation IM3
Aperture Jitter t
Aperture Delay t
Small-Signal Bandwidth SSBW Input at -20dBFS 100 MHz
Full-Power Bandwidth LSBW Input at -0.5dBFS 100 MHz
Output Noise IN_P = IN_N 0.44 LSB
Overrange Recovery Time t
INTERNAL REFERENCE
REFADJ Internal Reference-Mode
Enable Voltage
REFADJ Low-Leakage Current 1.5 mA
REFIO Output Voltage V
Reference Temperature
Coefficient
EXTERNAL REFERENCE
REFADJ External ReferenceMode Enable Voltage
REFADJ High-Leakage Current 200 µA
REFIO Input Voltage 1.24 V
REFIO Input Voltage Tolerance ±5 %
REFIO Input Current I
COMMON-MODE OUTPUT (CMOUT)
CMOUT Output Voltage V
CLOCK INPUT (CLK)
Input High Voltage V
Input Low Voltage V
Clock Duty Cycle 50 %
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
AJ
AD
OR
REFIO
TC
REFIO
REFIO
CMOUT
CLKH
CLKL
fIN = 5.3MHz at -0.5dBFS 11.4
f
= 20MHz at -0.5dBFS 10.8 11.4
IN
fIN = 5.3MHz at –0.5dBFS 98
f
= 20MHz at -0.5dBFS 79 93
IN
fIN = 5.3MHz at -0.5dBFS -96
= 20MHz at -0.5dBFS -93 -78
f
IN
= 5.3MHz at -6.5dBFS
f
1
f
= 6.3MHz at -6.5dBFS
2
= 5.3MHz at -6.5dBFS
f
1
f
= 6.3MHz at -6.5dBFS
2
Figure 10 < 0.4 ps
Figure 10 1 ns
RS = 25Ω, CS = 50pF 1
(Note 6) 0.1 V
(Note 6)
1.18 1.24 1.30 V
V
AVDD
0.1
0.8 x
V
AVDD
90.7 dBc
98.7 dBc
120 ppm/°C
-
< 1 µA
0.76 V
0.2 x
V
AVDD
Bits
dBc
dBc
RMS
RMS
Clock
cycle
V
V
V
MAX1437B
Octal, 12-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= 1.8V, V
OVDD
= 1.8V, V
CVDD
= 3.3V, V
GND
= 0V, external V
REFIO
= 1.24V, C
REFIO
= 0.1µF || 1.0µF, C
REFP
= 10µF, C
REFN
=
10µF, f
CLK
= 50MHz (50% duty cycle), VDT= 0V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.)
(Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Clock Duty-Cycle Tolerance ±30 %
Input Leakage Current DI
Input Capacitance DC
Input at GND 5
IN
Input at V
IN
AVDD
80
5pF
DIGITAL INPUTS (PLL_, LVDSTEST, DT, SLVS, STBY)
Input Logic-High Voltage V
Input Logic-Low Voltage V
Input Leakage Current DI
Input Capacitance DC
IH
IL
Input at GND 5
IN
Input at V
IN
AVDD
0.8 x
V
AVDD
0.2 x
V
AVDD
80
5pF
LVDS OUTPUTS (OUT_P, OUT_N), SLVS/LVDS = LOW
Differential Output Voltage V
Output Common-Mode Voltage V
Rise Time (20% to 80%) t
Fall Time (80% to 20%) t
OHDIFFRTERM
OCMRTERM
RL
FL
= 100Ω 250 450 mV
= 100Ω 1.125 1.375 V
R
R
TERM
TERM
= 100Ω, C
= 100Ω, C
= 5pF 350 ps
LOAD
= 5pF 350 ps
LOAD
SLVS OUTPUTS (OUT_P, OUT_N, CLKOUTP, CLKOUTN, FRAMEP, FRAMEN), SLVS/LVDS = HIGH, DT = HIGH
Differential Output Voltage V
Output Common-Mode Voltage V
Rise Time (20% to 80%) t
Fall Time (80% to 20%) t
OHDIFFRTERM
OCMRTERM
RS
FS
= 100Ω 205 mV
= 100Ω 220 mV
R
R
TERM
TERM
= 100Ω, C
= 100Ω, C
= 5pF 320 ps
LOAD
= 5pF 320 ps
LOAD
STANDBY MODE (STBY)
STBY Fall to Output Enable t
STBY Rise to Output Disable t
ENABLE
DISABLE
200 µs
60 ns
POWER REQUIREMENTS
AVDD Supply Voltage Range V
OVDD Supply Voltage Range V
CVDD Supply Voltage Range V
AVDD
OVDD
CVDD
1.7 1.8 1.9 V
1.7 1.8 1.9 V
1.7 1.8 3.5 V
STBY = low, DT = low 348 390
AVDD Supply Current I
AVDD
fIN = 20MHz
at -0.5dBFS
STBY = low, DT = high 348
S TBY = hi g h, n o cl ock
37 mA
STBY = low 74 100
OVDD Supply Current I
CVDD Supply Current I
Power Dissipation P
OVDD
CVDD
DISSfIN
fIN = 20MHz
at -0.5dBFS
CVDD is used only to bias ESD-protection
diodes on CLK input, Figure 2
STBY = low, DT = high 103
S TBY = hi g h, no cl ock inp ut 16 µA
0mA
= 20MHz at -0.5dBFS 759 882 mW
µA
V
V
µA
mA
mA
MAX1437B
Octal, 12-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= 1.8V, V
OVDD
= 1.8V, V
CVDD
= 3.3V, V
GND
= 0V, external V
REFIO
= 1.24V, C
REFIO
= 0.1µF || 1.0µF, C
REFP
= 10µF, C
REFN
=
10µF, f
CLK
= 50MHz (50% duty cycle), VDT= 0V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.)
(Notes 2, 3)
Note 2: Specifications at TA≥ +25°C are guaranteed by production testing. Specifications at TA< +25°C are guaranteed by design
and characterization and not subject to production testing.
Note 3: All capacitances are between the indicated pin and GND, unless otherwise noted.
Note 4: See the
Common-Mode Output (CMOUT)
section.
Note 5: See definition in the
Parameter Definitions
section at the end of this data sheet.
Note 6: Connect REFADJ to GND directly to enable internal reference mode. Connect REFADJ to AVDD directly to disable the internal
bandgap reference and enable external reference mode.
Note 7: Data valid to CLKOUT rise/fall timing is measured from 50% of data output level to 50% of clock output level.
Note 8: Guaranteed by design and characterization. Not subject to production testing.
Typical Operating Characteristics
(V
AVDD
= 1.8V, V
OVDD
= 1.8V, V
CVDD
= 3.3V, V
GND
= 0V, internal reference, differential input at -0.5dBFS, fIN= 5.3MHz, f
CLK
=
50MHz (50% duty cycle), VDT= 0V, C
LOAD
= 10pF, TA= +25°C, unless otherwise noted.)
FFT PLOT
(16,384-POINT DATA RECORD)
MAX1437B toc01
FREQUENCY (MHz)
AMPLITUDE (dBFS)
0
-10
-20
-30
-40
-50
-70
-60
-80
-100
-90
-110
5101502025
HD2
HD3
f
CLK
= 50.1523789MHz
f
IN
= 5.304814MHz
A
IN
= -0.5dBFS
SNR = 69.959dB
SINAD = 69.950dB
THD = -96.635dBc
SFDR = 96.503dBc
FFT PLOT
(16,384-POINT DATA RECORD)
MAX1437B toc02
FREQUENCY (MHz)
AMPLITUDE (dBFS)
0
-10
-20
-30
-40
-50
-70
-60
-80
-100
-90
-110
f
CLK
= 50.1523789MHz
f
IN
= 24.0997118MHz
A
IN
= -0.5dBFS
SNR = 69.707dB
SINAD = 69.672dB
THD = -90.672dBc
SFDR = 93.694dBc
51015020
25
HD2
HD3
CROSSTALK
(16,384-POINT DATA RECORD)
MAX1437B toc03
FREQUENCY (MHz)
AMPLITUDE (dBFS)
10
-30
-10
-50
-90
-110
-70
5101502025
f
IN(IN2)
MEASURED ON CHANNEL 1,
WITH INTERFERING SIGNAL
ON CHANNEL 2
f
IN(IN1)
= 5.304814MHz
f
IN(IN2)
= 24.0997118MHz
CROSSTALK = -76dB
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
TIMING CHARACTERISTICS (Note 7)
Data Valid to CLKOUT Rise/Fall t
CLKOUT Output-Width High t
CLKOUT Output-Width Low t
FRAME Rise to CLKOUT Rise t
Sample CLK Rise to FRAME Rise t
Figure 5 (Note 8)
OD
Figure 5 t
CH
Figure 5 t
CL
Figure 4 (Note 8)
CF
Figure 4 (Note 8)
SF
(t
SAMPL E
- 0.15
(t
SAMPL E
- 0.15
( t
S AM P LE
+ 1.1
/24)
S AM P LE
S AM P LE
/24)
/2)
(t
/24)
SAMPL E
+ 0.15
ns
/12 ns
/12 ns
(t
/24)
SAMPL E
+ 0.15
( t
S AM P LE
+ 2.6
/2)
ns
ns
Crosstalk (Note 5) -75 dB
Gain Matching C
Phase Matching C
GMfIN
PMfIN
= 5.3MHz (Note 5) ±0.1 dB
= 5.3MHz (Note 5) ±0.25 D eg r ees
MAX1437B
Octal, 12-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(V
AVDD
= 1.8V, V
OVDD
= 1.8V, V
CVDD
= 3.3V, V
GND
= 0V, internal reference, differential input at -0.5dBFS, fIN= 5.3MHz, f
CLK
=
50MHz (50% duty cycle), V
DT
= 0V, C
LOAD
= 10pF, TA= +25°C, unless otherwise noted.)
MAX1437B toc04
FREQUENCY (MHz)
AMPLITUDE (dBFS)
0
-10
-20
-30
-40
-50
-70
-60
-80
-100
-90
-110
TWO-TONE INTERMODULATION DISTORTION
(16,384-POINT DATA RECORD)
f
IN(IN1)
= 5.299375MHz
f
IN(IN2)
= 6.299775MHz
A
IN1
= -6.5dBFS
A
IN2
= -6.5dBFS
IMD = 90.7dBc
IM3 = 98.7dBc
0 5 10 15 20 25
1
-1
-10
1 100 1000
-6
-7
-8
-9
-5
-4
-3
-2
MAX1437B toc05
ANALOG INPUT FREQUENCY (MHz)
GAIN (dB)
10
BANDWIDTH
vs. ANALOG INPUT FREQUENCY
0
FULL-POWER
BANDWIDTH
-0.5dBFS
SMALL-SIGNAL
BANDWIDTH
-20.5dBFS
SIGNAL-TO-NOISE RATIO
vs. ANALOG INPUT FREQUENCY
f
(MHz)
SNR (dB)
1008020 40 60
63
64
65
67
69
66
68
70
71
MAX1437B toc06
72
62
0120
SIGNAL-TO-NOISE PLUS DISTORTION
vs. ANALOG INPUT FREQUENCY
fIN (MHz)
SINAD (dB)
1008020 40 60
63
64
65
67
69
66
68
70
71
MAX1437B toc07
72
62
0120
TOTAL HARMONIC DISTORTION
vs. ANALOG INPUT FREQUENCY
fIN (MHz)
THD (dBc)
1008020 40 60
-95
-90
-85
-75
-70
-80
-65
-60
MAX1437B toc08
-55
-100
0 120
SPURIOUS-FREE DYNAMIC RANGE
vs. ANALOG INPUT FREQUENCY
fIN (MHz)
SFDR (dBc)
1008020 40 60
60
65
70
80
85
75
90
95
MAX1437B toc09
100
55
0120
SIGNAL-TO-NOISE RATIO
vs. ANALOG INPUT POWER
ANALOG INPUT POWER (dBFS)
SNR (dB)
-5-10-25 -20 -15
37
42
52
57
47
62
67
72
32
-30 0
MAX1437B toc10
fIN = 5.304814MHz
SIGNAL-TO-NOISE PLUS DISTORTION
vs. ANALOG INPUT POWER
ANALOG INPUT POWER (dBFS)
SINAD (dB)
-5-10-25 -20 -15
37
42
52
57
47
62
MAX1437B toc11
67
72
32
-30 0
fIN = 5.304814MHz
TOTAL HARMONIC DISTORTION
vs. ANALOG INPUT POWER
ANALOG INPUT POWER (dBFS)
THD (dBc)
-5-10-25 -20 -15
-90
-95
-85
-75
-70
-80
-65
-60
-55
-105
-100
-30 0
MAX1437B toc12
fIN = 5.304814MHz
MAX1437B
Octal, 12-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
_______________________________________________________________________________________ 7
)
C
)
C
)
Typical Operating Characteristics (continued)
(V
AVDD
= 1.8V, V
OVDD
= 1.8V, V
CVDD
= 3.3V, V
GND
= 0V, internal reference, differential input at -0.5dBFS, fIN= 5.3MHz, f
CLK
=
50MHz (50% duty cycle), V
DT
= 0V, C
LOAD
= 10pF, TA= +25°C, unless otherwise noted.)
SPURIOUS-FREE DYNAMIC RANGE
vs. ANALOG INPUT POWER
105
fIN = 5.304814MHz
100
95
90
85
80
SFDR (dBc)
75
70
65
60
55
-30 0
ANALOG INPUT POWER (dBFS
TOTAL HARMONIC DISTORTION
vs. SAMPLING RATE
-75
fIN = 5.304814MHz
-80
-85
-90
THD (dBc)
-95
-100
-105
f
(MHz)
CLK
SIGNAL-TO-NOISE PLUS DISTORTION
vs. DUTY CYCLE
73
fIN = 5.304814MHz
72
71
70
69
SINAD (dB)
68
67
66
65
30 70
DUTY CYCLE (%)
353015 20 2510 5040 45
60 655540 4535 50
-5-10-25 -20 -15
MAX1437B toc13
MAX1437B toc16
MAX1437B toc19
SIGNAL-TO-NOISE RATIO
vs. SAMPLING RATE
72
fIN = 5.304814MHz
71
70
69
68
67
SNR (dB)
66
65
64
63
62
10 5040 45
353015 20 25
f
(MHz
LK
SPURIOUS-FREE DYNAMIC RANGE
vs. SAMPLING RATE
105
fIN = 5.304814MHz
100
95
90
SFDR (dBc)
85
80
75
f
CLK
353015 20 2510 5040 45
(MHz)
TOTAL HARMONIC DISTORTION
vs. DUTY CYCLE
-75
fIN = 5.304814MHz
-80
-85
-90
THD (dBc)
-95
-100
-105
30 70
DUTY CYCLE (%)
SIGNAL-TO-NOISE PLUS DISTORTION
72
71
MAX1437B toc14
70
69
68
67
66
SINAD (dB)
65
64
63
62
10 5040 45
73
72
MAX1437B toc17
71
70
69
SNR (dB)
68
67
66
65
30 70
100
95
MAX1437B toc20
90
85
SFDR (dBc)
80
75
70
60 655540 4535 50
30 70
vs. SAMPLING RATE
fIN = 5.304814MHz
353015 20 25
f
(MHz
LK
SIGNAL-TO-NOISE RATIO
vs. DUTY CYCLE
fIN = 5.304814MHz
60 655540 4535 50
DUTY CYCLE (%)
SPURIOUS-FREE DYNAMIC RANGE
vs. DUTY CYCLE
fIN = 5.304814MHz
60 655540 4535 50
DUTY CYCLE (%)
MAX1437B toc15
MAX1437B toc18
MAX1437B toc21
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