The MAX13485E/MAX13486E +5V, half-duplex, ±15kV
ESD-protected RS-485 transceivers feature one driver
and one receiver. These devices include fail-safe circuitry,
guaranteeing a logic-high receiver output when receiver
inputs are open or shorted. The receiver outputs a logichigh if all transmitters on a terminated bus are disabled
(high impedance). The MAX13485E/MAX13486E include
a hot-swap capability to eliminate false transitions on the
bus during power-up or live-insertion.
The MAX13485E features reduced slew-rate drivers
that minimize EMI and reduce reflections caused by
improperly terminated cables, allowing error-free transmission up to 500kbps. The MAX13486E driver slew
rate is not limited, allowing transmit speeds up to
16Mbps.
The MAX13485E/MAX13486E feature a 1/4-unit load
receiver input impedance, allowing up to 128 transceivers
on the bus. These devices are intended for half-duplex
communications. All driver outputs are protected to ±15kV
ESD using the Human Body Model. The MAX13485E/
MAX13486E are available in 8-pin SO and space-saving
8-pin µDFN packages. The devices operate over the
extended -40°C to +85°C temperature range.
Applications
Utility Meters
Industrial Controls
Industrial Motor Drives
Automated HVAC Systems
Features
♦ +5V Operation
♦ True Fail-Safe Receiver While Maintaining
EIA/TIA-485 Compatibility
♦ Hot-Swappable for Telecom Applications
♦ Enhanced Slew-Rate Limiting Facilitates Error-
Free Data Transmission (MAX13485E)
♦ High-Speed Version (MAX13486E) Allows for
Transmission Speeds Up to 16Mbps
♦ Extended ESD Protection for RS-485/RS-422 I/O
Pins ±15kV Using Human Body Model
♦ 1/4 Unit Load, Allowing Up to 128 Transceivers on
the Bus
♦ Available in Space-Saving 8-Pin μDFN or Industry
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
, unless otherwise noted. Typical values are at VCC= +5V and TA= +25°C.) (Note 1)
)
)
Note 1: µDFN devices production tested at +25°C. Overtemperature limits are generated by design.
Note 2: All currents into the device are positive. All currents out of the device are negative. All voltages referred to device ground,
unless otherwise noted.
Note 3: ΔV
OD
and ΔVOCare the changes in VODand VOCwhen the DI input changes states.
Note 4: The short-circuit output current applied to peak current just prior to foldback current limiting. The short-circuit foldback
output current applies during current limiting to allow a recovery from bus contention.
X = Don’t care, shutdown mode, driver, and receiver outputs
are in high impedance.
PINNAMEFUNCTION
1ROReceiver Output
Receiver Output Enable. Drive RE low to enable RO. RO is high impedance when RE is high. Drive
2RE
3DE
RE high and DE low to enter low-power shutdown mode. RE is a hot-swap input (see the Hot-Swap
Capability section for more details).
Driver Output Enable. Drive DE high to enable the driver outputs. These outputs are high-impedance
when DE is low. Drive RE high and DE low to enter low-power shutdown mode. DE is a hot-swap input
(see the Hot-Swap Capability section for more details).
4DI
5GNDGround
6ANoninverting Receiver Input and Noninverting Driver Output
7BInverting Receiver Input and Inverting Driver Output
8VCCPositive Supply, VCC = +5V ±5%. Bypass VCC to GND with a 0.1µF capacitor.
Driver Input. Drive DI low to force noninverting output low and inverting output high. Drive DI high to
force noninverting output high and inverting output low (see the Function Tables).
The MAX13485E/MAX13486E half-duplex, high-speed
transceivers for RS-485/RS-422 communication contain
one driver and one receiver. These devices feature failsafe circuitry that guarantees a logic-high receiver output when receiver inputs are open or shorted, or when
they are connected to a terminated transmission line
with all drivers disabled (see the
Fail-Safe
section). The
MAX13485E/MAX13486E also feature a hot-swap capability allowing line insertion without erroneous data
transfer (see the
Hot-Swap Capability
section). The
MAX13485E features reduced slew-rate drivers that
minimize EMI and reduce reflections caused by
improperly terminated cables, allowing error-free transmission up to 500kbps. The MAX13486E driver slew
rate is not limited, making transmit speeds up to
16Mbps possible.
Fail-Safe
The MAX13485E/MAX13486E guarantee a logic-high
receiver output when the receiver inputs are shorted or
open, or when they are connected to a terminated
transmission line with all drivers disabled. This is done by
setting the receiver input threshold between -50mV and
-200mV. If the differential receiver input voltage (A - B) is
greater than or equal to -50mV, RO is logic-high. If (A - B)
is less than or equal to -200mV, RO is logic-low. In the
case of a terminated bus with all transmitters disabled,
the receiver’s differential input voltage is pulled to 0V by
the termination. With the receiver thresholds of the
MAX13485E/MAX13486E, this results is a logic-high with
a 50mV minimum noise margin. Unlike previous fail-safe
devices, the -50mV to -200mV threshold complies with
the ±200mV EIA/TIA-485 standard.
Hot-Swap Capability
Hot-Swap Inputs
When circuit boards are inserted into a hot or powered
backplane, differential disturbances to the data bus
can lead to data errors. Upon initial circuit-board insertion, the data communication processor undergoes its
own power-up sequence. During this period, the
processor’s logic-output drivers are high impedance
and are unable to drive the DE and RE inputs of these
devices to a defined logic level. Leakage currents up to
±10µA from the high impedance state of the processor’s logic drivers could cause standard CMOS enable
inputs of a transceiver to drift to an incorrect logic level.
Additionally, parasitic circuit-board capacitance could
cause coupling of VCCor GND to the enable inputs.
Without the hot-swap capability, these factors could
improperly enable the transceiver’s driver or receiver.
When V
CC
rises, an internal pulldown circuit holds DE
low and RE high. After the initial power-up sequence,
the pulldown circuit becomes transparent, resetting the
hot-swap tolerable input.
Hot-Swap Input Circuitry
The enable inputs feature hot-swap capability. At the
input there are two nMOS devices, M1 and M2 (Figure
9). When VCCramps from zero, an internal 7µs timer
turns on M2 and sets the SR latch, which also turns on
M1. Transistors M2, a 1.5mA current sink, and M1, a
500µA current sink, pull DE to GND through a 5kΩ
resistor. M2 is designed to pull DE to the disabled state
against an external parasitic capacitance up to 100pF
that can drive DE high. After 7µs, the timer deactivates
M2 while M1 remains on, holding DE low against tristate leakages that can drive DE high. M1 remains on
until an external source overcomes the required input
current. At this time, the SR latch resets and M1 turns
off. When M1 turns off, DE reverts to a standard highimpedance CMOS input. Whenever V
CC
drops below
1V, the hot-swap input is reset.
For RE there is a complementary circuit employing two
Figure 9. Simplified Structure of the Driver Enable Pin (DE)
V
CC
10μs
TIMER
SR LATCH
TIMER
DE
5kΩ
100μA
500μA
M2M1
DE
(HOT SWAP)
+15V ESD Protection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against electrostatic discharges encountered during handling and
assembly. The driver outputs and receiver inputs of the
MAX13485E/MAX13486E have extra protection against
static electricity. Maxim’s engineers have developed
state-of-the-art structures to protect these pins against
ESD of ±15kV without damage. The ESD structures
withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, the
MAX13485E/MAX13486E keep working without latchup
or damage.
ESD protection can be tested in various ways. The transmitter outputs and receiver inputs of the MAX13485E/
MAX13486E are characterized for protection to the following limits:
• ±15kV using the Human Body Model
• ±15kV using the Air Gap Discharge Method specified
in IEC 61000-4-2 (MAX13485E only)
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Human Body Model
Figure 10a shows the Human Body Model, and Figure
10b shows the current waveform it generates when discharged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device
through a 1.5kΩ resistor.
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment. However, it does
not specifically refer to integrated circuits. The
MAX13485E/MAX13486E help equipment designs to
meet IEC 61000-4-2, without the need for additional
ESD-protection components.
The major difference between tests done using the
Human Body Model and IEC 61000-4-2 is higher peak
current in IEC 61000-4-2 because series resistance is
lower in the IEC 61000-4-2 model. Hence, the ESD
Figure 10d. IEC 61000-4-2 ESD Generator Current Waveform
HIGH-
VOLTAGE
DC
SOURCE
R
C
1MΩ
CHARGE-CURRENT
LIMIT RESISTOR
C
100pF
s
R
D
1500Ω
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
AMPS
IP 100%
90%
36.8%
10%
0
0
t
RL
I
r
TIME
t
DL
CURRENT WAVEFORM
DEVICE
UNDER
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
TEST
HIGH-
VOLTAGE
DC
SOURCE
R
C
50MΩ TO 100MΩ
CHARGE-CURRENT
LIMIT RESISTOR
C
150pF
s
R
D
330Ω
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
I
100%
90%
PEAK
I
10%
tr = 0.7ns TO 1ns
30ns
60ns
DEVICE
UNDER
TEST
t
MAX13485E/MAX13486E
withstand voltage measured to IEC 61000-4-2 is generally lower than that measured using the Human Body
Model. Figure 10c shows the IEC 61000-4-2 model,
and Figure 10d shows the current waveform for the IEC
61000-4-2 ESD Contact Discharge test.
Machine Model
The machine model for ESD tests all pins using a 200pF
storage capacitor and zero discharge resistance.
The objective is to emulate the stress caused when I/O
pins are contacted by handling equipment during test
and assembly. Of course, all pins require this protection, not just RS-485 inputs and outputs.
The air-gap test involves approaching the device with a
charged probe. The contact-discharge method connects
the probe to the device before the probe is energized.
Applications Information
128 Transceivers on the Bus
The standard RS-485 receiver input impedance is 12kΩ
(1-unit load), and the standard driver can drive up to
32-unit loads. The MAX13485E/MAX13486E have a 1/4unit load receiver input impedance (48kΩ), allowing up
to 128 transceivers to be connected in parallel on one
communication line. Any combination of these devices,
as well as other RS-485 transceivers with a total of 32unit loads or fewer, can be connected to the line.
Reduced EMI and Reflections
The MAX13485E features reduced slew-rate drivers
that minimize EMI and reduce reflections caused by
improperly terminated cables, allowing error-free data
transmission up to 500kbps.
Low-Power Shutdown Mode
Low-power shutdown mode is initiated by bringing both
RE high and DE low. In shutdown, the devices draw a
maximum of 10µA of supply current.
RE and DE can be driven simultaneously. The devices
are guaranteed not to enter shutdown if RE is high and
DE is low for less than 50ns. If the inputs are in this
state for at least 700ns, the devices are guaranteed to
enter shutdown.
Enable times tZHand tZL(see the
Switching Character-
istics
) assume the devices were not in a low-power shut-
down state. Enable times t
ZH(SHDN)
and t
ZL(SHDN)
assume the devices were in shutdown state. It takes drivers and receivers longer to become enabled from lowpower shutdown mode (t
ZH(SHDN)
, t
ZL(SHDN)
) than from
driver-/receiver-disable mode (tZH, tZL).
Line Length
The RS-485/RS-422 standard covers line lengths up to
4000ft.
Typical Applications
The MAX13485E/MAX13486E transceivers are
designed for half-duplex, bidirectional data communications on multipoint bus transmission lines. Figure 11
shows typical network applications circuits. To minimize reflections, terminate the line at both ends in its
characteristic impedance, and keep stub lengths off
the main line as short as possible. The slew-rate-limited
MAX13485E is more tolerant of imperfect termination.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
N
1
TOP VIEW
D
e
FRONT VIEW
INCHES
DIM
MIN
0.053A
0.004
A1
0.014
B
0.007
C
e0.050 BSC1.27 BSC
0.150
HE
A
B
A1
C
L
E
H0.2440.2285.806.20
0.016L
VARIATIONS:
INCHES
MINDIM
D
0.1890.197AA5.004.808
0.3370.344AB8.758.5514
D
0∞-8∞
SIDE VIEW
MAX
0.069
0.010
0.019
0.010
0.157
0.050
MAX
0.3940.386D
MILLIMETERS
MAX
MIN
1.35
1.75
0.10
0.25
0.35
0.49
0.19
0.25
3.804.00
0.401.27
MILLIMETERS
MAX
MIN
9.8010.00
N MS012
16
AC
SOICN .EPS
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, .150" SOIC
REV.DOCUMENT CONTROL NO.APPROVAL
21-0041
1
B
1
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
MAX13485E/MAX13486E
Half-Duplex RS-485/RS-422 Transceivers in µDFN
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600