The MAX13442E/MAX13444E are fault-protected RS-485
and J1708 transceivers that feature ±80V protection from
signal faults on communication bus lines. The
MAX13442E/MAX13444E feature a reduced slew-rate driver that minimizes EMI and reflections, allowing error-free
transmission up to 250kbps. The MAX13443E driver can
transmit up to 10Mbps. The high-speed MAX13443E
RS-485 tranceiver features ±60V protection from signal
faults on communication bus lines. These transceivers feature foldback current limit. Each device contains one differential line driver with three-state output and one
differential line receiver with three-state input. The 1/4-unitload receiver input impedance allows up to 128 transceivers on a single bus. The devices operate from a 5V
supply. True fail-safe inputs guarantee a logic-high receiver output when the receiver inputs are open, shorted, or
connected to an idle data line.
Hot-swap circuitry eliminates false transitions on the
data bus during circuit initialization or connection to a
live backplane. Short-circuit current-limiting and thermal-shutdown circuitry protect the driver against excessive power dissipation, and on-chip ± 15kV ESD
protection eliminates costly external protection devices.
The MAX13442E/MAX13443E/MAX13444E are available in an 8-pin SO package and are specified over the
automotive temperature range.
Applications
Features
♦ ±15kV ESD Protection
♦ ±80V Fault Protection (±60V MAX13443E)
♦ Guaranteed 10Mbps Data Rate (MAX13443E)
♦ Hot-Swappable for Telecom Applications
♦ True Fail-Safe Receiver Inputs
♦ Enhanced Slew-Rate-Limiting Facilitates
Error-Free Data Transmission
(MAX13442E/MAX13444E)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
PACKAGE THERMAL CHARACTERISTICS (Note 2)
SO
Junction-to-Ambient Thermal Resistance (θ
JA
) .........132°C/W
Junction-to-Case Thermal Resistance (θ
JC
) ................38°C/W
DC ELECTRICAL CHARACTERISTICS
(VCC= +4.75V to +5.25V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at VCC= +5V and TA= +25°C.)
Note 1: During normal operation, a termination resistor must be connected between A and B in order to guarantee overvoltage pro-
tection up to the absolute maximum rating of this device. When not in operation, these devices can withstand fault voltages
up to the maximum rating without a termination resistor and will not be damaged.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial
.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DRIVER
Differential Driver Output V
Change in Magnitude of
Differential Output Voltage
Driver Common-Mode
Output Voltage
Change in Magnitude of
Common-Mode Voltage
DRIVER LOGIC
Driver-Input High Voltage V
Driver-Input Low Voltage V
Driver-Input Current I
Driver Short-Circuit Output Current
(Note 4)
Driver Short-Circuit Foldback
Output Current
Driver-Limit Short-Circuit Foldback
Output Current
2 2 REReceiver Output Enable. Pull RE low to enable RO.
3 — DE
4 — DI
5 5 GND Ground
6 6 A Noninverting Receiver Input/Driver Output
7 7 B Inverting Receiver Input/Driver Output
8 8 V
— 3 DE
MAX13444E
NAMEFUNCTION
Receiver Output. If the receiver is enabled and (V
- VB) -200mV, RO = low.
A
to GND with a 0.1μF ceramic capacitor. For full ESD
CC
to GND with 1μF ceramic capacitor.
CC
CC
RO = high; if (V
Driver Output Enable. Force DE high to enable driver. Pull DE low
to three-state the driver output. Drive RE high and pull DE low to
enter low-power shutdown mode.
Driver Input. A logic-low on DI forces the noninverting output low
and the in verting output high. A logic-high on
DI forces the nonin verting output h igh and the in verting output
low.
Positive Supply, VCC = +4.75V to +5.25V. For normal operation,
bypass V
protection, bypass V
Driver Output Enable. Pull DE low to enable the outputs. Force DE
high to three- state the outputs. Drive RE and DE high to enter lowpower shutdown mode.
- VB) -50mV,
A
J1708 Input. A logic-low on TXD forces outputs A and B to the
— 4 TXD
dominant state. A logic-high on TXD forces outputs A and B to
the recessi ve state.
The MAX13442E/MAX13443E/MAX13444E fault-protected transceivers for RS-485/RS-422 and J1708 communication contain one driver and one receiver. These
devices feature fail-safe circuitry, which guarantees a
logic-high receiver output when the receiver inputs are
open or shorted, or when they are connected to a terminated transmission line with all drivers disabled (see the
True Fail-Safe
section). All devices have a hot-swap input
structure that prevents disturbances on the differential
signal lines when a circuit board is plugged into a hot
backplane (see the
Hot-Swap Capability
section). The
MAX13442E/MAX13444E feature a reduced slew-rate driver that minimizes EMI and reduces reflections caused
by improperly terminated cables, allowing error-free data
transmission up to 250kbps (see the
Reduced EMI and
Reflections
section). The MAX13443E driver is not slew-
rate limited, allowing transmit speeds up to 10Mbps.
Driver
The driver accepts a single-ended, logic-level input
(DI) and transfers it to a differential, RS-485/RS-422
level output (A and B). Deasserting the driver enable
places the driver outputs (A and B) into a high-impedance state.
Receiver
The receiver accepts a differential, RS-485/RS-422
level input (A and B), and transfers it to a single-ended,
logic-level output (RO). Deasserting the receiver enable
places the receiver inputs (A and B) into a high-impedance state (see Tables 1–4).
Low-Power Shutdown
The MAX13442E/MAX13443E/MAX13444E offer a lowpower shutdown mode. Force DE low and RE high to
shut down the MAX13442E/MAX13443E. Force DE andRE high to shut down the MAX13444E. A time delay of
50ns prevents the device from accidentally entering
shutdown due to logic skews when switching between
transmit and receive modes. Holding DE low and RE
high for at least 800ns guarantees that the
MAX13442E/MAX13443E enter shutdown. In shutdown,
the devices consume a maximum 20µA supply current.
±
80V Fault Protection
The driver outputs/receiver inputs of RS-485 devices in
industrial network applications often experience voltage
faults resulting from shorts to the power grid that exceed
the -7V to +12V range specified in the EIA/TIA-485 standard. In these applications, ordinary RS-485 devices
(typical absolute maximum -8V to +12.5V) require costly
external protection devices. To reduce system complexity and eliminate this need for external protection, the dri-
ver outputs/receiver inputs of the MAX13442E/
MAX13444E withstand voltage faults up to ±80V (±60V
for the MAX13443E) with respect to ground without damage. Protection is guaranteed regardless whether the
device is active, shut down, or without power.
True Fail-Safe
The MAX13442E/MAX13443E/MAX13444E use a
-50mV to -200mV differential input threshold to ensure
true fail-safe receiver inputs. This threshold guarantees
the receiver outputs a logic-high for shorted, open, or
idle data lines. The -50mV to -200mV threshold complies with the ±200mV threshold EIA/TIA-485 standard.
±15kV ESD Protection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against ESD
encountered during handling and assembly. The
MAX13442E/MAX13443E/MAX13444E receiver inputs/
driver outputs (A, B) have extra protection against static electricity found in normal operation. Maxim’s engineers have developed state-of-the-art structures to
protect these pins against ±15kV ESD without damage.
After an ESD event, the MAX13442E/MAX13443E/
MAX13444E continue working without latchup.
ESD protection can be tested in several ways. The
receiver inputs are characterized for protection to
±15kV using the Human Body Model.
ESD Test Conditions
ESD performance depends on a number of conditions.
Contact Maxim for a reliability report that documents
test setup, methodology, and results.
Human Body Model
Figure 9a shows the Human Body Model, and Figure
9b shows the current waveform it generates when discharged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a
1.5kΩ resistor.
Driver Output Protection
Two mechanisms prevent excessive output current and
power dissipation caused by faults or bus contention.
The first, a foldback current limit on the driver output
stage, provides immediate protection against short circuits over the whole common-mode voltage range. The
second, a thermal shutdown circuit, forces the driver outputs into a high-impedance state if the die temperature
exceeds +160°C. Normal operation resumes when the
die temperature cools to +140°C, resulting in a pulsed
output during continuous short-circuit conditions.
Figure 10. Simplified Structure of the Driver Enable Pin (DE)
Hot-Swap Capability
Hot-Swap Inputs
Inserting circuit boards into a hot, or powered, backplane may cause voltage transients on DE, RE, and
receiver inputs A and B that can lead to data errors. For
example, upon initial circuit board insertion, the processor undergoes a power-up sequence. During this period,
the high-impedance state of the output drivers makes
them unable to drive the MAX13442E/MAX13443E/
MAX13444E enable inputs to a defined logic level.
Meanwhile, leakage currents of up to 10µA from the
high-impedance output, or capacitively coupled noise
from VCCor GND, could cause an input to drift to an
incorrect logic state. To prevent such a condition from
occurring, the MAX13442E/MAX13443E/MAX13444E
feature hot-swap input circuitry on DE, and RE to guard
against unwanted driver activation during hot-swap situations. The MAX13444E has hot-swap input circuitry
only on RE. When V
CC
rises, an internal pulldown (or
pullup for RE) circuit holds DE low for at least 10µs, and
until the current into DE exceeds 200µA. After the initial
power-up sequence, the pulldown circuit becomes
transparent, resetting the hot-swap tolerable input.
Hot-Swap Input Circuitry
At the driver-enable input (DE), there are two NMOS
devices, M1 and M2 (Figure 10). When VCCramps from
zero, an internal 15µs timer turns on M2 and sets the
SR latch, which also turns on M1. Transistors M2, a
2mA current sink, and M1, a 100µA current sink, pull
DE to GND through a 5.6kΩ resistor. M2 pulls DE to the
disabled state against an external parasitic capacitance up to 100pF that may drive DE high. After 15µs,
the timer deactivates M2 while M1 remains on, holding
DE low against three-state leakage currents that may
drive DE high. M1 remains on until an external current
source overcomes the required input current. At this
time, the SR latch resets M1 and turns off. When M1
turns off, DE reverts to a standard, high-impedance
CMOS input. Whenever VCCdrops below 1V, the input
is reset.
A complementary circuit for RE uses two PMOS
devices to pull RE to VCC.
The MAX13442E/MAX13443E/MAX13444E transceivers
1/4-unit-load receiver input impedance (48kΩ) allows
up to 128 transceivers connected in parallel on one
communication line. Connect any combination of these
devices, and/or other RS-485 devices, for a maximum
of 32-unit loads to the line.
Reduced EMI and Reflections
The MAX13442E/MAX13444E are slew-rate limited,
minimizing EMI and reducing reflections caused by
improperly terminated cables. Figure 11 shows the driver output waveform and its Fourier analysis of a
125kHz signal transmitted by a MAX13443E. High-frequency harmonic components with large amplitudes
are evident.
Figure 12 shows the same signal displayed for the
MAX13442E transmitting under the same conditions.
Figure 12’s high-frequency harmonic components are
much lower in amplitude, compared with Figure 11’s,
and the potential for EMI is significantly reduced.
In general, a transmitter’s rise time relates directly to
the length of an unterminated stub, which can be driven
with only minor waveform reflections. The following
equation expresses this relationship conservatively:
length = t
RISE
/ (10 x 1.5ns/ft)
where t
RISE
is the transmitter’s rise time.
For example, the MAX13442E’s rise time is typically
800ns, which results in excellent waveforms with a stub
length up to 53ft. A system can work well with longer
unterminated stubs, even with severe reflections, if the
waveform settles out before the UART samples them.
RS-485 Applications
The MAX13442E/MAX13443E/MAX13444E transceivers
provide bidirectional data communications on multipoint bus transmission lines. Figure 13 shows a typical
network application circuit. The RS-485 standard covers line lengths up to 4000ft. To minimize reflections
and reduce data errors, terminate the signal line at both
ends in its characteristic impedance, and keep stub
lengths off the main line as short as possible.
Figure 11. Driver Output Waveform and FFT Plot of the
MAX13443E Transmitting a 125kHz Signal
Figure 12. Driver Output Waveform and FFT Plot of the
MAX13442E Transmitting a 125kHz Signal
The MAX13444E is designed for J1708 applications. To
configure the MAX13444E, connect DE and RE to GND.
Connect the signal to be transmitted to TXD. Terminate
the bus with the load circuit as shown in Figure 14. The
drivers used by SAE J1708 are used in a dominantmode application. DE is active low; a high input on DE
places the outputs in high impedance. When the driver is
disabled (TXD high or DE high), the bus is pulled high by
external bias resistors R1 and R2. Therefore, a logic-level
high is encoded as recessive. When all transceivers are
idle in this configuration, all receivers output logic-high
because of the pullup resistor on A and pulldown resistor
on B. R1 and R2 provide the bias for the recessive state.
C1 and C2 combine to form a lowpass filter, effective for
reducing FM interference. R2, C1, R4, and C2 combine
to form a 1.6MHz lowpass filter, effective for reducing
AM interference. Because the bus is unterminated, at
high frequencies, R3 and R4 perform a pseudotermination. This makes the implementation more flexible, as no
specific termination nodes are required at the ends of
the bus.
Figure 14. J1708 Application Circuit (See Tables 2 and 4)
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages
. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
1
2
3
4
8
5
V
CC
GND
TXD
DE
RE
RO
R
D
R
T
R
T
7
6
D
R
DE
RE
TXD
RO
A
B
1
2
3
4
8
7
6
5
V
CC
B
A
GND
TXD
DE
RE
RO
SOSO
R
D
B
A
MAX13444E
+
+
Pin Configurations and Typical Operating Circuits (continued)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
Corrected the part numbers in the conditions for VCharacteristics table; corrected the A, B current unit s from mA to μA for the A, B
Current vs. A, B Voltage (to Ground) graphs in the Typical Operating Characteristics
section
Added lead(Pb)-free parts to the Ordering Information table; added the so ldering
temperature to the Absolute Maximum Ratings section; updated Table 2 output s
Added an automotive qualified part to the Ordering Information; added the Package Thermal Characteristics section
in the DC Electrical
OC
PAGES
CHANGED
1, 2, 12
2, 7
1, 2
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