The MAX13430E–MAX13433E are full- and half-duplex
RS-485 transceivers that feature an adjustable low-voltage logic interface for operation in multivoltage systems.
This allows direct interfacing to low-voltage ASIC/FPGAs
without extra components. The MAX13430E–MAX13433E
RS-485 transceivers operate with a VCCvoltage supply
from +3V to +5V. The low-voltage logic interface operates
with a voltage supply from +1.62V to VCC.
The MAX13430E/MAX13432E feature reduced slewrate drivers that minimize EMI and reduce reflections
caused by improperly terminated cables, allowing
error-free data transmission up to 500kbps. The
MAX13431E/MAX13433E driver slew rates are not limited, enabling data transmission up to 16Mbps. The
MAX13430E/MAX13431E are intended for half-duplex
communications, and the MAX13432E/MAX13433E are
intended for full-duplex communications.
The MAX13430E/MAX13431E are available in 10-pin
µMAX®and 10-pin TDFN packages. The MAX13432E/
MAX13433E are available in 14-pin TDFN and 14-pin
SO packages.
Features
♦ Wide +3V to +5V Input Supply Range
♦ Low-Voltage Logic Interface +1.62V (min)
♦ Ultra-Low Supply Current in Shutdown Mode
10µA ICC(max), 1µA IL(max)
♦ Thermal Shutdown Protection
♦ Hot-Swap Input Structures on DE and RE
♦ 1/8-Unit Load Allows Up to 256 Transceivers on
the Bus
♦ Enhanced Slew-Rate Limiting
(MAX13430E/MAX13432E)
♦ Extended ESD Protection for RS-485 I/O Pins
±30kV Human Body Model
±15kV Air-Gap Discharge per IEC 61000-4-2
±10kV Contact Discharge per IEC 61000-4-2
(VCC= +3V to +5.5V, VL= +1.8V to VCC, TA= -40°C to +85°C, unless otherwise noted. Typical values are VCC= +5V, VL= +1.8V at
T
A
= +25°C.) (Notes 2, 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial
.
(All voltages referenced to GND.)
Supply Voltage (V
CC
) ...............................................-0.3V to +6V
Logic Supply Voltage (V
L )
......................................-0.3V to +6V
Control Input Voltage (RE) .............................-0.3V to (V
L
+0.3V)
Control Input Voltage (DE) ......................................-0.3V to +6V
Driver Input Voltage (DI) ..........................................-0.3V to +6V
Driver Output Voltage (Y, Z, A, B) ............................-8V to +13V
Receiver Input Voltage (A, B)
(MAX13430E/MAX13431E)....................................-8V to +13V
Receiver Input Voltage (A, B)
(MAX13432E/MAX13433E)..................................-25V to +25V
Receiver Output Voltage (RO) .....................-0.3V to (V
L
+ 0.3V)
Driver Output Current ....................................................±250mA
Short-Circuit Duration (RO, A, B) to GND .................Continuous
VL Input Logic-Supply Voltage. Bypass VL with a 0.1µF ceramic capacitor located as
close as possible to the input.
22RO
Receiver Output. When RE is low and if (A - B) ≥ -50mV, RO is high; if (A - B) ≤ -200mV,
RO is low.
33DE
Driver Output Enable. Drive DE high to enable driver outputs. These outputs are high
impedance when DE is low. Drive RE high and DE low to enter low-power shutdown
mode. DE is a hot-swap input (see the Hot-Swap Capability section for details.)
44RE
Active-Low Receiver Output Enable. Drive RE low to enable RO; RO is high impedance
when RE is high. Drive RE high and DE low to enter low-power shutdown mode. RE is a
hot-swap input (see the Hot-Swap Capability section for details.)
55DI
D r i ver Inp ut. W i th D E hi g h, a l ow on D I for ces noni nver ti ng outp ut l ow and i nver ti ng outp ut
hi g h. S i m i l ar l y, a hi g h on D I for ces noni nver ti ng outp ut hi g h and i nver ti ng outp ut l ow .
66GNDGround
77N.C.No Connection. Not internally connected. N.C. can be connected to GND.
88ANoninverting Receiver Input and Noninverting Driver Output
99BInverting Receiver Input and Inverting Driver Output
1010V
CC
VCC Input Supply Voltage. Bypass VCC with a 1µF ceramic capacitor located as close
as possible to the input for full ESD protection. If full ESD protection is not required,
bypass V
7, 137, 13N.C.No Connection. Not internally connected. N.C. can be connected to GND.
88GNDGround
99YNoninverting Driver Output
1010ZInverting Driver Output
1111BInverting Receiver Input
1212ANoninverting Receiver Input
1414V
——EPExposed Pad (TDFN Only). Connect EP to GND.
NAMEFUNCTION
VL Input Logic Supply Voltage. Bypass VL with a 0.1µF ceramic capacitor located as
L
close as possible to the input.
Receiver Output. When RE is low and if (A - B) ≥ -50mV, RO is high; if (A - B) ≤ -200mV,
RO is low.
Driver Output Enable. Drive DE high to enable driver outputs. These outputs are high
impedance when DE is low. Drive RE high and DE low to enter low-power shutdown
mode. DE is a hot-swap input (see the Hot-Swap Capability section for details.)
Active-Low Receiver Output Enable. Drive RE low to enable RO; RO is high impedance
when RE is high. Drive RE high and DE low to enter low-power shutdown mode. RE is a
hot-swap input (see the Hot-Swap Capability section for details.)
D r i ver Inp ut. W i th D E hi g h, a l ow on D I for ces noni nver ti ng outp ut l ow and i nver ti ng outp ut
hi g h. S i m i l ar l y, a hi g h on D I for ces noni nver ti ng outp ut hi g h and i nver ti ng outp ut l ow .
VCC Input Supply Voltage. Bypass VCC with a 1µF ceramic capacitor located as close
CC
as possible to the input for full ESD protection. If full ESD protection is not required,
bypass V
with a 0.1µF ceramic capacitor.
CC
MAX13430E–MAX13433E
RS-485 Transceivers with Low-Voltage
Logic Interface
The MAX13430E–MAX13433E are full- and half-duplex
RS-485 transceivers that feature an adjustable lowvoltage logic interface for application in multivoltage
systems. This allows direct interfacing to lowvoltage ASIC/FPGAs without extra components. The
MAX13430E–MAX13433E RS-485 transceivers operate
with a VCCvoltage supply from +3V to +5V. The lowvoltage logic interface operates with a voltage supply
from +1.62V to VCC.
The MAX13430E–MAX13433E are ±30kV ESD-protected RS-485 transceivers with one driver and one receiver. All devices have a 1/8-unit load receiver input
impedance, allowing up to 256 transceivers on the bus.
These devices include fail-safe circuitry, guaranteeing
a logic-high receiver output when receiver inputs are
open or shorted. The receivers output a logic-high if all
transmitters on a terminated bus are disabled (high
impedance). All devices feature hot-swap capability to
eliminate false transitions on the bus during power-up
or hot insertion.
The MAX13430E/MAX13432E feature reduced slewrate drivers that minimize EMI and reduce reflections
caused by improperly terminated cables, allowing
error-free data transmission up to 500kbps. The
MAX13431E/MAX13433E driver slew rates are not limited, enabling data transmission up to 16Mbps.
The MAX13430E–MAX13433E transceivers draw 2mA
of supply current when unloaded or when fully loaded
with the drivers disabled. The MAX13430E/
MAX13431E are intended for half-duplex communications, and the MAX13432E/MAX13433E are intended
for full-duplex communications.
Low-Voltage Logic Interface
VLis the voltage supply for the low-voltage logic interface and receiver output. VLoperates with voltage supply from +1.62V to VCC.
Fail Safe
The MAX13430E family guarantees a logic-high receiver output when the receiver inputs are shorted or open,
or when they are connected to a terminated transmission line with all drivers disabled. This is done by setting the receiver input threshold between -50mV and
-200mV. If the differential receiver input voltage (A - B)
is greater than or equal to -50mV, RO is logic-high.
If (A - B) is less than or equal to -200mV, RO is logiclow. In the case of a terminated bus with all transmitters
disabled, the receiver’s differential input voltage is
pulled to 0V by the termination. With the receiver
thresholds of the MAX13430E family, this results in a
logic-high with a 50mV minimum noise margin. The
-50mV to -200mV threshold complies with the ±200mV
EIA/TIA/RS-485 standard.
Hot-Swap Capability
When circuit boards are inserted into a hot or powered
backplane, differential disturbances to the data bus can
lead to data errors. Upon initial circuit-board insertion,
the data communication processor undergoes its own
power-up sequence. During this period, the processor’s
logic-output drivers are high impedance and are unable
to drive the DE and RE inputs of these devices to a
defined logic level. Leakage currents up to ±10µA from
the high-impedance state of the processor’s logic drivers
could cause standard CMOS enable inputs of a transceiver to drift to an incorrect logic level. Additionally, parasitic circuit-board capacitance could cause coupling of
VLor GND to the enable inputs. Without the hot-swap
capability, these factors could improperly enable the
transceiver’s driver or receiver. When VLrises, an internal pulldown circuit holds DE low and RE high. After the
initial power-up sequence, the pulldown circuit becomes
transparent, resetting the hot-swap tolerable input.
±30kV ESD Protection
ESD-protection structures are incorporated on all pins
to protect against electrostatic discharges encountered during handling and assembly. The driver outputs and receiver inputs of the MAX13430E family of
devices have extra protection against static electricity.
Maxim’s engineers have developed state-of-theart structures to protect these pins against ESD of
±30kV without damage. The ESD structures withstand
high ESD in all states: normal operation, shutdown,
and powered down. After an ESD event, the
MAX13430E–MAX13433E keep working without latchup
or damage. ESD protection can be tested in various
ways. The transmitter outputs and receiver inputs of the
MAX13430E–MAX13433E are characterized for protection to the following limits:
• ±30kV using the Human Body Model
• ±10kV using the Contact Discharge method specified
in IEC 61000-4-2
• ±15kV using the Air Gap Discharge method specified
in IEC 61000-4-2
MAX13430E–MAX13433E
RS-485 Transceivers with Low-Voltage
Logic Interface
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Human Body Model
Figure 10a shows the Human Body Model, and Figure
10b shows the current waveform it generates when discharged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the test device through a
1.5kΩ resistor.
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment. However, it does
not specifically refer to integrated circuits. The
MAX13430E family of devices helps you design equipment to meet IEC 61000-4-2, without the need for additional ESD-protection components.
The major difference between tests done using the
Human Body Model and IEC 61000-4-2 is higher peak
current in IEC 61000-4-2 because series resistance is
lower in the IEC 61000-4-2 model. Hence, the ESD withstand voltage measured to IEC 61000-4-2 is generally
lower than that measured using the Human Body
Model. Figure 10c shows the IEC 61000-4-2 model, and
Figure 10d shows the current waveform for IEC 610004-2 ESD Contact Discharge test.
Figure 10a. Human Body ESD Test Model
Figure 10b. Human Body Current Waveform
Figure 10c. IEC 61000-4-2 ESD Test Model
Figure 10d. IEC 61000-4-2 ESD Generator Current Waveform
The standard RS-485 receiver input impedance is a
one-unit load (12kΩ), and the standard driver can drive
up to 32 unit loads. The MAX13430E family of transceivers has a 1/8-unit load receiver input impedance
(96kΩ), allowing up to 256 transceivers to be connected in parallel on one communication line. Any combination of these devices, as well as other RS-485
transceivers with a total of 32-unit loads or less, can be
connected to the line.
Reduced EMI and Reflections
The MAX13430E/MAX13432E feature reduced slewrate drivers that minimize EMI and reduce reflections
caused by improperly terminated cables, allowing
error-free data transmission up to 500kbps.
Driver Output Protection
Two mechanisms prevent excessive output current and
power dissipation caused by faults or by bus contention. The first, a foldback current limit on the output
stage, provides immediate protection against short circuits over the whole common-mode voltage range (see
the
Typical Operating Characteristics
.) The second, a
thermal-shutdown circuit, forces the driver outputs into
a high-impedance state if the die temperature exceeds
+150°C (typ).
Typical Applications
The MAX13430E/MAX13433E transceivers are
designed for bidirectional data communications on multipoint bus transmission lines. Figures 11 and 12 show
typical network applications circuits. To minimize reflections, terminate the line at both ends with its characteristic impedance, and keep stub lengths off the main
line as short as possible. The slew-rate-limited
MAX13430E/MAX13432E allow the RS-485 network to
be more tolerant of imperfect termination.
MAX13430E–MAX13433E
RS-485 Transceivers with Low-Voltage
Logic Interface
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages
. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
MAX13430E–MAX13433E
RS-485 Transceivers with Low-Voltage
Logic Interface
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20
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