MAXIM MAX1334, MAX1335 Technical data

General Description
The MAX1334/MAX1335 2-channel, serial-output, 10-bit, analog-to-digital converters (ADCs) feature two true-differential analog inputs and offer outstanding noise immunity and dynamic performance. Both devices easily interface with SPI™/QSPI™/MICROWIRE™ and standard digital signal processors (DSPs).
0.2µA, respectively. Also featured is a separate power­supply input (DVDD) that allows direct interfacing to +2.7V to +3.6V digital logic. The fast conversion speed, low power dissipation, excellent AC performance, and DC accuracy (±0.4 LSB INL) make the MAX1334/ MAX1335 ideal for industrial process control, motor control, and base-station applications.
The MAX1334/MAX1335 are available in a space-sav­ing (3mm x 3mm), 16-pin, TQFN package and operate over the extended (-40°C to +85°C) temperature range.
Applications
Data Acquisition Bill Validation Motor Control Base Stations High-Speed Modems Optical Sensors Industrial Process Control
Features
4.5Msps Sampling Rate (+5V, MAX1334)
4Msps Sampling Rate (+3V, MAX1335)
Separate Logic Supply: +2.7V to +3.6V
Two True-Differential Analog Input Channels
Bipolar/Unipolar Selection Input
Only 40mW (typ) Power Consumption
Only 2µA (max) Shutdown Current
High-Speed, SPI-Compatible, 3-Wire Serial
Interface
2.6MHz Full-Linear Bandwidth
61dB SINAD at 525kHz Input Frequency
No Pipeline Delays
Space-Saving (3mm x 3mm), 16-Pin TQFN
Package
MAX1334/MAX1335
4.5Msps/4Msps, 5V/3V, 2-Channel, True-Differential, 10-Bit ADCs
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
AIN1P
DOUT
SCLK
CNVST
AIN1N
REF
DIFFERENTIAL
INPUT VOLTAGE
+4.75V TO +5.25V
+2.7V TO +3.6V
µC/DSP
CHSEL
+
-
AV
DD
DV
DD
AGND AGND DGND
BIP/UNI
SHDN
0.01µF0.01µF1µF
1µF
0.01µF
1µF
AIN0P
AIN0N
REF INPUT
VOLTAGE
+
-
MAX1334
Typical Operating Circuit
19-3767; Rev 1; 10/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
*EP = Exposed paddle. **Future product—contact factory for availability.
Selector Guide appears at end of data sheet. Pin Configuration appears at end of data sheet.
查询MAX1329供应商
PART TEMP RANGE PIN-PACKAGE
MAX1334ETE** -40°C to +85°C
MAX1335ETE -40°C to +85°C
16 TQFN-EP* (3mm x 3mm)
16 TQFN-EP* (3mm x 3mm)
T1633F-3
T1633F-3
PKG
CODE
MAX1334/MAX1335
4.5Msps/4Msps, 5V/3V, 2-Channel, True-Differential, 10-Bit ADCs
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
AVDDto AGND (MAX1334) ......................................-0.3V to +6V
AV
DD
to AGND (MAX1335) ......................................-0.3V to +4V
DV
DD
to DGND.........................................................-0.3V to +4V
AGND to DGND.....................................................-0.3V to +0.3V
SCLK, CNVST, SHDN, CHSEL, BIP/UNI,
DOUT to DGND ...................................-0.3V to (DV
DD
+ 0.3V)
AIN0P, AIN0N, AIN1P, AIN1N, REF to
AGND...................................................-0.3V to (AV
DD
+ 0.3V)
Maximum Current into Any Pin .........................................±50mA
Continuous Power Dissipation (T
A
= +70°C)
16-Pin TQFN (derate 17.5mW/°C above +70°C) ....1398.6mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS (MAX1334)
(AVDD= +4.75V to +5.25V, DVDD= +2.7V to +3.6V, f
SCLK
= 76MHz, V
REF
= 4.096V, TA= T
MIN
to T
MAX
, unless otherwise noted.
Typical values are at T
A
= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DC ACCURACY (Note 1) (BIP/UNI = DGND)
Resolution N 10 Bits
Integral Nonlinearity INL ±0.4 ±1.0 LSB
Differential Nonlinearity DNL ±0.4 ±1.0 LSB
Offset Error ±1.0 ±1.5 LSB
Gain Error ±1.5 ±4.0 LSB
Offset-Error Temperature Coefficient
Gain-Error Temperature Coefficient
DYNAMIC SPECIFICATIONS (AIN = -0.2dBFS, fIN = 525kHz, BIP/UNI = DVDD, unless otherwise noted) (Note 1)
Signal-to-Noise Ratio SNR 66 61 dB
Signal-to-Noise Plus Distortion SINAD 59.5 61 dB
Total Harmonic Distortion THD -77 -68 dBc
Spurious-Free Dynamic Range SFDR 68 78 dBc
Intermodulation Distortion IMD
Channel-to-Channel Isolation 76 dB
Full-Linear Bandwidth SINAD > 56dB 2.6 MHz
Full-Power Bandwidth 5.4 MHz
Small-Signal Bandwidth 5MHz
CONVERSION RATE
Minimum Conversion Time t
Maximum Throughput Rate 4.5 Msps
Minimum Track-and-Hold Acquisition Time
CONV
t
ACQ
f
IN1
f
IN2
Figure 5 171 ns
Figure 5 32 ns
= 103.5kHz, A = 113.5kHz, A
= TBDdBFS
IN1
= TBDdBFS
IN2
±1.1 ppm/°C
±4.5 ppm/°C
-72 dB
MAX1334/MAX1335
4.5Msps/4Msps, 5V/3V, 2-Channel, True-Differential, 10-Bit ADCs
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (MAX1334) (continued)
(AVDD= +4.75V to +5.25V, DVDD= +2.7V to +3.6V, f
SCLK
= 76MHz, V
REF
= 4.096V, TA= T
MIN
to T
MAX
, unless otherwise noted.
Typical values are at T
A
= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Aperture Delay t
Aperture Jitter t
AD
AJ
Figure 21 < 10 ns
Figure 21 < 10 ps
DIFFERENTIAL ANALOG INPUTS (AIN0P, AIN0N, AIN1P, AIN1N)
Differential Input Voltage Range (V
AIN_P
- V
AIN_N
)
V
BIP/UNI = DGND 0 V
IN
BIP/UNI = DV
Absolute Input Voltage Range
DC Leakage Current I
Input Capacitance C
LKG
IN
REFERENCE INPUT (REF)
REF Input Voltage Range V
REF Input Capacitance C
REF DC Leakage Current I
REF
REF
REF
DIGITAL INPUTS (SCLK, CNVST, SHDN, CHSEL, BIP/UNI)
Input-Voltage Low V
Input-Voltage High V
IL
IH
Input Hysteresis 100 mV
Input Leakage Current I
Input Capacitance C
ILKG
IN
DIGITAL OUTPUT (DOUT)
Output-Voltage Low V
Output-Voltage High V
Tri-State Leakage Current I
Tri-State Output Capacitance C
OL
OH
LKGT
OUT
I
SINK
I
SOURCE
Between conversions, CNVST = DV
Between conversions, CNVST = DV
POWER REQUIREMENTS
Analog Supply Voltage AV
Digital Supply Voltage DV
DD
DD
Normal mode; average unloaded current (f
Analog Supply Current I
AVDD
SAMPLE
Partial power-down mode 3.3 4
Full power-down mode 0.1 2 µA
DD
-V
REF
AGND
- 50mV
/ 2 +V
REF
/ 2
REF
AV
DD
+
50mV
±10 µA
14 pF
AV
DD
1.0
+
50mV
14 pF
±10 µA
0.3 x
DV
DD
0.7 x
DV
DD
±0.2 ±5 µA
15 pF
= 5mA 0.4 V
DV
-
= 1mA
DD
DD
DD
0.5
±1 µA
15 pF
4.75 5.25 V
2.7 3.6 V
= 4.0MHz, f
SCLK
= 64MHz)
11 12
V
V
V
V
V
V
mA
MAX1334/MAX1335
4.5Msps/4Msps, 5V/3V, 2-Channel, True-Differential, 10-Bit ADCs
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (MAX1334) (continued)
(AVDD= +4.75V to +5.25V, DVDD= +2.7V to +3.6V, f
SCLK
= 76MHz, V
REF
= 4.096V, TA= T
MIN
to T
MAX
, unless otherwise noted.
Typical values are at T
A
= +25°C.)
TIMING CHARACTERISTICS (MAX1334) (Figure 4)
(AVDD= +4.75V to +5.25V, DVDD= +2.7V to +3.6V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.)
Note 1: Tested with AVDD= 4.75V and DVDD= +2.7V. Note 2: Guaranteed by design, not production tested.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Power-Supply Rejection PSR AVDD = 4.75V to 5.25V, full-scale input ±0.5 ±0.3 mV
DVDD
Average unloaded current (f
4.5MHz, f
Power-down (f
Static or power-down, all digital inputs are connected to DV
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SCLK Clock Period t
SCLK Pulse Width t
CNVST Rise to DOUT Disable t
CNVST Fall to DOUT Enable t
CHSEL to CNVST Fall Setup t BIP/UNI to CNVST Fall Setup t
CNVST Fall to CHSEL Hold t CNVST Fall to BIP/UNI Hold t
DOUT Remains Valid After SCLK t
SCLK Rise to DOUT Transition t
CNVST to SCLK Rise t
SCLK Rise to CNVST t
CNVST Pulse Width t
Minimum Recovery Time (Full Power-Down)
Minimum Recovery Time (Partial Power-Down)
CP
SPW
CRDD
CFDE
CHCF
BUCF
CFCH
CFBU
DHOLD
DOT
SETUP
HOLD
CSW
t
FPD
t
PPD
C
LOAD
C
LOAD
From CNVST fall or SHDN rise 4 µs
From CNVST fall 500 ns
= 76MHz, zero-scale input)
SCLK
= 76MHz) 18 45Digital Supply Current I
SCLK
DD
= 0pF (Note 2) 1 2 ns
= 30pF 6 ns
=
SAMPLE
or DGND
13.1 ns
6ns
15 ns
15 ns
32 ns
32 ns
0ns
0ns
6ns
0ns
6ns
58mA
0.2 2
µA
MAX1334/MAX1335
4.5Msps/4Msps, 5V/3V, 2-Channel, True-Differential, 10-Bit ADCs
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (MAX1335)
(AVDD= +2.7V to +3.6V, DVDD= +2.7V to +3.6V, f
SCLK
= 64MHz, V
REF
= 2.5V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical
values are at T
A
= +25°C.)
DC ACCURACY (Note 3) (BIP/UNI = DGND)
Resolution N 10 Bits
Relative Accuracy INL ±0.4 ±1.0 LSB
Differential Nonlinearity DNL ±0.4 ±1.0 LSB
Offset Error ±1.0 ±1.5 LSB
Gain Error ±1.5 ±4.0 LSB
Offset-Error Temperature Coefficient
Gain-Error Temperature Coefficient
DYNAMIC SPECIFICATIONS (AIN = -0.2dBFS, fIN = 525kHz, BIP/UNI = DVDD, unless otherwise noted) (Note 3)
Signal-to-Noise Ratio SNR 60 61 dB
Signal-to-Noise Plus Distortion SINAD 59.5 61 dB
Total Harmonic Distortion THD -77 -68 dBc
Spurious-Free Dynamic Range SFDR 68 78 dBc
Channel-to-Channel Isolation 76 dB
Full-Linear Bandwidth SINAD > 56dB 2.6 MHz
Full-Power Bandwidth 5.4 MHz
Small-Signal Bandwidth 5MHz
CONVERSION RATE
Minimum Conversion Time t
Maximum Throughput Rate 4 Msps
Minimum Track-and-Hold Acquisition Time
Aperture Delay t
Aperture Jitter t
DIFFERENTIAL ANALOG INPUTS (AIN0P, AIN0N, AIN1P, AIN1N)
Differential Input Voltage Range (V
AIN_P
Absolute Input Voltage Range
DC Leakage Current I
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CONV
t
ACQ
AD
AJ
V
- V
AIN_N
)
IN
LKG
Figure 5 203 ns
Figure 5 39 ns
Figure 21 < 10 ns
Figure 21 < 10 ps
BIP/UNI = DGND 0 V BIP/ UNI = DV
DD
±1.1 ppm/°C
±4.5 ppm/°C
-V
/ 2 +V
REF
AGND
- 50mV
REF
/ 2
REF
AV
DD
+
50mV
±1 µA
V
V
MAX1334/MAX1335
4.5Msps/4Msps, 5V/3V, 2-Channel, True-Differential, 10-Bit ADCs
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (MAX1335) (continued)
(AVDD= +2.7V to +3.6V, DVDD= +2.7V to +3.6V, f
SCLK
= 64MHz, V
REF
= 2.5V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical
values are at T
A
= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Capacitance C
IN
REFERENCE INPUT (REF)
REF Input Voltage V
REF Input Capacitance C
REF DC Leakage Current I
REF
REF
REF
DIGITAL INPUTS (SCLK, CNVST, SHDN, CHSEL, BIP/UNI)
Input-Voltage Low V
Input-Voltage High V
IL
IH
Input Hysteresis 100 mV
Input Leakage Current I
Input Capacitance C
DIGITAL OUTPUT (DOUT)
Output-Voltage Low V
Output-Voltage High V
Tri-State Leakage Current I
Tri-State Output Capacitance C
POWER REQUIREMENTS
Analog Supply Voltage AV
Digital Supply Voltage DV
Analog Supply Current I
Positive Supply Rejection PSR AVDD = 2.7V to 3.6V, full-scale input ±6 mV
ILKG
IN
OL
OH
LKGT
OUT
DD
DD
AVDD
DVDD
14 pF
AV
1.0 50mV
14 pF
0.3 x
DV
0.7 x
DV
DD
±0.2 ±5 µA
15 pF
I
= 5mA 0.4 V
SINK
DV
-
I
SOURCE
= 1mA
Between conversions, CNVST = DV
Between conversions, CNVST = DV
DD
DD
DD
0.5
15 pF
2.7 3.6 V
2.7 AV
Normal mode; average unloaded current (f
SAMPLE
= 4MHz, f
SCLK
= 64MHz)
9.6 12
Partial power-down mode 3.3 4
Full power-down mode 0.1 2 µA
Average unloaded current (f 4MHz, f
Power-down (f
= 64MHz, zero-scale input)
SCLK
= 40MHz) 18 45Digital Supply Current I
SCLK
Static or power-down; all digital inputs are connected to DV
or DGND
DD
SAMPLE
=
5.0 8.0 mA
0.2 2
DD
+
±10 µA
DD
±1 µA
DD
mA
µA
V
V
V
V
V
MAX1334/MAX1335
4.5Msps/4Msps, 5V/3V, 2-Channel, True-Differential, 10-Bit ADCs
_______________________________________________________________________________________ 7
TIMING CHARACTERISTICS (MAX1335) (Figure 4)
(AVDD= +2.7V to +3.6V, DVDD= +2.7V to +3.6V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.)
Note 3: Tested with AVDD= DVDD= +2.7V. Note 4: Guaranteed by design, not production tested.
Figure 1. Load Circuits for Enable/Disable Times
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SCLK Clock Period t
SCLK Pulse Width t
CNVST Rise to DOUT Disable t
CNVST Fall to DOUT Enable t
CHSEL to CNVST Fall Setup t BIP/UNI to CNVST Fall Setup t
CNVST Fall to CHSEL Hold t CNVST Fall to BIP/UNI Hold t
DOUT Remains Valid After SCLK t
SCLK Rise to DOUT Transition t
CNVST to SCLK Rise t
SCLK Rise to CNVST t
CNVST Pulse Width t
Minimum Recovery Time (Full Power-Down)
Minimum Recovery Time (Partial Power-Down)
CP
CPW
CRDD
CFDE
CHCF
BUCF
CFCH
CFBU
DHOLD
DOT
SETUP
HOLD
CSW
t
FPD
t
PPD
C
LOAD
C
LOAD
From CNVST fall or SHDN rise 4 µs
From CNVST fall 500 ns
= 0pF (Note 4) 1 2 ns
= 30pF 6 ns
15.6 ns
6ns
15 ns
15 ns
36 ns
36 ns
0ns
0ns
6ns
0ns
6ns
DOUT DOUT
6k
a) HIGH IMPEDANCE TO VOH, V AND V
TO HIGH IMPEDANCE
OH
30pF 30pF
DGND
TO VOH,
OL
DV
DD
6k
DGND
b) HIGH IMPEDANCE TO V AND V
TO HIGH IMPEDANCE
OL
OL, VOH
TO VOL,
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