Maxim MAX1294BEEI, MAX1294BCEI, MAX1294AEEI, MAX1294ACEI, MAX1296BEEG Datasheet

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General Description
The MAX1294/MAX1296 low-power, 12-bit analog-to­digital converters (ADCs) feature a successive-approxi­mation ADC, automatic power-down, fast wake-up (2µs), on-chip clock, +2.5V internal reference, and high-speed 12-bit parallel interface. They operate with a single +5V analog supply.
Power consumption is only 10mW at the maximum sam­pling rate of 420ksps. Two software-selectable power­down modes enable the MAX1294/MAX1296 to be shut down between conversions; accessing the parallel interface returns them to normal operation. Powering down between conversions can reduce supply below 10µA at lower sampling rates.
Both devices offer software-configurable analog inputs for unipolar/bipolar and single-ended/pseudo-differential operation. In single-ended mode, the MAX1294 has six input channels and the MAX1296 has two (three input channels and one input channel, respectively, when in pseudo-differential mode).
Excellent dynamic performance and low power combined with ease of use and small package size make these con­verters ideal for battery-powered and data-acquisition applications or for other circuits with demanding power­consumption and space requirements. The MAX1294 is offered in a 28-pin QSOP package, while the MAX1296 is available in a 24-pin QSOP. For pin-compatible +3V, 12-bit versions, see the MAX1295/MAX1297.
Applications
Industrial Control Systems Data Logging Energy Management Patient Monitoring Data-Acquisition Systems Touchscreens
Features
12-Bit Resolution, ±0.5LSB LinearitySingle +5V OperationInternal +2.5V ReferenceSoftware-Configurable Analog Input Multiplexer
6-Channel Single-Ended/ 3-Channel Pseudo-Differential (MAX1294)
2-Channel Single-Ended/ 1-Channel Pseudo-Differential (MAX1296)
Software-Configurable Unipolar/Bipolar
Analog Inputs
Low Current
2.0mA (420ksps)
1.0mA (100ksps) 400µA (10ksps) 2µA (shutdown)
Internal 6MHz Full-Power Bandwidth Track/HoldParallel 12-Bit InterfaceSmall Footprint
28-Pin QSOP (MAX1294) 24-Pin QSOP (MAX1296)
MAX1294/MAX1296
420ksps, +5V, 6-/2-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface
________________________________________________________________
Maxim Integrated Products
1
19-1533; Rev 0; 9/99
PART
MAX1294ACEI
MAX1294BCEI 0°C to +70°C
0°C to +70°C
TEMP. RANGE PIN-PACKAGE
28 QSOP 28 QSOP
Ordering Information
Pin Configurations
INL
(LSB)
±0.5 ±1
Typical Operating Circuits appear at end of data sheet.
Pin Configurations continued at end of data sheet.
MAX1294AEEI -40°C to +85°C 28 QSOP ±0.5 MAX1294BEEI -40°C to +85°C 28 QSOP ±1
EVALUATION KIT
AVAILABLE
MAX1296ACEG
MAX1296BCEG MAX1296AEEG -40°C to +85°C
0°C to +70°C
0°C to +70°C 24 QSOP
24 QSOP 24 QSOP ±0.5
MAX1296BEEG -40°C to +85°C 24 QSOP ±1
±0.5 ±1
TOP VIEW
1
D9
2
D8
3
D7
4
D6
5
D5
D4
D3
D2
D1
D0
INT
MAX1296
6
7
8
9
10
11
12
QSOP
24
23
22
21
20
19
18
17
16
15
14
13
D10
D11
V
DD
REF
REFADJ
GND
COM
CH0
CH1
CS
CLK
WRRD
MAX1294/MAX1296
420ksps, +5V, 6-/2-Channel, 12-Bit ADCs with +2.5V Reference and Parallel Interface
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= +5V ±10%, COM = GND, REFADJ = VDD, V
REF
= +2.5V, 4.7µF capacitor at REF pin, f
CLK
= 7.6MHz (50% duty cycle),
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +6V
CH0–CH5, COM to GND............................-0.3V to (VDD+ 0.3V)
REF, REFADJ to GND.................................-0.3V to (VDD+ 0.3V)
Digital Inputs to GND ...............................................-0.3V to +6V
Digital Outputs (D0–D11, INT) to GND.......-0.3V to (V
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
24-Pin QSOP (derate 9.5mW/°C above +70°C)..........762mW
28-Pin QSOP (derate 8.00mW/°C above +70°C)........667mW
Operating Temperature Ranges
MAX1294_C_ _/MAX1296_C_ _.........................0°C to +70°C
MAX1294_E_ _/MAX1296_E_ _ ......................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
External acquisition or external clock mode
Internal acquisition/internal clock mode
MAX129_A
External acquisition/internal clock mode
External clock mode
-3dB rolloff
SINAD > 68dB
fIN= 175kHz (Note 4)
f
IN1
= 49kHz, f
IN2
= 52kHz
MAX129_B No missing codes over temperature
CONDITIONS
ns25Aperture Delay
ns400t
ACQ
T/H Acquisition Time
3.2 3.6 4
2.5 3.0 3.5
µs
2.1
t
CONV
Conversion Time (Note 5)
MHz
6
Full-Power Bandwidth
kHz
350
Full-Linear Bandwidth
dB
-78
Channel-to-Channel Crosstalk
dB
76
IMDIntermodulation Distortion
dB
-80
SFDRSpurious-Free Dynamic Range
Total Harmonic Distortion (including 5th-order harmonic)
dB
-80
THD
±0.5
INLRelative Accuracy (Note 2)
Bits
12
RESResolution
dB
67 70
SINADSignal-to-Noise Plus Distortion
LSB
±0.2
Channel-to-Channel Offset Matching
ppm/°C
±2.0
Gain Temperature Coefficient
LSB
±1
LSB
±1
DNLDifferential Nonlinearity
LSB
±4
Offset Error
LSB
±4
Gain Error (Note 3)
UNITSMIN TYP MAXSYMBOLPARAMETER
Internal acquisition/internal clock mode
External acquisition or external clock mode
<200
ps
<50
Aperture Jitter
MHz0.1 7.6f
CLK
External Clock Frequency
%30 70Duty Cycle
DC ACCURACY (Note 1)
DYNAMIC SPECIFICATIONS (f
IN(sine wave)
= 50kHz, VIN= 2.5Vp-p, 420ksps, external f
CLK
= 7.6MHz, bipolar input mode)
CONVERSION RATE
I
DD
MAX1294/MAX1296
420ksps, +5V, 6-/2-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +5V ±10%, COM = GND, REFADJ = VDD, V
REF
= +2.5V, 4.7µF capacitor at REF pin, f
CLK
= 7.6MHz (50% duty cycle),
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.)
CONDITIONS UNITSMIN TYP MAXSYMBOLPARAMETER
Shutdown mode
V
REF
= 2.5V, f
SAMPLE
= 420ksps
0 to 0.5mA output load
To power down the internal reference
For small adjustments
On/off-leakage current, VIN= 0 or V
DD
Unipolar, V
COM
= 0
Bipolar, V
COM
= V
REF
/2
2
µA
200 300
I
REF
V
1.0
V
DD
+
50mV
V
REF
REF Input Voltage Range
µF
4.7 10
Capacitive Bypass at REF
µF
0.01 1
Capacitive Bypass at REFADJ
mV/mA
0.2 0.5
Load Regulation (Note 7)
V
VDD- 1
REFADJ High Threshold
mV
±100
REFADJ Input Range
ppm/°C
±20
TC
REF
REF Temperature Coefficient
mA
15
REF Short-Circuit Current
V
2.49 2.5 2.51
REF Output Voltage
pF
12
C
IN
Input Capacitance
µA
±0.01 ±1
Multiplexer Leakage Current
V
0 V
REF
V
IN
Analog Input Voltage Range Single-Ended and Differential (Note 6)
-V
REF
/2 +V
REF
/2
CS = V
DD
I
SOURCE
= 1mA
I
SINK
= 1.6mA
VIN= 0 or V
DD
µA
±0.1 ±1
I
LEAKAGE
Three-State Leakage Current
V
VDD- 0.5
V
OH
Output Voltage High
V
0.4
V
OL
Output Voltage Low
pF
15
C
IN
Input Capacitance
µA
±0.1 ±1
I
IN
Input Leakage Current
mV
200
V
HYS
Input Hysteresis
V
0.8
V
IL
Input Voltage Low
V
4.0
V
IH
Input Voltage High
CS = V
DD
V
4.5 5.5
V
DD
Analog Supply Voltage
pF
15
C
OUT
Three-State Output Capacitance
2.6 2.9
REF Input Current
µA
External reference
2.2 2.5
External reference
0.5 0.8
mA
Internal reference
1.0 1.2
Power-Supply Rejection PSR VDD= 5V ±10%, full-scale input
±0.3 ±0.7
mV
Positive Supply Current I
DD
Shutdown mode
210
µA
ANALOG INPUTS
INTERNAL REFERENCE
EXTERNAL REFERENCE AT REF
DIGITAL INPUTS AND OUTPUTS
POWER REQUIREMENTS
Internal reference
Operating mode, f
SAMPLE
= 420ksps
Standby mode
MAX1294/MAX1296
420ksps, +5V, 6-/2-Channel, 12-Bit ADCs with +2.5V Reference and Parallel Interface
4 _______________________________________________________________________________________
t
TR
10 40
nsC
LOAD
= 20pF, Figure 1
RD Rise to Output Disable
WR to CLK Fall Setup Time
t
CWS
60
ns
nsCLK Pulse Width High
nsCLK Period
t
CH
40
RD Fall to Output Data Valid
t
DO
10 50
ns
RD Fall to INT High Delay
t
INT1
50
ns
CS Fall to Output Data Valid
t
DO2
100
ns
C
LOAD
= 20pF, Figure 1
C
LOAD
= 20pF, Figure 1
C
LOAD
= 20pF, Figure 1
t
CP
132
CLK Pulse Width Low t
CL
40
ns
Data Valid to WR Rise Time
t
DS
40
ns
WR Rise to Data Valid Hold Time
t
DH
0
ns
CLK Fall to WR Hold Time
t
CWH
40
ns
CS to CLK or WR Setup Time
t
CSWS
40
ns
CLK or WR to CS Hold Time
t
CSWH
0
ns
CS Pulse Width
t
CS
100
ns
WR Pulse Width (Note 8)
t
WR
60
ns
t
TC
10 60
nsC
LOAD
= 20pF, Figure 1
PARAMETER SYMBOL MIN TYP MAX UNITSCONDITIONS
CS Rise to Output Disable
Note 1: Tested at VDD= +5V, COM = GND, unipolar single-ended input mode. Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after offset and gain errors have
been removed.
Note 3: Offset nulled. Note 4: On channel is grounded; sine wave applied to off channels. Note 5: Conversion time is defined as the number of clock cycles times the clock period; clock has a 50% duty cycle. Note 6: Input voltage range referenced to negative input. The absolute range for the analog inputs is from GND to V
DD
.
Note 7: External load should not change during conversion for specified accuracy. Note 8: When bit 5 is set low for internal acquisition, WR must not return low until after the first falling clock edge of the conversion.
TIMING CHARACTERISTICS
(VDD= +5V ±10%, COM = GND, REFADJ = VDD, V
REF
= +2.5V, 4.7µF capacitor at REF pin, f
CLK
= 7.6MHz (50% duty cycle),
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.)
Figure 1. Load Circuits for Enable/Disable Times
V
DD
3k
DOUT
3k
GND GND
a) High-Z to VOH and VOL to V
C
LOAD
20pF
OH
DOUT
b) High-Z to VOL and VOH to V
C
LOAD
20pF
OL
MAX1294/MAX1296
420ksps, +5V, 6-/2-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface
_______________________________________________________________________________________ 5
Typical Operating Characteristics
(VDD= +5V, V
REF
= +2.500V, f
CLK
= 7.6MHz, CL= 20pF, TA= +25°C, unless otherwise noted.)
0.1
1k
100k
101100
10k
1M
SUPPLY CURRENT vs. SAMPLE FREQUENCY
MAX1294/6-02A
f
SAMPLE
(Hz)
I
DD
(µA)
0
10
100
1000
10,000
WITH EXTERNAL REFERENCE
WITH INTERNAL REFERENCE
INTEGRAL NONLINEARITY vs.
DIGITAL OUTPUT CODE
0.5
0.4
0.3
0.2
0.1
0
INL (LSB)
-0.1
-0.2
-0.3
-0.4
-0.5 0 20001000 3000 4000 5000
DIGITAL OUTPUT CODE
SUPPLY CURRENT vs. SUPPLY VOLTAGE
2.2 R
=
L
CODE = 101010100000
2.1
(mA)
2.0
DD
I
1.9
DIFFERENTIAL NONLINEARITY vs.
DIGITAL OUTPUT CODE
0 20001000 3000 4000 5000
DIGITAL OUTPUT CODE
SUPPLY CURRENT vs. TEMPERATURE
R
=
L
CODE = 101010100000
MAX1294/6-01
MAX1294/6 toc03
0.5
0.4
0.3
0.2
0.1
0
DNL (LSB)
-0.1
-0.2
-0.3
-0.4
-0.5
2.3
2.2
2.1
(mA)
2.0
DD
I
1.9
1.8
MAX1294/6-02
MAX1294/6 toc04
STANDBY CURRENT vs. SUPPLY VOLTAGE
990
980
970
(µA)
DD
960
STANDBY I
950
940
MAX1294/6 toc05
1.8
4.50 5.004.75 5.25 5.50
STANDBY CURRENT vs. TEMPERATURE
990
980
970
(µA)
DD
960
STANDBY I
950
940
930
-40 10-15 35 60 85 TEMPERATURE (°C)
MAX1290/2 toc07
930
4.50 5.004.75 5.25 5.50 VDD (V)
POWER-DOWN CURRENT
vs. TEMPERATURE
2.2
2.1
(µA)
DD
2.0
POWER-DOWN I
1.9
1.8
-40 10-15 35 60 85 TEMPERATURE (°C)
VDD (V)
MAX1294/6 toc06
1.7
-40 10-15 35 60 85 TEMPERATURE (°C)
POWER-DOWN CURRENT
vs. SUPPLY VOLTAGE
3.0
2.5
(µA)
DD
2.0
POWER-DOWN I
1.5
1.0
4.50 5.004.75 5.25 5.50
VDD (V)
MAX1294/6 toc08
MAX1294/MAX1296
420ksps, +5V, 6-/2-Channel, 12-Bit ADCs with +2.5V Reference and Parallel Interface
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VDD= +5V, V
REF
= +2.500V, f
CLK
= 7.6MHz, CL= 20pF, TA= +25°C, unless otherwise noted.)
2.48
2.49
2.50
2.52
2.51
2.53
REFERENCE VOLTAGE
vs. TEMPERATURE
MAX1294/6-10
TEMPERATURE (°C)
V
REF
(V)
-40 35-15 10 60 85
-1.0
0
-0.5
0.5
1.0
OFFSET ERROR vs. SUPPLY VOLTAGE
MAX1294/6 toc11
VDD (V)
OFFSET ERROR (LSB)
4.50 5.004.75 5.25 5.50
-2
-1
0
1
2
OFFSET ERROR vs. TEMPERATURE
MAX1294/6 toc12
TEMPERATURE (°C)
OFFSET ERROR (LSB)
-40 35 60-15 10 85
-2
0
-1
1
2
GAIN ERROR vs. SUPPLY VOLTAGE
MAX1294/6 toc13
VDD (V)
GAIN ERROR (LSB)
4.50 5.004.75 5.25 5.50
0
0.5
1.0
1.5
2.0
GAIN ERROR vs. TEMPERATURE
MAX1294/6 toc14
TEMPERATURE (°C)
GAIN ERROR (LSB)
-40 35 60-15 10 85
2.48
2.49
2.51
2.50
2.52
2.53
INTERNAL REFERENCE VOLTAGE
vs. SUPPLY VOLTAGE
MAX1294/6-09
VDD (V)
V
REF
(V)
4.50 5.004.75 5.25 5.50
-140
-120
-100
-80
-60
-40
-20
0
20
0 200 400 600 800 1000
FFT PLOT
MAX1294/6-15
FREQUENCY (kHz)
AMPLITUDE (dB)
V
DD
= 5V
f
IN
= 50kHz
f
SAMPLE
= 400ksps
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