Maxim MAX1292BEEG, MAX1292BCEG, MAX1292AEEG, MAX1292ACEG, MAX1290BCEI Datasheet

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General Description

The MAX1290/MAX1292 low-power, 12-bit analog-to­digital converters (ADCs) feature a successive-approxi­mation ADC, automatic power-down, fast wake-up
(2µs), on-chip clock, +2.5V internal reference, and
high-speed, byte-wide parallel interface. The devices
operate with a single +5V analog supply and feature a
V

LOGIC

pin that allows them to interface directly with a

+2.7V to +5.5V digital supply.
Power consumption is only 10mW (VDD= V

LOGIC

) at a
400ksps max sampling rate. Two software-selectable
power-down modes enable the MAX1290/MAX1292 to
be shut down between conversions; accessing the par­allel interface returns them to normal operation.
Powering down between conversions can cut supply
current to under 10µA at reduced sampling rates.

Both devices offer software-configurable analog inputs
for unipolar/bipolar and single-ended/pseudo-differen­tial operation. In single-ended mode, the MAX1290 has
8 input channels and the MAX1292 has 4 input chan­nels (4 and 2 input channels, respectively, when in
pseudo-differential mode).

Excellent dynamic performance and low power com­bined with ease of use and small package size make
these converters ideal for battery-powered and data­acquisition applications or for other circuits with
demanding power consumption and space require­ments.

The MAX1290 is available in a 28-pin QSOP package,
while the MAX1292 comes in a 24-pin QSOP. For pin­compatible +3V, 12-bit versions, refer to the MAX1291/
MAX1293 data sheet.

Applications

Industrial Control Systems Data Logging
Energy Management Patient Monitoring
Data-Acquisition Systems Touchscreens

Features

♦ 12-Bit Resolution, ±0.5LSB Linearity
♦ +5V Single-Supply Operation
♦ User-Adjustable Logic Level (+2.7V to +5.5V)
♦ Internal +2.5V Reference
♦ Software-Configurable Analog Input Multiplexer

8-Channel Single-Ended/
4-Channel Pseudo-Differential (MAX1290)

4-Channel Single-Ended/
2-Channel Pseudo-Differential (MAX1292)

♦ Software-Configurable Unipolar/Bipolar Analog

Inputs

♦ Low Current: 1.9mA (400ksps)

1.0mA (100ksps)
400µA (10ksps)
2µA (Shutdown)

♦ Internal 6MHz Full-Power Bandwidth Track/Hold
♦ Byte-Wide Parallel (8+4) Interface
♦ Small Footprint: 28-Pin QSOP (MAX1290)

24-Pin QSOP (MAX1292)

MAX1290/MAX1292

400ksps, +5V, 8-/4-Channel, 12-Bit ADCs

with +2.5V Reference and Parallel Interface

________________________________________________________________

Maxim Integrated Products

1

19-1531; Rev 0; 9/99

PART

MAX1290ACEI

0°C to +70°C

TEMP. RANGE PIN-PACKAGE

28 QSOP

Ordering Information

Pin Configurations

±0.5

INL

(LSB)

MAX1290BCEI 0°C to +70°C ±128 QSOP

MAX1290BEEI

MAX1290AEEI

-40°C to +85°C ±1

-40°C to +85°C ±0.528 QSOP
28 QSOP

Ordering Information continued at end of data sheet.

Typical Operating Circuits appear at end of data sheet.

Pin Configurations continued at end of data sheet.

EVALUATION KIT

AVAILABLE

TOP VIEW

1

HBEN

2

D7

3

D6

4

D5

5

D4

D3/D11

D2/D10

D1/D9

D0/D8

INT

RD

MAX1292

6

7

8

9

10

11

12

QSOP

24

23

22

21

20

19

18

17

16

15

14

13

V

LOGIC

V

DD

REF

REFADJ

GND

COM

CH0

CH1

CH2

CH3

CS

CLKWR

MAX1290/MAX1292

400ksps, +5V, 8-/4-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= V

LOGIC

= +5V ±10%, COM = GND, REFADJ = VDD, V

REF

= +2.5V, 4.7µF capacitor at REF pin, f

CLK

= 7.6MHz (50% duty

cycle), T

A

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

External acquisition or external clock mode

Internal acquisition/internal clock mode

MAX129_A

External acquisition/internal clock mode

External clock mode

-3dB rolloff

SINAD > 68dB

fIN= 175kHz, VIN= 2.5Vp-p (Note 4)

f

IN1

= 49kHz, f

IN2

= 52kHz

MAX129_B
No missing codes over temperature

CONDITIONS

ns25Aperture Delay

ns400t

ACQ

T/H Acquisition Time

µs

3.2 3.6 4

2.5 3.0 3.5

2.1

t

CONV

Conversion Time (Note 5)

MHz

6

Full-Power Bandwidth

kHz

350

Full-Linear Bandwidth

dB

-78

Channel-to-Channel Crosstalk

dB

76

IMDIntermodulation Distortion

dB

80

SFDRSpurious-Free Dynamic Range

dB

-80

Total Harmonic Distortion
(including 5th-order harmonic)

THD

±0.5

INLRelative Accuracy (Note 2)

Bits

12

RESResolution

dB

67 70

SINADSignal-to-Noise Plus Distortion

LSB

±0.2

Channel-to-Channel Offset
Matching

ppm/°C

±2

Gain Temperature Coefficient

LSB

±1

LSB

±1

DNLDifferential Nonlinearity

LSB

±4

Offset Error

LSB

±4

Gain Error (Note 3)

UNITSMIN TYP MAXSYMBOLPARAMETER

Internal acquisition/internal clock mode

External acquisition or external clock mode

<200

ps

<50

Aperture Jitter

MHz0.1 7.6f

CLK

External Clock Frequency

%30 70Duty Cycle

DC ACCURACY (Note 1)

DYNAMIC SPECIFICATIONS (f

IN

(sine wave)

= 50kHz, VIN= 2.5Vp-p, 400ksps, external f

CLK

= 7.6MHz, bipolar input mode)

CONVERSION RATE

VDDto GND..............................................................-0.3V to +6V

V

LOGIC

to GND.........................................................-0.3V to +6V

CH0–CH7, COM to GND............................-0.3V to (V

DD

+ 0.3V)

REF, REFADJ to GND.................................-0.3V to (V

DD

+ 0.3V)

Digital Inputs to GND ...............................................-0.3V to +6V

Digital Outputs (D0–D11, INT)

to GND ........................................... -0.3V to (V

LOGIC

+ 0.3V)

Continuous Power Dissipation (T

A

= +70°C)

24-Pin QSOP (derate 9.5mW/°C above +70°C).........762mW

28-Pin QSOP (derate 8.00mW/°C above +70°C).......667mW

Operating Temperature Ranges

MAX1290_C_ _/MAX1292_C_ _....................... 0°C to +70°C

MAX1290_E_ _/MAX1292_E_ _ .....................-40°C to +85°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10sec) .............................+300°C

V

MAX1290/MAX1292

400ksps, +5V, 8-/4-Channel, 12-Bit ADCs

with +2.5V Reference and Parallel Interface

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= V

LOGIC

= +5V ±10%, COM = GND, REFADJ = VDD, V

REF

= +2.5V, 4.7µF capacitor at REF pin, f

CLK

= 7.6MHz (50% duty

cycle), T

A

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.)

CONDITIONS UNITSMIN TYP MAXSYMBOLPARAMETER

0 to 0.5mA output load

To power down the internal reference

For small adjustments

On/off-leakage current, VIN= 0 or V

DD

Unipolar, V

COM

= 0

V

1.0

V

DD

+

50mV

V

REF

REF Input Voltage Range

µF

4.7 10

Capacitive Bypass at REF

µF

0.01 1

Capacitive Bypass at REFADJ

mV/mA

0.2 0.5

Load Regulation (Note 7)

V

VDD- 1

REFADJ High Threshold

mV

±100

REFADJ Input Range

±20 ppm/°CTC

REF

REF Temperature Coefficient

mA

15

REF Short-Circuit Current

V

2.49 2.5 2.51

REF Output Voltage

pF

12

C

IN

Input Capacitance

µA

±0.01 ±1

Multiplexer Leakage Current

V

Analog Input Voltage Range
Single Ended and Differential
(Note 6)

0V

REF

V

IN

CS = V

DD

I

SOURCE

= 1mA

I

SINK

= 1.6mA

VIN= 0 or V

DD

V

LOGIC

= 4.5V

µA

±0.1 ±1

I

LEAKAGE

Three-State Leakage Current

V

V

LOGIC

- 0.5

V

OH

Output Voltage High

V

0.4

V

OL

Output Voltage Low

pF

15

C

IN

Input Capacitance

µA

±0.1 ±1

I

IN

Input Leakage Current

mV

200

V

HYS

Input Hysteresis

V

0.8

V

IL

Input Voltage Low

V

4.0

CS = V

DD

pF

15

C

OUT

Three-State Output Capacitance

Bipolar, V

COM

= V

REF

/2

-V

REF

/2 +V

REF

/2

V

LOGIC

= 2.7V

2.0

V

IH

Input Voltage High

V

REF

= 2.5V, f

SAMPLE

= 400ksps

200 300

Shutdown mode

µA

2

I

REF

Shutdown REF Input Current

ANALOG INPUTS

INTERNAL REFERENCE

EXTERNAL REFERENCE AT REF

DIGITAL INPUTS AND OUTPUTS

Operating mode,

MAX1290/MAX1292

400ksps, +5V, 8-/4-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface

4 _______________________________________________________________________________________

TIMING CHARACTERISTICS

(VDD= V

LOGIC

= +5V ±10%, COM = GND, REFADJ = VDD, V

REF

= +2.5V, 4.7µF capacitor at REF pin, f

CLK

= 7.6MHz (50% duty

cycle), T

A

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.)

CONDITIONS UNITSMIN TYP MAXSYMBOLPARAMETER

Standby mode

Operating mode,
f

SAMPLE

= 400ksps

1.0 1.2

mA

2.2 2.5

2.6 2.9

I

DD

Positive Supply Current

V

4.5 5.5

V

DD

Analog Supply Voltage

200

ELECTRICAL CHARACTERISTICS (continued)

(VDD= V

LOGIC

= +5V ±10%, COM = GND, REFADJ = VDD, V

REF

= +2.5V, 4.7µF capacitor at REF pin, f

CLK

= 7.6MHz (50% duty

cycle), T

A

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.)

V

LOGIC

Current I

LOGIC

CL= 20pF

210

µA

Power-Supply Rejection PSR VDD= +5V ±10%, full-scale input

±0.3 ±0.7

mV

f

SAMPLE

= 400ksps

Nonconverting

V

2.7

V

DD

+

0.3

V

LOGIC

Digital Supply Voltage

WR to CLK Fall Setup Time

t

CWS

40

ns

nsCLK Pulse Width High

nsCLK Period

t

CH

40

t

CP

132

CLK Pulse Width Low t

CL

40

ns

Data Valid to WR Rise Time

t

DS

40

ns

WR Rise to Data Valid Hold Time

t

DH

0

ns

CLK Fall to WR Hold Time

t

CWH

40

ns

CS to CLK or WR Setup Time

t

CSWS

60

ns

CLK or WR to CS Hold Time

t

CSWH

0

ns

CS Pulse Width

t

CS

100

ns

WR Pulse Width (Note 8)

t

WR

60

ns

PARAMETER SYMBOL MIN TYP MAX UNITSCONDITIONS

Shutdown mode

210

0.5 0.8

POWER REQUIREMENTS

µA

External reference

Internal reference

External reference

Internal reference

MAX1290/MAX1292

400ksps, +5V, 8-/4-Channel, 12-Bit ADCs

with +2.5V Reference and Parallel Interface

_______________________________________________________________________________________ 5

Note 1: Tested at VDD= +5V, COM = GND, = 0, unipolar single-ended input mode.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after offset and gain errors have

been removed.

Note 3: Offset nulled.
Note 4: On channel is grounded; sine wave applied to off channels.
Note 5: Conversion time is defined as the number of clock cycles times the clock period; clock has 50% duty cycle.
Note 6: Input voltage range referenced to negative input. The absolute range for the analog inputs is from GND to V

DD

.

Note 7: External load should not change during conversion for specified accuracy.
Note 8: When bit 5 is set low for internal acquisition, WR must not return low until after the first falling clock edge of the conversion.

TIMING CHARACTERISTICS (continued)

(VDD= V

LOGIC

= +5V ±10%, COM = GND, REFADJ = VDD, V

REF

= +2.5V, 4.7µF capacitor at REF pin, f

CLK

= 7.6MHz (50% duty

cycle), T

A

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.)

Figure 1. Load Circuits for Enable/Disable Times

t

TR

10 40

nsC

LOAD

= 20pF, Figure 1

RD Rise to Output Disable
RD Fall to Output Data Valid

t

DO

10 50

ns

RD Fall to INT High Delay

t

INT1

50

ns

CS Fall to Output Data Valid

t

DO2

100

ns

C

LOAD

= 20pF, Figure 1

C

LOAD

= 20pF, Figure 1

C

LOAD

= 20pF, Figure 1

t

TC

10 60

nsC

LOAD

= 20pF, Figure 1

PARAMETER SYMBOL MIN TYP MAX UNITSCONDITIONS

CS Rise to Output Disable

HBEN Rise to Output Data Valid t

DO1

10 50

nsC

LOAD

= 20pF, Figure 1

HBEN Fall to Output Data Valid t

DO1

10 80

nsC

LOAD

= 20pF, Figure 1

DOUT

V

LOGIC

3k

C

3k

LOAD

20pF

DOUT

C

LOAD

20pF

a) HIGH-Z TO VOH AND VOL TO V

OH

b) HIGH-Z TO VOL AND VOH TO V

OL

MAX1290/MAX1292

400ksps, +5V, 8-/4-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface

6 _______________________________________________________________________________________

Typical Operating Characteristics

(VDD= V

LOGIC

= +5V, V

REF

= +2.500V, f

CLK

= 7.6MHz, CL= 20pF, TA= +25°C, unless otherwise noted.)

-0.5

-0.2

-0.3

-0.4

-0.1

0

0.1

0.2

0.3

0.4

0.5

0 20001000 3000 4000 5000

INTEGRAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

MAX1290/2 toc01

DIGITAL OUTPUT CODE

INL (LSB)

-0.5

-0.2

-0.3

-0.4

-0.1

0

0.1

0.2

0.3

0.4

0.5

0 20001000 3000 4000 5000

DIFFERENTIAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

MAX1290/2 toc02

DIGITAL OUTPUT CODE

DNL (LSB)

0.1 10k101 100 1k 100k 1000k

SUPPLY CURRENT

vs. SAMPLE FREQUENCY

MAX1291/93 toc03

f

SAMPLE

(Hz)

I

DD

(µA)

1

10

100

1k

10k

WITH INTERNAL
REFERENCE

WITH EXTERNAL
REFERENCE

1.8

1.9

2.0

2.1

2.2

SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX1290/2 toc04

VDD (V)

I

DD

(mA)

4.50 5.004.75 5.25 5.50

R

L

= ∞

CODE = 101010100000

1.7

1.9

1.8

2.1

2.0

2.2

2.3

-40 10-15 35 60 85

SUPPLY CURRENT vs. TEMPERATURE

MAX1290/2 toc05

TEMPERATURE (°C)

I

DD

(mA)

R

L

= ∞

CODE = 101010100000

930

950

940

970

960

980

990

4.50 5.004.75 5.25 5.50

STANDBY CURRENT vs. SUPPLY VOLTAGE

MAX1290/2 toc06

VDD (V)

STANDBY I

DD

(µA)

930

950

940

970

960

980

990

-40 10-15 35 60 85

STANDBY CURRENT vs. TEMPERATURE

MAX1290/2 toc07

TEMPERATURE (°C)

STANDBY I

DD

(µA)

1.0

1.5

2.0

2.5

3.0

POWER-DOWN CURRENT

vs. SUPPLY VOLTAGE

MAX1290/2 toc08

VDD (V)

POWER-DOWN I

DD

(µA)

4.50 5.004.75 5.25 5.50

1.8

2.0

1.9

2.1

2.2

-40 10-15 35 60 85

POWER-DOWN CURRENT

vs. TEMPERATURE

MAX1290/2 toc09

TEMPERATURE (°C)

POWER-DOWN I

DD

(µA)