MAXIM MAX12559 Technical data

General Description

The MAX12559 is a dual, 3.3V, 14-bit analog-to-digital
converter (ADC) featuring fully differential wideband
track-and-hold (T/H) inputs, driving internal quantizers.
The MAX12559 is optimized for low power, small size,
and high dynamic performance in intermediate frequen­cy (IF) and baseband sampling applications. This dual
ADC operates from a single 3.3V supply, consuming
only 980mW while delivering a typical 72.2dB signal-to­noise ratio (SNR) performance at a 175MHz input fre­quency. The T/H input stages accept single-ended or
differential inputs up to 350MHz. In addition to low oper­ating power, the MAX12559 features a 0.5mW power­down mode to conserve power during idle periods.

A flexible reference structure allows the MAX12559 to
use the internal 2.048V bandgap reference or accept
an externally applied reference and allows the refer­ence to be shared between the two ADCs. The refer­ence structure allows the full-scale analog input range
to be adjusted from ±0.35V to ±1.15V. The MAX12559
provides a common-mode reference to simplify design
and reduce external component count in differential
analog input circuits.

The MAX12559 supports either a single-ended or differ­ential input clock. User-selectable divide-by-two (DIV2)
and divide-by-four (DIV4) modes allow for design flexibil­ity and help to reduce the negative effects of clock jitter.
Wide variations in the clock duty cycle are compensated
with the ADC’s internal duty-cycle equalizer (DCE).

The MAX12559 features two parallel, 14-bit-wide,
CMOS-compatible outputs. The digital output format is
pin-selectable to be either two’s complement or Gray
code. A separate power-supply input for the digital out­puts accepts a 1.7V to 3.6V voltage for flexible interfac­ing with various logic levels. The MAX12559 is available
in a 10mm x 10mm x 0.8mm, 68-pin thin QFN package
with exposed paddle (EP), and is specified for the
extended (-40°C to +85°C) temperature range.

For a 12-bit, pin-compatible version of this ADC, refer to
the MAX12529 data sheet. See the Selector Guide for
more selections.

Applications

IF and Baseband Communication Receivers

Cellular, LMDS, Point-to-Point Microwave,
MMDS, HFC, WLAN

I/Q Receivers

Medical Imaging

Portable Instrumentation

Digital Set-Top Boxes

Low-Power Data Acquisition

Features

♦ Direct IF Sampling Up to 350MHz
♦ Excellent Dynamic Performance

73dB/72.2dB SNR at f

IN

= 70MHz/175MHz

83.5dBc/78.8dBc SFDR at f

IN

= 70MHz/175MHz

♦ 3.3V Low-Power Operation

980mW (Differential Clock Mode)
952mW (Single-Ended Clock Mode)

♦ Fully Differential or Single-Ended Analog Input
♦ Adjustable Differential Analog Input Voltage
♦ 750MHz Input Bandwidth
♦ Adjustable, Internal or External, Shared Reference
♦ Differential or Single-Ended Clock
♦ Accepts 25% to 75% Clock Duty Cycle
♦ User-Selectable DIV2 and DIV4 Clock Modes
♦ Power-Down Mode
♦ CMOS Outputs in Two’s Complement or Gray

Code

♦ Out-of-Range and Data-Valid Indicators
♦ Small, 68-Pin Thin QFN Package

(10mm x 10mm x 0.8mm)

♦ 12-Bit, Pin-Compatible Version Available

(MAX12529)

♦ Evaluation Kit Available (Order MAX12559EVKIT)

MAX12559

Dual, 96Msps, 14-Bit, IF/Baseband ADC

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-3925; Rev 1; 4/07

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

*EP = Exposed paddle.
+Denotes lead-free package.

D = Dry pack.

PART

SAMPLING RATE

(Msps)

RESOLUTION

(Bits)

MAX12559 96 14

MAX12558 80 14

MAX12557 65 14

MAX12529 96 12

MAX12528 80 12

MAX12527 65 12

Selector Guide

Pin Configuration appears at end of data sheet.

PART TEMP RANGE PIN-PACKAGE

M AX 12559E TK- D -40°C to +85°C 68 Thin QFN-EP* T6800-4
M AX 12559E TK+ D -40°C to +85°C 68 Thin QFN-EP* T6800-4

PKG

CODE

MAX12559

Dual, 96Msps, 14-Bit, IF/Baseband ADC

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 96MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VDDto GND.................................................................-0.3V to +3.6V

OV

DD

to GND............-0.3V to the lower of (VDD+ 0.3V) and +3.6V

INAP, INAN to GND....-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

INBP, INBN to GND....-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

CLKP, CLKN to

GND ........................-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

REFIN, REFOUT

to GND ..................-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

REFAP, REFAN,

COMA to GND ......-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

REFBP, REFBN,

COMB to GND ......-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

DIFFCLK/SECLK, G/T, PD, SHREF, DIV2,

DIV4 to GND .........-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

D0A–D13A, D0B–D13B, DAV,

DORA, DORB to GND..............................-0.3V to (OV

DD

+ 0.3V)

Continuous Power Dissipation (T

A

= +70°C)
68-Pin Thin QFN, 10mm x 10mm x 0.8mm

(derate 70mW/°C above +70°C) ....................................4000mW

Operating Temperature Range................................-40°C to +85°C

Junction Temperature ...........................................................+150°C

Storage Temperature Range .................................-65°C to +150°C

Lead Temperature (soldering, 10s)......................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DC ACCURACY

Resolution 14 Bits

Integral Nonlinearity INL fIN = 3MHz ±2.6 LSB

Differential Nonlinearity DNL fIN = 3MHz ±0.65 LSB
Offset Error ±0.05 ±0.7 %FSR

Gain Error External reference, V

ANALOG INPUTS (INAP, INAN, INBP, INBN)

Differential Input Voltage Range V

Common-Mode Input Voltage V

Analog Input Resistance R

Analog Input Capacitance

CONVERSION RATE

Maximum Clock Frequency f

Minimum Clock Frequency 5MHz

Data Latency Figure 5 8

DYNAMIC CHARACTERISTICS (VIN = -1dBFS)

Small-Signal Noise Floor SSNF Input at -35dBFS 74.5 76.3 dBFS

Signal-to-Noise Ratio SNR

DIFF

C

PAR

C

SAMPLE

CLK

Differential or single-ended inputs ±1.024 V

Each input, Figure 3 2.3 kΩ

IN

Fixed capacitance to ground,
each input, Figure 3

Switched capacitance,
each input, Figure 3

fIN = 3MHz 70.5 74.3

fIN = 48MHz 73.9

fIN = 70MHz 73

f

= 175MHz 69.3 72.2

IN

= 2.048V ±0.4 ±5 %FSR

REFIN

/ 2 V

DD

2

4.5

96 MHz

pF

Clock

Cycles

dB

MAX12559

Dual, 96Msps, 14-Bit, IF/Baseband ADC

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 96MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Signal-to-Noise Plus Distortion SINAD

Spurious-Free Dynamic Range SFDR

Total Harmonic Distortion THD

Second Harmonic HD2

Third Harmonic HD3

3rd-Order Intermodulation
Distortion

Full-Power Bandwidth FPBW Input at -0.2dBFS, -3dB rolloff 750

Aperture Delay

Aperture Jitter t

Output Noise n

IM3

t

AD

AJ

OUT

fIN = 3MHz 68.3 73.7

fIN = 48MHz 72.6

fIN = 70MHz 72.2

f

= 175MHz 65.3 71.2

IN

fIN = 3MHz 72.2 84.6

fIN = 48MHz 81.6

fIN = 70MHz 83.5

= 175MHz 69 78.8

f

IN

fIN = 3MHz -82.1 -69.8

fIN = 48MHz -78.5

fIN = 70MHz -80.3

= 175MHz -77.8 -66.3

f

IN

fIN = 3MHz -85.9

fIN = 48MHz -82.4

fIN = 70MHz -86.1

f

= 175MHz -78.8

IN

fIN = 3MHz -89.4

fIN = 48MHz -86.6

fIN = 70MHz -84.4

f

= 175MHz -88.6

IN

f

= 69MHz at A

IN1

= 72MHz at A

f

IN2

= 173MHz at A

f

IN1

= 177MHz at A

f

IN2

Figure 5 1.2 ns

INAP = INAN = COMA,
INBP = INBN = COMB

= -7dBFS,

IN1

= -7dBFS

IN2

= -7dBFS,

IN1

= -7dBFS

IN2

-82

-86

< 0.1 ps

0.9 LSB

dB

dBc

dBc

dBc

dBc

dBc

MHz

RMS

RMS

MAX12559

Dual, 96Msps, 14-Bit, IF/Baseband ADC

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 96MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Overdrive Recovery Time ±10% beyond full scale 1

INTERCHANNEL CHARACTERISTICS

Crosstalk Rejection

Gain Matching ±0.02 ±0.1 dB

Offset Matching ±0.01 %FSR

INTERNAL REFERENCE (REFOUT)

REFOUT Output Voltage V

REFOUT Load Regulation -1mA < I

REFOUT Temperature Coefficient TC

REFOUT Short-Circuit Current

BUFFERED REFERENCE MODE (REFIN is driven by REFOUT or an external 2.048V single-ended reference source;
V

REFAP/VREFAN/VCOMA

REFIN Input Voltage V

REFIN Input Resistance R

COM_ Output Voltage

REF_P Output Voltage

REF_N Output Voltage

Differential Reference Voltage

Differential Reference
Temperature Coefficient

UNBUFFERED EXTERNAL REFERENCE (REFIN = GND, V
externally, V

COMA

REF_P Input Voltage

REF_N Input Voltage

COM_ Input Voltage V

Differential Reference Voltage

REFOUT

REF

f

INA

f

INA

or f

or f

= 70MHz at -1dBFS 90

INB

= 175MHz at -1dBFS 83

INB

< +1mA 35 mV/mA

REFOUT

Short to VDD—sinking 0.24

Short to GND—sourcing 2.1

= V

and V

COMB

REFBP/VREFBN/VCOMB

REFIN

REFIN

V

COMA

V

COMB

V

REFAP

V

REFBP

V

REFAN

V

REFBN

V

REFA

V

REFB

TC

REF

= VDD / 2)

V

REFAP

V

REFBP

V

REFAN

V

REFBN

COM_VCOM_

V

REFA

V

REFB

are generated internally)

V

= VDD / 2 1.60 1.65 1.70 V

COM_

V

REF_P

V

REF_N

V

REF_

V

REF_P

V

REF_N

= VDD / 2 + (V

= VDD / 2 - (V

= V

- V

- V

- V

REF_P

COM_

COM_

REF_N

REFAP/VREFAN/VCOMA

x 3/8) 2.418 V

REFIN

x 3/8) 0.882 V

REFIN

= VDD / 2 1.65 V

V

REF_

= V

REF_P

- V

REF_N

= V

REFIN

2.000 2.048 2.080 V

55 ppm/°C

2.048 V

> 50 MΩ

1.440 1.536 1.600 V

40 ppm/°C

and V

REFBP/VREFBN/VCOMB

are applied

+0.768 V

-0.768 V

x 3/4 1.536 V

Clock
Cycle

dB

mA

MAX12559

Dual, 96Msps, 14-Bit, IF/Baseband ADC

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 96MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

REF_P Sink Current

REF_N Source Current

COM_ Sink Current

REF_P, REF_N Capacitance

COM_ Capacitance C

CLOCK INPUTS (CLKP, CLKN)

Single-Ended Input High
Threshold
Single-Ended Input Low
Threshold

Minimum Differential Clock Input
Voltage Swing

Differential Input Common-Mode
Voltage

CLKP, CLKN Input Resistance R

CLKP, CLKN Input Capacitance C

DIGITAL INPUTS (DIFFCLK/SECLK, G/T, PD, DIV2, DIV4, SHREF)

Input High Threshold V

Input Low Threshold V

Input Leakage Current

Digital Input Capacitance C

DIGITAL OUTPUTS (D0A–D13A, D0B–D13B, DORA, DORB, DAV)

Output-Voltage Low V

Output-Voltage High V

Tri-State Leakage Current
(Note 2)

I

REFAP

I

REFBP

I

REFAN

I

REFBN

I

COMA

I

COMB

C

REF_P

C

REF_N

COM_

V

V

CLK

CLK

V

REF_P

V

REF_N

V

= 1.65V 0.85 mA

COM_

,

DIFFCLK/SECLK = GND, CLKN = GND

IH

DIFFCLK/SECLK = GND, CLKN = GND

IL

DIFFCLK/SECLK = OV

DIFFCLK/SECLK = OV

Figure 4 5 kΩ

IH

IL

= 2.418V 1.2 mA

= 0.882V 0.85 mA

DD

DD

OVDD applied to input ±5

Input connected to ground ±5

DIN

D0A–D13A, D0B–D13B, DORA, DORB:
I

= 200µA

OL

SINK

DAV: I

= 600µA 0.2

SINK

D0A–D13A, D0B–D13B, DORA, DORB:

OH

I

LEAK

I

DAV: I

OVDD applied to input ±5

Input connected to ground ±5

SOURCE

SOURCE

= 200µA

= 600µA

13 pF

6pF

0.8 x
V

DD

0.2 x
V

DD

0.2 V

V

/ 2 V

DD

2pF

0.8 x

OV

DD

0.2 x

OV

DD

5pF

0.2

-

OV

DD

0.2

-

OV

DD

0.2

V

V

P-P

V

V

µA

V

V

µA

MAX12559

Dual, 96Msps, 14-Bit, IF/Baseband ADC

6 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 96MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

D 0A–D 13A, D O RA,
D 0B–D 13B, and D O RB Tr i - S tate
O utp ut C ap aci tance ( N ote 2)

DAV Tri-State Output
Capacitance (Note 2)

POWER REQUIREMENTS

Analog Supply Voltage V

Digital Output Supply Voltage OV

Analog Supply Current I

Analog Power Dissipation P

Digital Output Supply Current I

C

OUT

C

DAV

DD

VDD

VDD

OVDD

DD

Normal operating mode
f

= 175MHz

IN

single-ended clock
(DIFFCLK/SECLK = GND)

Normal operating mode

= 175MHz

f

IN

differential clock
(DIFFCLK/SECLK = OV

Power-down mode (PD = OVDD)
clock idle

Normal operating mode
f

= 175MHz

IN

single-ended clock
(DIFFCLK/SECLK = GND)

Normal operating mode

= 175MHz

f

IN

differential clock
(DIFFCLK/SECLK = OV

Power-down mode (PD = OVDD)
clock idle

Normal operating mode

= 175MHz, C

f

IN

Power-down mode (PD = OVDD)
clock idle

)

DD

)

DD

L ≈ 10pF

3pF

6pF

3.15 3.30 3.60 V

1.70 2.0 V

288.5

297 322

0.15

952

980 1063

0.5

26.1

0.001

DD

V

mA

mW

mA

MAX12559

Dual, 96Msps, 14-Bit, IF/Baseband ADC

_______________________________________________________________________________________ 7

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 96MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

Note 1: Specifications ≥ +25°C guaranteed by production test, < +25°C guaranteed by design and characterization.
Note 2: During power-down, D0A–D13A, D0B–D13B, DORA, DORB, and DAV are high impedance.
Note 3: Data outputs settle to V

IH

or VIL.

Note 4: Guaranteed by design and characterization.

Typical Operating Characteristics

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 5pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, G/T = GND, f

CLK

= 96MHz (50% duty cycle), TA= +25°C, unless otherwise noted.)

FFT PLOT (65,536-POINT DATA RECORD)

MAX12559 toc01

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dBFS)

-100

-80

-60

-40

-20

0

-120
01020304048

f

CLK

= 96MHz

f

IN

= 2.99919MHz

A

IN

= -1.01dBFS
SNR = 74.5dB
SINAD = 73.7dB
THD = -81.1dBc
SFDR = 85.1dBc
HD2 = -86.3dBc
HD3 = -91.41dBc

HD3

HD2

FFT PLOT (65,536-POINT DATA RECORD)

MAX12559 toc02

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dBFS)

-100

-80

-60

-40

-20

0

-120

f

CLK

= 96MHz

f

IN

= 47.89893MHz

A

IN

= -0.98dBFS
SNR = 74dB
SINAD = 71.9dB
THD = -76dBc
SFDR = 80dBc
HD2 = -80.9dBc
HD3 = -86.3dBc

0101520525303540

45

HD2

HD3

FFT PLOT (65,536-POINT DATA RECORD)

MAX12559 toc03

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dBFS)

-100

-80

-60

-40

-20

0

-120

f

CLK

= 96MHz

f

IN

= 70.1001MHz

A

IN

= -0.99dBFS
SNR = 73.2dB
SINAD = 72.5dB
THD = -80.6dBc
SFDR = 84.4dBc
HD2 = -94.6dBc
HD3 = -86.4dBc

0101520525303540

45

HD3

HD2

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

TIMING CHARACTERISTICS (Figure 5)

Clock Pulse-Width High t

Clock Pulse-Width Low t

Data-Valid Delay t

Data Setup Time Before Rising
Edge of DAV

Data Hold Time After Rising Edge
of DAV

Data Setup Time Before Falling
Edge of Clock

Data Hold Time After Falling
Edge of Clock

Wake-Up Time from Power-Down t

t

CH

CL

DAV

t

SETUP

t

HOLD

DATASETUP

t

DATAHOLD

WAKE

(Notes 3, 4) 3.15 5.8 6.65 ns

(Notes 3, 4) 3.60 ns

(Notes 3, 4) 3.55 ns

(Notes 3, 4) 2.25 ns

(Notes 3, 4) 3.25 ns

V

= 2.048V 10 ms

REFIN

5.1 ns

5.1 ns

MAX12559

Dual, 96Msps, 14-Bit, IF/Baseband ADC

8 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 5pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, G/T = GND, f

CLK

= 96MHz (50% duty cycle), TA= +25°C, unless otherwise noted.)

FFT PLOT (65,536-POINT DATA RECORD)

MAX12559 toc04

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dBFS)

-100

-80

-60

-40

-20

0

-120

f

CLK

= 96MHz

f

IN

= 175.00049MHz

A

IN

= -1.00dBFS
SNR = 72.4dB
SINAD = 71.4dB
THD = -78.3dBc
SFDR = 79.9dBc
HD2 = -80.9dBc
HD3 = -91.3dBc

0101520525303540

45

HD2

HD3

TWO-TONE IMD PLOT

(65,536-POINT DATA RECORD)

MAX12559 toc05

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dBFS)

0

-120
010152052530354045

-20

-40

-60

-80

-100

f

IN1

f

CLK

= 96MHz

f

IN1

= 68.50049MHz

A

IN1

= -7.00dBFS

f

IN2

= 71.50049MHz

A

IN2

= -7.04dBFS

IM3 = -84.30dBc

f

IN2

2f

IN2 - fIN1

2f

IN1 - fIN2

TWO-TONE IMD PLOT

(65,536-POINT DATA RECORD)

MAX12559 toc06

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dBFS)

010152052530354045

0

-120

-20

-40

-60

-80

-100

f

CLK

= 96MHz

f

IN1

= 172.50146MHz

A

IN1

= -7.04dBFS

f

IN2

= 177.50244MHz

A

IN2

= -6.99dBFS

IM3 = -84.6dBc

2f

IN2

- f

IN1

2f

IN1

- f

IN2

f

IN2

f

IN1

INTEGRAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

MAX12559 toc07

DIGITAL OUTPUT CODE

INL (LSB)

-2

0

1

2

4

-4
12,289 14,33716,38110,2416145 8193409720491

-3

3

-1

fIN = 2.99906MHz

DIFFERENTIAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

MAX12559 toc08

DIGITAL OUTPUT CODE

DNL (LSB)

-0.50

-0.25

0.50

1.00

-1.00
12,289 14,33716,38110,2416145 8193409720491

0.75

0.25

0

-0.75

fIN = 2.99906MHz

50

60

55

70

65

75

80

0 150 20050 100 250 300 350

SNR, SINAD vs. ANALOG INPUT FREQUENCY

(f

CLK

= 96MHz, A

IN

= -1dBFS)

MAX12559 toc09

fIN (MHz)

SNR, SINAD (dB)

SNR

SINAD

50

60

55

75

70

65

90

85

80

0 100 15050 200 250 300 350

-THD, SFDR vs. ANALOG INPUT FREQUENCY
(f

CLK

= 96MHz, AIN = -1dBFS)

MAX12559 toc10

fIN (MHz)

-THD, SFDR (dBc)

SFDR

-THD

15

25

20

40

35
30

45

50

70

60

55

75

-60 -50 -45-55 -40 -35 -30 -25 -20 -15 -10

SNR, SINAD vs. ANALOG INPUT AMPLITUDE

(f

CLK

= 96MHz, f

IN

= 70MHz)

MAX12559 toc11

AIN (dBFS)

SNR, SINAD (dB)

65

-5

0

SINAD

SNR

-THD, SFDR vs. ANALOG INPUT AMPLITUDE

(f

CLK

= 96MHz, fIN = 70MHz)

MAX12559 toc12

AIN (dBFS)

-THD, SFDR (dBc)

-5-10-20 15-45 -40 -35 -30 -25-50

35

40

45

50

55

60

65

70

75

80

85

90

30

-55 0

SFDR

-THD

MAX12559

Dual, 96Msps, 14-Bit, IF/Baseband ADC

_______________________________________________________________________________________ 9

Typical Operating Characteristics (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 5pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, G/T = GND, f

CLK

= 96MHz (50% duty cycle), TA= +25°C, unless otherwise noted.)

SNR, SINAD vs. ANALOG INPUT AMPLITUDE

(f

CLK

= 96MHz, fIN = 175MHz)

MAX12559 toc13

AIN (dBFS)

SNR, SINAD (dB)

-5-10-20 -15-45 -40 -35 -30 -25-50

20

25

30

35

40

45

50

55

60

65

70

75

15

-55 0

SNR

SINAD

-THD, SFDR vs. ANALOG INPUT AMPLITUDE
(f

CLK

= 96MHz, fIN = 175MHz)

MAX12559 toc14

AIN (dBFS)

-THD, SFDR (dBc)

-5-10-20 -15-45 -40 -35 -30 -25-50

35

40

45

50

55

60

65

70

75

80

85

90

30

-55 0

SFDR

-THD

69

67

75

73

71

77

30 5040 60 70 80 90 100

SNR, SINAD vs. CLOCK SPEED

(f

IN

= 70MHz, AIN = -1dBFS)

MAX12559 toc15

f

CLK

(MHz)

SNR, SINAD (dB)

SNR

SINAD

DIV4 = OV

DD

DIV2 = GND

60

75

70

65

90

85

80

95

30 50 6040 70 80 90 100

-THD, SFDR vs. CLOCK SPEED
(f

IN

= 70MHz, AIN = -1dBFS)

MAX12559 toc16

f

CLK

(MHz)

-THD, SFDR (dBc)

SFDR

-THD

DIV4 = OV

DD

DIV2 = GND

60

64

62

68

66

74

72

70

76

30 5040 60 70 80 90 100

SNR, SINAD vs. CLOCK SPEED

(f

IN

= 175MHz, AIN = -1dBFS)

MAX12559 toc17

f

CLK

(MHz)

SNR, SINAD (dB)

SNR

SINAD

DIV4 = OV

DD

DIV2 = GND

50

60

55

70

65

85

90

80

75

95

30 5040 60 70 80 90 100

-THD, SFDR vs. CLOCK SPEED
(f

IN

= 175MHz, AIN = -1dBFS)

MAX12559 toc18

f

CLK

(MHz)

-THD, SFDR (dBc)

SFDR

-THD

DIV4 = OV

DD

DIV2 = GND

67

69

71

73

75

77

3.1 3.2 3.3 3.4 3.5 3.6

SNR, SINAD vs. ANALOG SUPPLY VOLTAGE

(f

CLK

= 96MHz, fIN = 70MHz)

MAX12559 toc19

VDD (V)

SNR, SINAD (dB)

SNR

SINAD

40

60

50

80

70

90

100

3.1 3.33.2 3.4 3.5 3.6

-THD, SFDR vs. ANALOG SUPPLY VOLTAGE
(f

CLK

= 96MHz, fIN = 70MHz)

MAX12559 toc20

VDD (V)

-THD, SFDR (dBc)

SFDR

-THD

62

64

66

68

70

72

74

76

3.1 3.2 3.3 3.4 3.5 3.6

SNR, SINAD vs. ANALOG SUPPLY VOLTAGE

(f

CLK

= 96MHz, fIN = 175MHz)

MAX12559 toc21

VDD (V)

SNR, SINAD (dB)

SNR

SINAD