MAXIM MAX12558 Technical data

General Description

The MAX12558 is a dual, 3.3V, 14-bit analog-to-digital
converter (ADC) featuring fully differential wideband
track-and-hold (T/H) inputs, driving internal quantizers.
The MAX12558 is optimized for low power, small size,
and high dynamic performance in intermediate frequen­cy (IF) and baseband sampling applications. This dual
ADC operates from a single 3.3V supply, consuming
only 756mW while delivering a typical 71.7dB signal-to­noise ratio (SNR) performance at a 175MHz input fre­quency. The T/H input stages accept single-ended or
differential inputs up to 400MHz. In addition to low oper­ating power, the MAX12558 features a 330µW power­down mode to conserve power during idle periods.

A flexible reference structure allows the MAX12558 to
use the internal 2.048V bandgap reference or accept
an externally applied reference and allows the refer­ence to be shared between the two ADCs. The refer­ence structure allows the full-scale analog input range
to be adjusted from ±0.35V to ±1.15V. The MAX12558
provides a common-mode reference to simplify design
and reduce external component count in differential
analog input circuits.

The MAX12558 supports either a single-ended or differ­ential input clock. User-selectable divide-by-two (DIV2)
and divide-by-four (DIV4) modes allow for design flexibil­ity and help to reduce the negative effects of clock jitter.
Wide variations in the clock duty cycle are compensated
with the ADC’s internal duty-cycle equalizer (DCE).

The MAX12558 features two parallel, 14-bit-wide,
CMOS-compatible outputs. The digital output format is
pin-selectable to be either two’s complement or Gray
code. A separate power-supply input for the digital out­puts accepts a 1.7V to 3.6V voltage for flexible interfac­ing with various logic levels. The MAX12558 is available
in a 10mm x 10mm x 0.8mm, 68-pin thin QFN package
with exposed paddle (EP), and is specified for the
extended (-40°C to +85°C) temperature range.

For a 12-bit, pin-compatible version of this ADC, refer to
the MAX12528 data sheet. See the Selector Guide for
more selections.

Applications

IF and Baseband Communication Receivers

Cellular, LMDS, Point-to-Point Microwave,
MMDS, HFC, WLAN

I/Q Receivers

Ultrasound and Medical Imaging

Portable Instrumentation

Digital Set-Top Boxes

Low-Power Data Acquisition

Features

♦ Direct IF Sampling Up to 400MHz
♦ Excellent Dynamic Performance

74.4dB/71.7dB SNR at f

IN

= 70MHz/175MHz

84.2dBc/79dBc SFDR at f

IN

= 70MHz/175MHz

♦ 3.3V Low-Power Operation

789mW (Differential Clock Mode)
756mW (Single-Ended Clock Mode)

♦ Fully Differential or Single-Ended Analog Input
♦ Adjustable Differential Analog Input Voltage
♦ 750MHz Input Bandwidth
♦ Adjustable, Internal or External, Shared Reference
♦ Differential or Single-Ended Clock
♦ Accepts 25% to 75% Clock Duty Cycle
♦ User-Selectable DIV2 and DIV4 Clock Modes
♦ Power-Down Mode
♦ CMOS Outputs in Two’s Complement or Gray

Code

♦ Out-of-Range and Data-Valid Indicators
♦ Small, 68-Pin Thin QFN Package

(10mm x 10mm x 0.8mm)

♦ 12-Bit, Pin-Compatible Version Available

(MAX12528)

♦ Evaluation Kit Available (Order MAX12558EVKIT)

MAX12558

Dual, 80Msps, 14-Bit, IF/Baseband ADC

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-3842; Rev 0; 10/05

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

*EP = Exposed paddle.
+Denotes lead-free package.

**Future product—contact factory for availability.

PART

SAMPLING RATE

(Msps)

RESOLUTION

(Bits)

MAX12559** 95 14

MAX12558 80 14

MAX12557 65 14

MAX12529** 95 12

MAX12528 80 12

MAX12527 65 12

Selector Guide

Pin Configuration appears at end of data sheet.

PART TEMP RANGE PIN-PACKAGE

MAX12558ETK -40°C to +85°C 68 Thin QFN-EP* T6800-2
MAX12558ETK+ -40°C to +85°C 68 Thin QFN-EP* T6800-2

PKG

CODE

MAX12558

Dual, 80Msps, 14-Bit, IF/Baseband ADC

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 80MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VDDto GND ................................................................-0.3V to +3.6V

OV

DD

to GND............-0.3V to the lower of (VDD+ 0.3V) and +3.6V

INAP, INAN to GND ...-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

INBP, INBN to GND ...-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

CLKP, CLKN to

GND ........................-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

REFIN, REFOUT

to GND ..................-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

REFAP, REFAN,

COMA to GND ......-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

REFBP, REFBN,

COMB to GND ......-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

DIFFCLK/SECLK, G/T, PD, SHREF, DIV2,

DIV4 to GND .........-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

D0A–D13A, D0B–D13B, DAV,

DORA, DORB to GND..............................-0.3V to (OV

DD

+ 0.3V)

Continuous Power Dissipation (T

A

= +70°C)
68-Pin Thin QFN, 10mm x 10mm x 0.8mm

(derate 70mW/°C above +70°C) ....................................4000mW

Operating Temperature Range................................-40°C to +85°C

Junction Temperature ...........................................................+150°C

Storage Temperature Range .................................-65°C to +150°C

Lead Temperature (soldering 10s).......................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DC ACCURACY

Resolution 14 Bits

Integral Nonlinearity INL fIN = 3MHz ±1.4 LSB

Differential Nonlinearity DNL

Offset Error ±0.1 ±0.7 %FSR

Gain Error External reference, V

ANALOG INPUT (INAP, INAN, INBP, INBN)

Differential Input Voltage Range V

Common-Mode Input Voltage V

Analog Input Resistance R

Analog Input Capacitance

CONVERSION RATE

Maximum Clock Frequency f

Minimum Clock Frequency 5 MHz

Data Latency Figure 5 8

DYNAMIC CHARACTERISTICS

Small-Signal Noise Floor SSNF Input at -35dBFS 75.4 76.8 dBFS

Signal-to-Noise Ratio SNR

= 3MHz, no missing codes over

f

IN

temperature (Note 2)

DIFF

C

PAR

C

SAMPLE

CLK

Differential or single-ended inputs ±1.024 V

Each input, Figure 3 2.8 kΩ

IN

Fixed capacitance to ground,
each input, Figure 3

Switched capacitance,
each input, Figure 3

fIN = 3MHz 72.7 75.2

fIN = 40MHz 74.7

fIN = 70MHz 74.4

= 175MHz 69.9 71.7

f

IN

= 2.048V ±0.1 ±4.6 %FSR

REFIN

-1.0 ±0.6 +1.2 LSB

/ 2 V

DD

2

4.5

80 MHz

pF

Clock

Cycles

dB

MAX12558

Dual, 80Msps, 14-Bit, IF/Baseband ADC

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 80MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Signal-to-Noise Plus Distortion SINAD

Spurious-Free Dynamic Range SFDR

Total Harmonic Distortion THD

Second Harmonic HD2

Third Harmonic HD3

3rd-Order Intermodulation
Distortion IM3

Full-Power Bandwidth FPBW Input at -0.2dBFS, -3dB rolloff 750

Aperture Delay

Aperture Jitter t

Output Noise n

t

AD

AJ

OUT

fIN = 3MHz 71.1 74.8

fIN = 40MHz 73.5

fIN = 70MHz 73.7

f

= 175MHz 68.6 70.6

IN

fIN = 3MHz 73.8 86.9

fIN = 40MHz 81.9

fIN = 70MHz 84.2

= 175MHz 72.8 79

f

IN

fIN = 3MHz -85.3 -72.9

fIN = 40MHz -79.7

fIN = 70MHz -81.7

= 175MHz -77.1 -71.3

f

IN

fIN = 3MHz -87.3

fIN = 40MHz -84.8

fIN = 70MHz -86.7

f

= 175MHz -79.9

IN

fIN = 3MHz -91.4

fIN = 40MHz -81.9

fIN = 70MHz -84.3

f

= 175MHz -81.3

IN

f

= 68.5MHz at -7dBFS

IN1

= 71.5MHz at -7dBFS

f

IN2

= 172.5MHz at -7dBFS

f

IN1

= 177.5MHz at -7dBFS

f

IN2

Figure 5 1.2 ns

INAP = INAN = COMA
INBP = INBN = COMB

-86.5

-87.1

< 0.1

0.91 LSB

dBc

dBc

dBc

dBc

dBc

MHz

ps

dB

RMS

RMS

MAX12558

Dual, 80Msps, 14-Bit, IF/Baseband ADC

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 80MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Overdrive Recovery Time ±10% beyond full scale 1

INTERCHANNEL CHARACTERISTICS

Crosstalk Rejection

Gain Matching ±0.01 ±0.1 dB

Offset Matching ±0.01 %FSR

INTERNAL REFERENCE (REFOUT)

REFOUT Output Voltage V

REFOUT Load Regulation -1mA < I

REFOUT Temperature Coefficient TC

REFOUT Short-Circuit Current

BUFFERED REFERENCE MODE (REFIN is driven by REFOUT or an external 2.048V single-ended reference source;
V

REFAP/VREFAN/VCOMA

REFIN Input Voltage V

REFIN Input Resistance R

COM_ Output Voltage

REF_P Output Voltage

REF_N Output Voltage

Differential Reference Voltage

Differential Reference
Temperature Coefficient

UNBUFFERED EXTERNAL REFERENCE (REFIN = GND, V
externally, V

COMA

REF_P Input Voltage

REF_N Input Voltage

COM_ Input Voltage V

Differential Reference Voltage

REFOUT

REF

f

INA

f

INA

or f

or f

= 70MHz at -1dBFS 95

INB

= 175MHz at -1dBFS 87

INB

< +1mA 35 mV/mA

REFOUT

Short to VDD—sinking 0.24

Short to GND—sourcing 2.1

= V

and V

COMB

REFBP/VREFBN/VCOMB

REFIN

REFIN

V

COMA

V

COMB

V

REFAP

V

REFBP

V

REFAN

V

REFBN

V

REFA

V

REFB

TC

REF

= VDD / 2)

V

REFAP

V

REFBP

V

REFAN

V

REFBN

COM_

V

REFA

V

REFB

are generated internally)

V

= VDD / 2 1.60 1.65 1.70 V

COM_

V

= VDD / 2 + (V

REF_P

V

= VDD / 2 - (V

REF_N

V

= V

REF_

V

- V

REF_P

V

- V

REF_N

V

= VDD / 2 1.65 V

COM_

V

= V

REF_

- V

REF_P

COM_

COM_

REF_P

REF_N

REFAP/VREFAN/VCOMA

- V

REF_N

x 3/8) 2.418 V

REFIN

x 3/8) 0.882 V

REFIN

= V

REFIN

2.000 2.048 2.080 V

±50 ppm/°C

2.048 V

> 50 MΩ

1.456 1.536 1.595 V

±25 ppm/°C

and V

REFBP/VREFBN/VCOMB

are applied

+0.768 V

-0.768 V

x 3/4 1.536 V

Clock
Cycle

dB

mA

MAX12558

Dual, 80Msps, 14-Bit, IF/Baseband ADC

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 80MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

REF_P Sink Current

REF_N Source Current

COM_ Sink Current

REF_P, REF_N Capacitance

COM_ Capacitance C

CLOCK INPUTS (CLKP, CLKN)

Single-Ended Input High
Threshold
Single-Ended Input Low
Threshold

Minimum Differential Clock Input
Voltage Swing

Differential Input Common-Mode
Voltage

CLKP, CLKN Input Resistance R

CLKP, CLKN Input Capacitance C

DIGITAL INPUTS (DIFFCLK/SECLK, G/T, PD, DIV2, DIV4, SHREF)

Input High Threshold V

Input Low Threshold V

Input Leakage Current

Digital Input Capacitance C

DIGITAL OUTPUTS (D0A–D13A, D0B–D13B, DORA, DORB, DAV)

Output-Voltage Low V

Output-Voltage High V

Tri-State Leakage Current
(Note 3)

I

REFAP

I

REFBP

I

REFAN

I

REFBN

I

COMA

I

COMB

C

REF_P

C

REF_N

COM_

V

V

CLK

CLK

V

REF_P

V

REF_N

V

= 1.65V 0.85 mA

COM_

,

DIFFCLK/SECLK = GND, CLKN = GND

IH

DIFFCLK/SECLK = GND, CLKN = GND

IL

DIFFCLK/SECLK = OV

DIFFCLK/SECLK = OV

Each input, Figure 4 5 kΩ

IH

IL

= 2.418V 1.2 mA

= 0.882V 0.85 mA

DD

DD

OVDD applied to input ±5

Input connected to ground ±5

DIN

D0A–D13A, D0B–D13B, DORA, DORB:
I

= 200µA

OL

SINK

DAV: I

= 600µA 0.2

SINK

D0A–D13A, D0B–D13B, DORA, DORB:

OH

I

LEAK

I

DAV: I

OVDD applied to input ±5

Input connected to ground ±5

SOURCE

SOURCE

= 200µA

= 600µA

13 pF

6pF

0.8 x
V

DD

0.2 x
V

DD

0.2 V

V

/ 2 V

DD

2pF

0.8 x

OV

DD

0.2 x

OV

DD

5pF

0.2

-

OV

DD

0.2

OV

-

DD

0.2

V

V

P-P

V

V

µA

V

V

µA

MAX12558

Dual, 80Msps, 14-Bit, IF/Baseband ADC

6 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 80MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

D 0A–D 13A, D O RA,
D 0B–D 13B, and D O RB Tr i - S tate
O utp ut C ap aci tance ( N ote 3)

DAV Tri-State Output
Capacitance (Note 3)

POWER REQUIREMENTS

Analog Supply Voltage V

Digital Output Supply Voltage OV

Analog Supply Current I

Analog Power Dissipation P

Digital Output Supply Current I

C

OUT

C

DAV

DD

VDD

VDD

OVDD

DD

Normal operating mode
f

= 175MHz

IN

single-ended clock
(DIFFCLK/SECLK = GND)

Normal operating mode

= 175MHz

f

IN

differential clock
(DIFFCLK/SECLK = OV

Power-down mode (PD = OVDD)
clock idle

Normal operating mode
f

= 175MHz

IN

single-ended clock
(DIFFCLK/SECLK = GND)

Normal operating mode

= 175MHz

f

IN

differential clock
(DIFFCLK/SECLK = OV

Power-down mode (PD = OVDD)
clock idle

Normal operating mode

= 175MHz, C

f

IN

Power-down mode (PD = OVDD)
clock idle

)

DD

)

DD

L ≈ 10pF

3pF

6pF

3.15 3.30 3.60 V

1.70 2.0 V

229

239 273

0.1

756

789 900

0.33

22.6

0.004

DD

V

mA

mW

mA

MAX12558

Dual, 80Msps, 14-Bit, IF/Baseband ADC

_______________________________________________________________________________________ 7

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f

CLK

= 80MHz (50% duty cycle), TA=

-40°C to +85°C, unless otherwise noted. Typical values are at T

A

= +25°C.) (Note 1)

Note 1: Specifications ≥ +25°C guaranteed by production test, < +25°C guaranteed by design and characterization.
Note 2: Guaranteed by design and characterization. Device tested for performance during production test.
Note 3: During power-down, D0A–D13A, D0B–D13B, DORA, DORB, and DAV are high impedance.
Note 4: Data outputs settle to V

IH

or VIL.

Note 5: Guaranteed by design and characterization.

Typical Operating Characteristics

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 5pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, G/T = GND, f

CLK

= 80MHz (50% duty cycle), TA= +25°C, unless otherwise noted.)

FFT PLOT (32,768-POINT DATA RECORD)

MAX12558 toc01

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dBFS)

-100

-80

-60

-40

-20

0

-120

HD3

f

CLK

= 80MHz

f

IN

= 3.00883MHz

A

IN

= -1.013dBFS
SNR = 75.3dB
SINAD = 75.1dB
THD = -90.1dBc
SFDR = 91.8dBc
HD2 = -91.8dBc
HD3 = -102dBc

HD2

-10

-30

-50

-70

-90

-110

35

25 403015 201050

FFT PLOT (32,768-POINT DATA RECORD)

MAX12558 toc02

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dBFS)

-100

-80

-60

-40

-20

0

-120

HD3

f

CLK

= 80MHz

f

IN

= 39.50928MHz

A

IN

= -1.024dBFS
SNR = 74.4dB
SINAD = 73.5dB
THD = -80.8dBc
SFDR = 83.3dBc
HD2 = -85.5dBc
HD3 = -82.6dBc

HD2

-10

-30

-50

-70

-90

-110

35

25 403015 201050

FFT PLOT (32,768-POINT DATA RECORD)

MAX12558 toc03

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dBFS)

-100

-80

-60

-40

-20

0

-120

f

CLK

= 80MHz

f

IN

= 70.09846MHz

A

IN

= -1.03dBFS
SNR = 74.2dB
SINAD = 73.7dB
THD = -83.3dBc
SFDR = 85.8dBc
HD2 = -88.7dBc
HD3 = -85.8dBc

-10

-30

-50

-70

-90

-110

HD3

HD2

3525 403015 201050

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

TIMING CHARACTERISTICS (Figure 5)

Clock Pulse-Width High t

Clock Pulse-Width Low t

Data-Valid Delay t

Data Setup Time Before Rising
Edge of DAV

Data Hold Time After Rising Edge
of DAV

Wake-Up Time from Power-Down t

CH

CL

DAV

t

SETUP

t

HOLD

WAKE

(Note 4) 5.8 ns

(Notes 4, 5), OVDD = 1.8V 5.5 ns

(Notes 4, 5), OVDD = 1.8V 5.5 ns

V

= 2.048V 10 ms

REFIN

6.2 ns

6.2 ns

MAX12558

Dual, 80Msps, 14-Bit, IF/Baseband ADC

8 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 5pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, G/T = GND, f

CLK

= 80MHz (50% duty cycle), TA= +25°C, unless otherwise noted.)

FFT PLOT (32,768-POINT DATA RECORD)

0

-10

-20

-30

-40

-50

-60

-70

AMPLITUDE (dBFS)

-80

-90

-100

-110

-120

ANALOG INPUT FREQUENCY (MHz)

f

CLK

f

IN

A
SNR = 71.8dB
SINAD = 70.9dB
THD = -78.2dBc
SFDR = 79.4dBc
HD2 = -102.3dBc
HD3 = -79.4dBc

= 80MHz

= 174.97827MHz

= -1.093dBFS

IN

HD2

25 403015 201050

MAX12558 toc04

HD3

35

AMPLITUDE (dBFS)

TWO-TONE IMD PLOT

-20

-40

-60

-80

-100

-120

(32,768-POINT DATA RECORD)

0

f

f

IN1

f

- f

IN2

IN2

IN1

f

+ f

IN1

ANALOG INPUT FREQUENCY (MHz)

f

= 80MHz

CLK

= 68.50117MHz

f

IN1

= 71.49933MHz

f

IN2

= A

A

IN1

IM3 = -94.7dBc

IN2

2f

IN2

IN2

+ f

= -7dBFS

2f

IN1

IN1

MAX12558 toc05

+ f

IN2

AMPLITUDE (dBFS)

-100

3525 3015 201050

-120

(32,768-POINT DATA RECORD)

0

-20

f

IN2

-40

-60

-80

f

f

- f

IN2

IN1

2f

IN1

ANALOG INPUT FREQUENCY (MHz)

TWO-TONE IMD PLOT

f

= 80MHz

CLK

= 172.499299MHz

f

IN1

= 177.499492MHz

f

IN2

= A

A

IN1

- f

IN2

IN1

IM3 = -87.5dBc

2f

- f

IN2

IN1

IN2

= -7dBFS

3525 3015 201050

MAX12558 toc06

INTEGRAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

2.0

1.6

1.2

0.8

0.4

0

INL (LSB)

-0.4

-0.8

-1.2

-1.6

-2.0
0 4096 61442048 8192

DIGITAL OUTPUT CODE

10,240 12,288 14,336 16,384

-THD, SFDR vs. ANALOG INPUT FREQUENCY
= 80MHz, AIN = -1dBFS)

(f

95

90

85

80

75

70

-THD, SFDR (dBc)
65

60

55

50

CLK

SFDR

-THD

0 150 20050 100 250 300 350 400

fIN (MHz)

MAX12558 toc07

MAX12558 toc10

DIFFERENTIAL NONLINEARITY

1.00

0.75

0.50

0.25

DNL (LSB)

-0.25

-0.50

-0.75

-1.00

vs. DIGITAL OUTPUT CODE

0

0 4096 61442048 8192

DIGITAL OUTPUT CODE

10,240 12,288 14,336 16,384

SNR, SINAD vs. ANALOG INPUT AMPLITUDE

= 80MHz, fIN = 70MHz)

(f

80

70

60

50

40

SNR, SINAD (dB)

30

20

10

CLK

SNR

SINAD

-60 0

AIN (dBFS)

SNR, SINAD vs. ANALOG INPUT FREQUENCY

= 80MHz, AIN = -1dBFS)

(f

CLK

SNR

SINAD

0 100 15050 200 250 300 350 400

fIN (MHz)

MAX12558 toc09

MAX12558 toc08

80

75

70

65

60

55

SNR, SINAD (dB)

50

45

40

-THD, SFDR vs. ANALOG INPUT AMPLITUDE
= 80MHz, fIN = 70MHz)

(f

95

85

MAX12558 toc11

75

65

-THD, SFDR (dBc)
55

45

-5-10-15-20-25-30-35-40-45-50-55

35

CLK

AIN (dBFS)

SFDR

MAX12558 toc12

-THD

-5-10-15-20-25-30-35-40-45-50-55-60 0

MAX12558

Dual, 80Msps, 14-Bit, IF/Baseband ADC

_______________________________________________________________________________________ 9

Typical Operating Characteristics (continued)

(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 5pF at digital outputs, VIN= -1dBFS (differential),
DIFFCLK/SECLK = OV

DD

, PD = GND, G/T = GND, f

CLK

= 80MHz (50% duty cycle), TA= +25°C, unless otherwise noted.)

SNR, SINAD vs. ANALOG INPUT AMPLITUDE

= 80MHz, fIN = 175MHz)

(f

75

65

55

45

SNR, SINAD (dB)

35

25

15

CLK

AIN (dBFS)

-THD, SFDR vs. CLOCK SPEED
= 70MHz, AIN = -1dBFS)

(f

100

95

90

85

80

75

70

-THD, SFDR (dBc)
65

60

55

50

IN

SFDR

-THD

30 80

f

(MHz)

CLK

SNR

MAX12558 toc13

SINAD

-5-10-15-20-25-30-35-40-45-50-55-60 0

MAX12558 toc16

70605040

-THD, SFDR vs. ANALOG INPUT AMPLITUDE
= 80MHz, fIN = 175MHz)

(f

95

85

75

65

-THD, SFDR (dBc)
55

45

35

CLK

SFDR

-55 -45 -40 -35-50 -30 -25 -20 -15 -10 -5 0
AIN (dBFS)

SNR, SINAD vs. CLOCK SPEED

= 175MHz, AIN = -1dBFS)

(f

80

75

70

65

SNR, SINAD (dB)

60

55

50

IN

SNR

SINAD

30 80

f

(MHz)

CLK

70605040

MAX12558 toc14

-THD

SNR, SINAD (dB)

MAX12558 toc17

-THD, SFDR (dBc)

SNR, SINAD vs. CLOCK SPEED

(f

80

76

72

68

64

60

-THD, SFDR vs. CLOCK SPEED
(f

90

85

80

75

70

65

60

55

50

30 5040 60 70 80

= 70MHz, AIN = -1dBFS)

IN

SNR

SINAD

f

(MHz)

CLK

= 175MHz, AIN = -1dBFS)

IN

SFDR

-THD

f

(MHz)

CLK

7060504030 80

MAX12558 toc15

MAX12558 toc18

SNR, SINAD vs. ANALOG SUPPLY VOLTAGE

= 80MHz, fIN = 70MHz)

(f

80

75

70

65

SNR, SINAD (dB)

60

55

50

CLK

SNR

SINAD

3.0 3.23.1 3.3 3.4 3.5 3.6
VDD (V)

MAX12558 toc19

-THD, SFDR vs. ANALOG SUPPLY VOLTAGE
= 80MHz, fIN = 70MHz)

(f

95

90

85

80

75

70

-THD, SFDR (dBc)

65

60

55

CLK

SFDR

-THD

3.0 3.2 3.33.1 3.4 3.5 3.6
VDD (V)

MAX12558 toc20

SNR, SINAD vs. ANALOG SUPPLY VOLTAGE

= 80MHz, fIN = 175MHz)

(f

75

70

65

60

SNR, SINAD (dB)

55

50

CLK

SNR

SINAD

3.0 3.23.1 3.3 3.4 3.5 3.6
VDD (V)

MAX12558 toc21