MAXIM MAX12554 Technical data

General Description
The MAX12554 is a 3.3V, 14-bit, 80Msps analog-to-digi­tal converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts sin­gle-ended or differential signals. The MAX12554 is opti­mized for high dynamic performance, low power, and small size. Excellent dynamic performance is maintained from baseband to input frequencies of 175MHz and beyond, making the MAX12554 ideal for intermediate­frequency (IF) sampling applications.
Powered from a single 3.3V supply, the MAX12554 con­sumes only 429mW while delivering a typical 70.9dB signal-to-noise ratio (SNR) performance at a 175MHz input frequency. In addition to low operating power, the MAX12554 features a 300µW power-down mode to conserve power during idle periods.
A flexible reference structure allows the MAX12554 to use the internal 2.048V bandgap reference or accept an externally applied reference. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.10V. The MAX12554 provides a com­mon-mode reference to simplify design and reduce exter­nal component count in differential analog input circuits.
The MAX12554 supports either a single-ended or differ­ential input clock. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty­cycle equalizer (DCE).
ADC conversion results are available through a 14-bit, parallel, CMOS-compatible output bus. The digital out­put format is pin selectable to be either two’s comple­ment or Gray code. A data-valid indicator eliminates external components that are normally required for reli­able digital interfacing. A separate digital power input accepts a wide 1.7V to 3.6V supply, allowing the MAX12554 to interface with various logic levels.
The MAX12554 is available in a 6mm x 6mm x 0.8mm, 40-pin thin QFN package with exposed paddle (EP), and is specified for the extended industrial (-40°C to +85°C) temperature range.
See the Pin-Compatible Versions table for a complete family of 14-bit and 12-bit high-speed ADCs.
Applications
IF and Baseband Communication Receivers
Cellular, Point-to-Point Microwave, HFC, WLAN
Medical Imaging Including Positron Emission
Tomography (PET)
Video Imaging
Portable Instrumentation
Low-Power Data Acquisition
Features
Direct IF Sampling Up to 400MHz
Excellent Dynamic Performance
72.4dB/70.9dB SNR at fIN= 3MHz/175MHz
86.2dBc/82.5dBc SFDR at fIN= 3MHz/175MHz
Low Noise Floor: -74.8dBFS
3.3V Low-Power Operation
396mW (Single-Ended Clock Mode) 429mW (Differential Clock Mode) 300µW (Power-Down Mode)
Fully Differential or Single-Ended Analog Input
Adjustable Full-Scale Analog Input Range
±0.35V to ±1.10V
Common-Mode Reference
CMOS-Compatible Outputs in Two’s Complement
or Gray Code
Data-Valid Indicator Simplifies Digital Interface
Data Out-of-Range Indicator
Miniature, 6mm x 6mm x 0.8mm 40-Pin Thin QFN
Package with Exposed Paddle
Evaluation Kit Available (Order MAX12555EVKIT)
MAX12554
14-Bit, 80Msps, 3.3V ADC
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-3440; Rev 0; 10/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
PART* PIN-PACKAGE PKG CODE
MAX12554ETL 40 Thin QFN T4066-3
MAX12554ETL+ 40 Thin QFN T4066-3
Pin-Compatible Versions
PART
SAMPLING
RATE
(Msps)
RESOLUTION
(BITS)
TARGET
APPLICATION
MAX12555
95 14
IF/Baseband
MAX12554
80 14
IF/Baseband
MAX12553
65 14
IF/Baseband
MAX19538
95 12
IF/Baseband
MAX1209
80 12 IF
MAX1211
65 12 IF
MAX1208
80 12 Baseband
MAX1207
65 12 Baseband
MAX1206
40 12 Baseband
Pin Configuration appears at end of data sheet.
+Denotes lead-free package. *All devices specified over the -40°C to +85°C operating range.
MAX12554
14-Bit, 80Msps, 3.3V ADC
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/
T = low, f
CLK
= 80MHz (50% duty cycle, 1.4V
P-P
square wave), TA = -40°C to +85°C, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND...........................................................-0.3V to +3.6V
OV
DD
to GND........-0.3V to the lower of (VDD+ 0.3V) and +3.6V
INP, INN to GND ...-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
REFIN, REFOUT, REFP, REFN, COM
to GND................-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
CLKP, CLKN, CLKTYP, G/T, DCE,
PD to GND ........-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
D13–D0, DAV, DOR to GND....................-0.3V to (OV
DD
+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
40-Pin Thin QFN 6mm x 6mm x 0.8mm
(derated 26.3mW/°C above +70°C)........................2105.3mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering 10s) ..................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY (Note 2)
Resolution 14 Bits
Integral Nonlinearity INL fIN = 3MHz (Note 3)
LSB
Differential Nonlinearity DNL
f
IN
= 3MHz, no missing codes over
temperature (Note 4)
-1
LSB
Offset Error V
REFIN
= 2.048V
%FS
Gain Error V
REFIN
= 2.048V
%FS
ANALOG INPUT (INP, INN)
Differential Input Voltage Range V
DIFF
Differential or single-ended inputs
V
Common-Mode Input Voltage
V
C
PAR
Fixed capacitance to ground 2
Input Capacitance (Figure 3)
Switched capacitance 4.5
pF
CONVERSION RATE
Maximum Clock Frequency f
CLK
80
MHz
Minimum Clock Frequency 5
MHz
Data Latency Figure 6 8.0
Clock
cycles
DYNAMIC CHARACTERISTICS (Differential Inputs) (Note 2)
Small-Signal Noise Floor SSNF Input at less than -35dBFS
dBFS
fIN = 3MHz at -0.5dBFS (Note 5)
72.4
fIN = 40MHz at -0.5dBFS 72.0
fIN = 70MHz at -0.5dBFS 71.9
Signal-to-Noise Ratio SNR
f
IN
= 175MHz at -0.5dBFS (Note 5)
70.9
dB
fIN = 3MHz at -0.5dBFS (Note 5)
72.1
fIN = 40MHz at -0.5dBFS 71.7
fIN = 70MHz at -0.5dBFS 71.6
Signal-to-Noise and Distortion SINAD
f
IN
= 175MHz at -0.5dBFS (Note 5)
70.3
dB
±2.4 ±4.9
±0.5 +1.3
±0.1 ±0.72
C
SAMPLE
69.0
68.0
68.9
66.2
±0.5 ±4.9
±1.024
V
/ 2
DD
-74.8
MAX12554
14-Bit, 80Msps, 3.3V ADC
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle, 1.4V
P-P
square wave), TA = -40°C to +85°C, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
fIN = 3MHz at -0.5dBFS (Note 5)
86.2
fIN = 40MHz at -0.5dBFS 84.6
fIN = 70MHz at -0.5dBFS 85.4
Spurious-Free Dynamic Range SFDR
f
IN
= 175MHz at -0.5dBFS (Note 5)
82.5
dBc
fIN = 3MHz at -0.5dBFS
fIN = 40MHz at -0.5dBFS
fIN = 70MHz at -0.5dBFS
Total Harmonic Distortion THD
f
IN
= 175MHz at -0.5dBFS
dBc
fIN = 3MHz at -0.5dBFS -91
fIN = 40MHz at -0.5dBFS -91
fIN = 70MHz at -0.5dBFS -86
Second Harmonic HD2
f
IN
= 175MHz at -0.5dBFS -85
dBc
fIN = 3MHz at -0.5dBFS -89
fIN = 40MHz at -0.5dBFS -85
fIN = 70MHz at -0.5dBFS -88
Third Harmonic HD3
f
IN
= 175MHz at -0.5dBFS -85
dBc
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
-83
Intermodulation Distortion IMD
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
-80
dBc
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
-87
Third-Order Intermodulation IM3
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
-84
dBc
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
84
Two-Tone Spurious-Free Dynamic Range
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
80
dBc
Aperture Delay t
AD
Figure 4 1.2 ns
Aperture Jitter t
AJ
Figure 4 <0.2
Output Noise n
OUT
INP = INN = COM 1.05
Overdrive Recovery Time ±10% beyond full scale 1
Clock
SFDR
TT
76.5
69.0
-84.8 -75.9
-84.0
-82.6
-79.4 -69.0
ps
RMS
LSB
cycles
RMS
MAX12554
14-Bit, 80Msps, 3.3V ADC
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle, 1.4V
P-P
square wave), TA = -40°C to +85°C, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
CONDITIONS
UNITS
INTERNAL REFERENCE (REFIN = REFOUT; V
R EF P
, V
R EF N
, and V
C OM
are generated internally)
REFOUT Output Voltage
V
COM Output Voltage V
COM
V
DD
/ 2
V
Differential-Reference Output Voltage
V
REF
V
REF
= V
REFP
- V
REFN
= V
REFIN
x 3/4
V
REFOUT Load Regulation -1.0mA < I
REFOUT
< +0.1mA 35
mV/mA
REFOUT Temperature Coefficient
TC
REF
ppm/°C
Short to VDD—sinking
REFOUT Short-Circuit Current
Short to GND—sourcing 2.1
mA
B U F F ER ED EXT ER N A L R EF ER EN C E ( R EF IN d r iv e n e x t e r n a lly ; V
R EF IN
= 2.0 4 8 V, V
R EF P
, V
R EF N
, a n d V
C OM
a r e g e n e r a t e d in t e r n a lly )
REFIN Input Voltage V
REFIN
V
REFP Output Voltage V
REFP
(V
DD
/ 2) + (V
REFIN
x 3/8)
V
REFN Output Voltage V
REFN
(V
DD
/ 2) - (V
REFIN
x 3/8)
V
COM Output Voltage V
COM
V
DD
/ 2
V
Differential-Reference Output Voltage
V
REF
V
REF
= V
REFP
- V
REFN
= V
REFIN
x 3/4
V
Differential-Reference Temperature Coefficient
ppm/°C
REFIN Input Resistance
M
UNBUFFERED EXTERNAL REFERENCE (REFIN = GND; V
REFP
, V
REFN
, and V
COM
are applied externally)
COM Input Voltage V
COM
VDD/2
V
REFP Input Voltage V
REFP
- V
COM
V
REFN Input Voltage V
REFN
- V
COM
V
Differential-Reference Input Voltage
V
REF
V
REF
= V
REFP
- V
REFN
= V
REFIN
x 3/4
V
REFP Sink Current I
REFP
V
REFP
= 2.418V 1.2 mA
REFN Source Current I
REFN
V
REFN
= 0.882V
mA
COM Sink Current I
COM
V
COM
= 1.650V
mA
REFP, REFN Capacitance 13 pF
COM Capacitance 6pF
CLOCK INPUTS (CLKP, CLKN)
Single-Ended Input High Threshold
V
IH
CLKTYP = GND, CLKN = GND
0.8 x V
Single-Ended Input Low Threshold
V
IL
CLKTYP = GND, CLKN = GND
0.2 x V
Minimum Differential Input Voltage Swing
CLKTYP = high 0.2 V
P-P
SYMBOL
MIN TYP MAX
V
REFOUT
1.979 2.048 2.068
1.65
1.60 1.65 1.70
1.462 1.595
1.536
+50
0.24
2.048
2.418
0.882
±25
>50
1.65
0.768
-0.768
1.536
V
DD
0.85
0.85
V
DD
MAX12554
14-Bit, 80Msps, 3.3V ADC
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle, 1.4V
P-P
square wave), TA = -40°C to +85°C, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
CONDITIONS
UNITS
Differential Input Common-Mode Voltage
CLKTYP = high
V
Input Resistance R
CLK
Figure 5 5 k
Input Capacitance C
CLK
2pF
DIGITAL INPUTS (CLKTYP, G/TTTT, PD)
Input High Threshold V
IH
0.8 x V
Input Low Threshold V
IL
0.2 x V
VIH = OV
DD
±5
Input Leakage Current
V
IL
= 0 ±5
µA
Input Capacitance C
DIN
5pF
DIGITAL OUTPUTS (D13–D0, DAV, DOR)
D13–D0, DOR, I
SINK
= 200µA 0.2
Output-Voltage Low V
OL
DAV, I
SINK
= 600µA 0.2
V
D13–D0, DOR, I
SOURCE
= 200µA
0.2
Output-Voltage High V
OH
DAV, I
SOURCE
= 600µA
OV
DD
-
0.2
V
Tri-State Leakage Current I
LEAK
(Note 6) ±5 µA
D13–D0, DOR Tri-State Output Capacitance
C
OUT
(Note 6) 3 pF
D AV Tr i - S tate O utp ut C ap aci tance
C
DAV
(Note 6) 6 pF
POWER REQUIREMENTS
Analog Supply Voltage V
DD
3.3
V
Digital Output Supply Voltage OV
DD
1.7 1.8
V
Normal operating mode, f
IN
= 175MHz at -0.5dBFS,
CLKTYP = GND, single-ended clock
Normal operating mode, f
IN
= 175MHz at -0.5dBFS,
CLKTYP = OV
DD,
differential clock
145
Analog Supply Current I
VDD
Power-down mode clock idle, PD = OV
DD
0.1
mA
MIN TYP MAX
V
/ 2
DD
OV
DD
SYMBOL
OVDD -
OV
DD
3.15
120
130
3.60
VDD +
0.3V
MAX12554
14-Bit, 80Msps, 3.3V ADC
6 _______________________________________________________________________________________
Note 1: Specifications +25°C guaranteed by production test; <+25°C guaranteed by design and characterization. Note 2: See definitions in the Parameter Definitions section at the end of this data sheet. Note 3: Guaranteed by design and characterization. Note 4: Specifications guaranteed by design and characterization. Devices tested to ensure no missing codes during production
test.
Note 5: Due to test-equipment-jitter limitations at 175MHz, 0.15% of the spectrum on each side of the fundamental is excluded from
the spectral analysis.
Note 6: During power-down, D13–D0, DOR, and DAV are high impedance. Note 7: Digital outputs settle to V
IH
or VIL.
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle, 1.4V
P-P
square wave), TA = -40°C to +85°C, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
CONDITIONS
UNITS
Normal operating mode, f
IN
= 175MHz at -0.5dBFS,
CLKTYP = GND, single-ended clock
Normal operating mode, f
IN
= 175MHz at -0.5dBFS,
CLKTYP = OV
DD
, differential clock
Analog Power Dissipation P
DISS
Power-down mode clock idle, PD = OV
DD
0.3
mW
Normal operating mode, f
IN
= 175MHz at -0.5dBFS,
OV
DD
= 1.8V, CL 5pF
8.6 mA
Digital Output Supply Current I
OVDD
Power-down mode clock idle, PD = OV
DD
A
TIMING CHARACTERISTICS (Figure 6)
Clock Pulse-Width High t
CH
6.2 ns
Clock Pulse-Width Low t
CL
6.2 ns
Data-Valid Delay t
DAV
CL = 5pF (Note 7) 5.2 ns
Data Setup Time Before Rising Edge of DAV
t
SETUP
CL = 5pF (Note 3, Note 7) 5.5 ns
Data Hold Time After Rising Edge of DAV
t
HOLD
CL = 5pF (Note 3, Note 7) 5.5 ns
Wake-Up Time from Power-Down
t
WAKE
V
REFIN
= 2.048V 10 ms
SYMBOL
MIN TYP MAX
396
429 479
MAX12554
14-Bit, 80Msps, 3.3V ADC
_______________________________________________________________________________________ 7
-110
-100
-20
-80
-90
-70
-60
-40
-10
-50
-30
0
0101520525303540
SINGLE-TONE FFT PLOT
(8192-POINT DATA RECORD)
FREQUENCY (MHz)
AMPLITUDE (dBFS)
MAX12554toc02
f
CLK
= 80MHz
f
IN
= 39.89257813MHz
A
IN
= -0.4dBFS SNR = 73.00dB SINAD = 72.02dB THD = -78.9dBc SFDR = 79.6dBc
HD3
-110
-100
-20
-80
-90
-70
-60
-40
-10
-50
-30
0
0101520525303540
SINGLE-TONE FFT PLOT
(8192-POINT DATA RECORD)
AMPLITUDE (dBFS)
MAX12554toc03
f
CLK
= 80MHz
f
IN
= 69.87304688MHz
A
IN
= -0.6dBFS SNR = 72.65dB SINAD = 72.23dB THD = -82.6dBc SFDR = 84.6dBc
HD3
HD2
-3
-1
-2
1
0
2
3
081924096 12288 16384
INTEGRAL NONLINEARITY
MAX12554toc08
DIGITAL OUTPUT CODE
INL (LSB)
-1.0
-0.4
-0.8
0.4
0
0.8
-0.6
0.2
-0.2
0.6
1.0
0 81924096 12288 16384
DIFFERENTIAL NONLINEARITY
MAX12554toc09
DIGITAL OUTPUT CODE
DNL (LSB)
Typical Operating Characteristics
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
80MHz (50% duty cycle, 1.4V
P-P
square wave), TA = +25°C, unless otherwise noted.)
0
-10
-20
-30
-40
-50
-60
-70
AMPLITUDE (dBFS)
-80
-90
-100
-110
0
-10
-20
-30
-40
-50
-60
-70
AMPLITUDE (dBFS)
-80
-90
-100
-110
SINGLE-TONE FFT PLOT
(8192-POINT DATA RECORD)
f
= 80MHz
CLK
= 2.99804688MHz
f
IN
= -0.5dBFS
HD2
HD3
A
IN
SNR = 73.49dB SINAD = 73.26dB THD = -86.2dBc SFDR = 89.2dBc
MAX12554toc01
0101520525303540
FREQUENCY (MHz)
SINGLE-TONE FFT PLOT
(8192-POINT DATA RECORD)
f
= 80MHz
CLK
= 175.1074219MHz
f
IN
= -0.5dBFS
A
HD5
IN
SNR = 71.17dB SINAD = 70.50dB THD = -78.9dBc SFDR = 80.7dBc
HD2
MAX12554toc04
HD3
0101520525303540
FREQUENCY (MHz)
0
-10
-20
-30
-40
-50
-60
-70
AMPLITUDE (dBFS)
-80
-90
-100
-110 0101520525303540
SINGLE-TONE FFT PLOT
(8192-POINT DATA RECORD)
f
= 80MHz
CLK
= 225.1074219MHz
f
IN
= -0.5dBFS
A
IN
SNR = 70.37dB SINAD = 69.83dB THD = -79.2dBc SFDR = 83.6dBc
HD3HD2HD5
FREQUENCY (MHz)
MAX12554toc05
TWO-TONE FFT PLOT
(16,384-POINT DATA RECORD)
0
-10
-20
f
IN2
-30
-40
-50
-60
-70
AMPLITUDE (dBFS)
-80
-90
-100
-110 0101520525303540
f
= 80MHz
CLK
= 68.49121MHz
f
IN1
f
IN1
= -7.0dBFS
A
IN1
= 71.48926MHz
f
IN2
= -7.0dBFS
A
IN2
= 84.6dBc
SFDR
TT
IMD = -81.5dBc IM3 = -82.5dBc
2 x f
- f
IN2
IN1
2 x f
- f
IN1
IN2
f
+ f
IN1
IN2
FREQUENCY (MHz)
2 x f
IN2
2 x f
MAX12554toc06
+ f
IN1
+ f
IN1
IN2
TWO-TONE FFT PLOT
(16,384-POINT DATA RECORD)
0
-10 f
-20
IN1
-30
f
-40
-50
-60
-70
AMPLITUDE (dBFS)
-80
-90
-100
-110
IN2
0101520525303540
f
= 80.0017MHz
CLK
= 172.4695MHz
f
IN1
= -7.0dBFS
A
IN1
= 177.4696MHz
f
IN2
= -7.0dBFS
A
IN2
SFDR
TT
IMD = -80.7dBc IM3 = -95.3dBc
3 x f
+ 2 x f
IN1
FREQUENCY (MHz)
= 80.3dBc
IN2
f
+ f
IN1
IN2
MAX12554toc07
MAX12554
14-Bit, 80Msps, 3.3V ADC
8 _______________________________________________________________________________________
60
62
64
66
68
70
72
74
76
25 45 65 85 105 125
SNR, SINAD
vs. SAMPLING RATE
MAX12554 toc10
f
CLK
(MHz)
SNR, SINAD (dB)
fIN = 70MHz
SNR SINAD
60
65
70
75
80
85
90
95
100
25 45 65 85 105 125
SFDR, -THD
vs. SAMPLING RATE
MAX12554 toc11
f
CLK
(MHz)
SFDR, -THD (dBc)
fIN = 70MHz
SFDR
-THD
200
250
300
350
400
450
500
550
600
25 45 65 85 105 125
POWER DISSIPATION
vs. SAMPLING RATE
MAX12554 toc12
f
CLK
(MHz)
POWER DISSIPATION (mW)
DIFFERENTIAL CLOCK f
IN
= 70MHz
C
L
5pF
ANALOG + DIGITAL POWER ANALOG POWER
60
62
64
66
68
70
72
74
76
25 45 65 85 105 125
SNR, SINAD
vs. SAMPLING RATE
MAX12554toc13
f
CLK
(MHz)
SNR, SINAD (dB)
fIN = 175MHz
SNR SINAD
60
65
70
75
80
85
90
95
100
25 45 65 85 105 125
SFDR, -THD
vs. SAMPLING RATE
MAX12554toc14
f
CLK
(MHz)
SFDR, -THD (dBc)
fIN = 175MHz
SFDR
-THD
200
250
300
350
400
450
500
550
600
25 45 65 85 105 125
POWER DISSIPATION
vs. SAMPLING RATE
MAX12554toc15
f
CLK
(MHz)
POWER DISSIPATION (mW)
DIFFERENTIAL CLOCK f
IN
= 175MHz
C
L
5pF
ANALOG + DIGITAL POWER ANALOG POWER
60
62
64
66
68
70
72
74
76
0 100 200 30050 150 250 350 400
SNR, SINAD
vs. ANALOG INPUT FREQUENCY
MAX12554toc16
ANALOG INPUT FREQUENCY (MHz)
SNR, SINAD (dB)
SNR SINAD
60
65
70
75
80
85
90
95
100
050 150 250100 200 300 350 400
SFDR, -THD
vs. ANALOG INPUT FREQUENCY
MAX12554toc17
ANALOG INPUT FREQUENCY (MHz)
SFDR, -THD (dBc)
SFDR
-THD
200
250
300
350
400
450
500
550
600
050 150 250100 200 300 350 400
POWER DISSIPATION
vs. ANALOG INPUT FREQUENCY
MAX12554toc18
ANALOG INPUT FREQUENCY (MHz)
POWER DISSIPATION (mW)
DIFFERENTIAL CLOCK C
L
5pF
ANALOG + DIGITAL POWER ANALOG POWER
Typical Operating Characteristics (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
80MHz (50% duty cycle, 1.4V
P-P
square wave), TA = +25°C, unless otherwise noted.)
MAX12554
14-Bit, 80Msps, 3.3V ADC
_______________________________________________________________________________________ 9
26
31
36
41
46
51
61
71
56
66
76
-40 -30 -20 -10-35 -25 -15 -5 0
SNR, SINAD
vs. ANALOG INPUT AMPLITUDE
MAX12554toc19
ANALOG INPUT AMPLITUDE (dBFS)
SNR, SINAD (dB)
SNR SINAD
fIN = 175MHz
50
55
60
65
70
75
80
85
90
-40 -35 -25 -15-30 -20 -10 -5 0
SFDR, -THD
vs. ANALOG INPUT AMPLITUDE
MAX12554toc20
ANALOG INPUT AMPLITUDE (dBFS)
SFDR, -THD (dBc)
SFDR
-THD
fIN = 175MHz
200
250
300
350
400
450
500
550
600
-40 -35 -25 -15-30 -20 -10 -5 0
POWER DISSIPATION
vs. ANALOG INPUT AMPLITUDE
MAX12554toc21
ANALOG INPUT AMPLITUDE (dBFS)
POWER DISSIPATION (mW)
DIFFERENTIAL CLOCK f
IN
= 175MHz
C
L
5pF
ANALOG + DIGITAL POWER ANALOG POWER
60
62
64
66
68
70
74
72
76
2.8 3.0 3.2 3.4 3.6
SNR, SINAD
vs. ANALOG SUPPLY VOLTAGE
MAX12554toc22
AVDD (V)
SNR, SINAD (dB)
SNR SINAD
fIN = 175MHz
60
65
70
75
80
85
95
90
100
2.8 3.0 3.2 3.4 3.6
SFDR, -THD
vs. ANALOG SUPPLY VOLTAGE
MAX12554toc23
AVDD (V)
SFDR, -THD (dBc)
SFDR
-THD
fIN = 175MHz
200
250
300
350
400
450
550
500
600
2.8 3.0 3.2 3.4 3.6
POWER DISSIPATION
vs. ANALOG SUPPLY VOLTAGE
MAX12554toc24
AVDD (V)
POWER DISSIPATION (mW)
DIFFERENTIAL CLOCK f
IN
= 175MHz
C
L
5pF
ANALOG + DIGITAL POWER ANALOG POWER
60
62
64
66
68
70
74
72
76
1.4 2.2 3.01.8 2.6 3.4 3.8
SNR, SINAD
vs. DIGITAL SUPPLY VOLTAGE
MAX12554toc25
OVDD (V)
SNR, SINAD (dB)
SNR SINAD
fIN = 175MHz
60
65
70
75
80
85
95
90
100
1.4 2.2 3.01.8 2.6 3.4 3.8
SFDR, -THD
vs. DIGITAL SUPPLY VOLTAGE
MAX12554toc26
OVDD (V)
SFDR, -THD (dBc)
SFDR
-THD
fIN = 175MHz
200
250
300
350
400
450
550
500
600
1.4 2.2 3.01.8 2.6 3.4 3.8
POWER DISSIPATION
vs. DIGITAL SUPPLY VOLTAGE
MAX12554toc27
OVDD (V)
POWER DISSIPATION (mW)
DIFFERENTIAL CLOCK f
IN
= 175MHz
C
L
5pF
ANALOG + DIGITAL POWER ANALOG POWER
Typical Operating Characteristics (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
80MHz (50% duty cycle, 1.4V
P-P
square wave), TA = +25°C, unless otherwise noted.)
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