MAXIM MAX12553 User Manual

General Description

The MAX12553 is a 3.3V, 14-bit, 65Msps analog-to-digital
converter (ADC) featuring a fully differential wideband
track-and-hold (T/H) input amplifier, driving a low-noise
internal quantizer. The analog input stage accepts single­ended or differential signals. The MAX12553 is optimized
for low-power, small size, and high dynamic perfor­mance. Excellent dynamic performance is maintained
from baseband to input frequencies of 175MHz and
beyond, making the MAX12553 ideal for intermediate­frequency (IF) sampling applications.

Powered from a single 3.15V to 3.60V supply, the
MAX12553 consumes only 363mW while delivering a
typical signal-to-noise (SNR) performance of 71dB at
an input frequency of 175MHz. In addition to low oper­ating power, the MAX12553 features a 150µW power­down mode to conserve power during idle periods.

A flexible reference structure allows the MAX12553 to use
the internal 2.048V bandgap reference or accept an
externally applied reference. The reference structure
allows the full-scale analog input range to be adjusted
from ±0.35V to ±1.10V. The MAX12553 provides a com­mon-mode reference to simplify design and reduce exter­nal component count in differential analog input circuits.

The MAX12553 supports both a single-ended and dif­ferential input clock drive. Wide variations in the clock
duty cycle are compensated with the ADC’s internal
duty-cycle equalizer (DCE).

ADC conversion results are available through a 14-bit,
parallel, CMOS-compatible output bus. The digital out­put format is pin selectable to be either two’s comple­ment or Gray code. A data-valid indicator eliminates
external components that are normally required for reli­able digital interfacing. A separate digital power input
accepts a wide 1.7V to 3.6V supply, allowing the
MAX12553 to interface with various logic levels.

The MAX12553 is available in a 6mm x 6mm x 0.8mm,
40-pin thin QFN package with exposed paddle (EP),
and is specified for the extended industrial (-40°C to
+85°C) temperature range.

See the Pin-Compatible Versions table for a complete

family of 14-bit and 12-bit high-speed ADCs.

Applications

IF and Baseband Communication Receivers

Cellular, Point-to-Point Microwave, HFC, WLAN
Ultrasound and Medical Imaging
Portable Instrumentation
Low-Power Data Acquisition

Features

♦ Direct IF Sampling Up to 400MHz
♦ Excellent Dynamic Performance

74.0dB/71dB SNR at fIN= 3MHz/175MHz

90.6dBc/80.7dBc SFDR at fIN= 3MHz/175MHz

♦ Low Noise Floor: -76dBFS
♦ 3.3V Low-Power Operation

337mW (Single-Ended Clock Mode)
363mW (Differential Clock Mode)
150µW (Power-Down Mode)

♦ Fully Differential or Single-Ended Analog Input
♦ Adjustable Full-Scale Analog Input Range: ±0.35V

to ±1.10V

♦ Common-Mode Reference
♦ CMOS-Compatible Outputs in Two’s Complement

or Gray Code

♦ Data-Valid Indicator Simplifies Digital Interface
♦ Data Out-of-Range Indicator
♦ Miniature, 40-Pin Thin QFN Package with Exposed

Paddle

♦ Evaluation Kit Available (Order MAX12555EVKIT)

MAX12553

14-Bit, 65Msps, 3.3V ADC

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-3343; Rev 0; 8/04

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

Pin-Compatible Versions

Pin Configuration appears at end of data sheet.

PART

MAX12553ETL

PART

MAX12553 65 14 IF/Baseband
MAX1209 80 12 IF
MAX1211 65 12 IF
MAX1208 80 12 Baseband
MAX1207 65 12 Baseband
MAX1206 40 12 Baseband

TEMP

RANGE

-40°C to
+85°C

SAMPLING

RATE (Msps)

PIN-PACKAGE

40 Thin QFN
(6mm x 6mm x 0.8mm)

RESOLUTION

(BITS)

APPLICATION

PKG

CODE

T4066-3

TARGET

MAX12553

14-Bit, 65Msps, 3.3V ADC

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(V

DD

= 3.3V, OV

DD

= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V

IN

= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, f

CLK

= 65MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VDDto GND...........................................................-0.3V to +3.6V

OV

DD

to GND........-0.3V to the lower of (VDD+ 0.3V) and +3.6V

INP, INN to GND ...-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

REFIN, REFOUT, REFP, REFN, COM

to GND................-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

CLKP, CLKN, CLKTYP, G/T, DCE,

PD to GND ........-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

D13–D0, DAV, DOR to GND....................-0.3V to (OV

DD

+ 0.3V)

Continuous Power Dissipation (TA= +70°C)

40-Pin Thin QFN 6mm x 6mm x 0.8mm

(derated 26.3mW/°C above +70°C)........................2105.3mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering 10s) ..................................+300°C

DC ACCURACY (Note 2)

Resolution 14 Bits
Integral Nonlinearity INL fIN = 3MHz (Note 5) ±1.4 ±4.2 LSB

Differential Nonlinearity DNL

Offset Error V
Gain Error V

ANALOG INPUT (INP, INN)

Differential Input Voltage Range V
Common-Mode Input Voltage VDD/2 V

Input Capacitance
(Figure 3)

CONVERSION RATE

Maximum Clock Frequency f
Minimum Clock Frequency 5 MHz

Data Latency Figure 6 8.5

DYNAMIC CHARACTERISTICS (differential inputs, Note 2)
Small-Signal Noise Floor SSNF Input at less than -35dBFS -76.0 dBFS

Signal-to-Noise Ratio SNR

Signal-to-Noise and Distortion SINAD

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

f

= 3MHz, no missing codes over

IN

temperature (Note 3)

= 2.048V ±0.1 ±0.55 %FS

REFIN

= 2.048V ±0.5 ±4.9 %FS

REFIN

DIFF

C

PAR

C

SAMPLE

CLK

Differential or single-ended inputs ±1.024 V

Fixed capacitance to ground 2
Switched capacitance 4.5

fIN = 3MHz at -0.5dBFS (Note 8) 69.3 74.0
fIN = 32.5MHz at -0.5dBFS 73.9
fIN = 70MHz at -0.5dBFS 73.4
f

= 175MHz at -0.5dBFS (Notes 7, 8) 68.0 71.0

IN

fIN = 3MHz at -0.5dBFS (Note 8) 69.2 73.9
fIN = 32.5MHz at -0.5dBFS 73.1
fIN = 70MHz at -0.5dBFS 73.1
f

= 175MHz at -0.5dBFS (Notes 7, 8) 67.6 70.0

IN

±0.5 ±1.0 LSB

65 MHz

pF

Clock

cycles

dB

dB

MAX12553

14-Bit, 65Msps, 3.3V ADC

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(V

DD

= 3.3V, OV

DD

= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V

IN

= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, f

CLK

= 65MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Spurious-Free Dynamic Range SFDR

Total Harmonic Distortion THD

Second Harmonic HD2

Third Harmonic HD3

Intermodulation Distortion IMD

Third-Order Intermodulation IM3

Two-Tone Spurious-Free
Dynamic Range

Aperture Delay t
Aperture Jitter t
Output Noise n

Overdrive Recovery Time ±10% beyond full scale 1

fIN = 3MHz at -0.5dBFS 79.8 90.6
fIN = 32.5MHz at -0.5dBFS 84.0
fIN = 70MHz at -0.5dBFS 87.8

= 175MHz at -0.5dBFS (Note 7) 75.9 80.7

f

IN

fIN = 3MHz at -0.5dBFS -90.6 -80.2
fIN = 32.5MHz at -0.5dBFS -81.0
fIN = 70MHz at -0.5dBFS -85.4
f

= 175MHz at -0.5dBFS -78.9 -71.3

IN

fIN = 3MHz at -0.5dBFS -99
fIN = 32.5MHz at -0.5dBFS -91
fIN = 70MHz at -0.5dBFS -92
f

= 175MHz at -0.5dBFS -81

IN

fIN = 3MHz at -0.5dBFS -94
fIN = 32.5MHz at -0.5dBFS -84
fIN = 70MHz at -0.5dBFS -88
f

= 175MHz at -0.5dBFS -86

IN

f

= 68.5MHz at -7dBFS

IN1

f

= 71.5MHz at -7dBFS

IN2

f

= 172.5MHz at -7dBFS

IN1

f

= 177.5MHz at -7dBFS

IN2

f

= 68.5MHz at -7dBFS

IN1

f

= 71.5MHz at -7dBFS

IN2

f

= 172.5MHz at -7dBFS

IN1

f

= 177.5MHz at -7dBFS

IN2

f

= 68.5MHz at -7dBFS

IN1

f

= 71.5MHz at -7dBFS

SFDR

AD

AJ

OUT

IN2

TT

f

= 172.5MHz at -7dBFS

IN1

f

= 177.5MHz at -7dBFS

IN2

Figure 4 1.2 ns
Figure 4 <0.2 ps
INP = INN = COM 0.95 LSB

dBc

dBc

dBc

dBc

-87
dBc

-80

-91
dBc

-83

90

dBc

81

RMS

RMS

Clock

cycles

MAX12553

14-Bit, 65Msps, 3.3V ADC

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(V

DD

= 3.3V, OV

DD

= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V

IN

= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, f

CLK

= 65MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

INTERNAL REFERENCE (REFIN = REFOUT; V

REFOUT Output Voltage V
COM Output Voltage V

Differential Reference Output
Voltage

REFOUT Load Regulation 35 mV/mA
REFOUT Temperature Coefficient TC

REFOUT Short-Circuit Current

B U F F ER ED EXT ER N A L R EF ER EN C E ( R EF IN d r iv e n e x t e r n a lly ; V
REFIN Input Voltage V
REFP Output Voltage V
REFN Output Voltage V
COM Output Voltage V

Differential Reference Output
Voltage

Differential Reference
Temperature Coefficient

REFIN Input Resistance >50 MΩ
UNBUFFERED EXTERNAL REFERENCE (REFIN = GND; V
COM Input Voltage V
REFP Input Voltage V
REFN Input Voltage V

Differential Reference Input
Voltage

REFP Sink Current I
REFN Source Current I
COM Sink Current I
REFP, REFN Capacitance 13 pF
COM Capacitance 6pF

CLOCK INPUTS (CLKP, CLKN)

Single-Ended Input High
Threshold

Single-Ended Input Low
Threshold

Differential Input Voltage Swing CLKTYP = high 1.4 V
Differential Input Common-Mode

Voltage

, V

REFOUT

COM

V

REF

REF

REFIN

REFP
REFN

COM

V

REF

REFN

, and V

REFP

VDD/2 1.65 V

V

REF

= V

REFP

- V

Short to VDD—sinking 0.24
Short to GND—sourcing 2.1

R EF IN

(VDD/2) + (V
(VDD/2) - (V

REFIN

REFIN

VDD/2 1.60 1.65 1.70 V

V

REF

= V

REFP

- V

are generated internally)

COM

2.002 2.048 2.066 V

REFN

= V

x 3/4 1.536 V

REFIN

+50 ppm/°C

mA

= 2.0 4 8 V, V

R EF P

, V

R EF N

, a n d V

a r e g e n e r a t e d in t e r n a lly )

C OM

2.048 V

x 3/8) 2.418 V

x 3/8) 0.882 V

REFN

= V

x 3/4 1.463 1.536 1.601 V

REFIN

±25 ppm/°C

, V

COM

V

REF

REFP
REFN
COM

V

V

REFN

, and V

REFP

VDD/2 1.65 V

- V

REFP

COM

- V

REFN

V

REF

V

REFP

V

REFN

CLKTYP = GND, CLKN = GND

IH

CLKTYP = GND, CLKN = GND

IL

COM

= V

REFP

- V

REFN

= V

REFIN

= 2.418V 1 mA

= 0.882V 0.7 mA

CLKTYP = high V

are applied externally)

COM

0.768 V

-0.768 V

x 3/4 1.536 V

0.7 mA

0.8 x
V

DD

0.2 x
V

DD

/ 2 V

DD

V

V

P-P

MAX12553

14-Bit, 65Msps, 3.3V ADC

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(V

DD

= 3.3V, OV

DD

= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V

IN

= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, f

CLK

= 65MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Input Resistance R
Input Capacitance C

DIGITAL INPUTS (CLKTYP, G/T, PD)

Input High Threshold V

Input Low Threshold V

Input Leakage Current

Input Capacitance C

DIGITAL OUTPUTS (D13–D0, DAV, DOR)

Output Voltage Low V

Output Voltage High V

Tri-State Leakage Current I
D13–D0, DOR Tri-State Output

Capacitance
DAV Tri-State Output

Capacitance

POWER REQUIREMENTS

Analog Supply Voltage V

Digital Output Supply Voltage OV

Analog Supply Current I

CLK
CLK

DIN

OH

LEAK

C

OUT

C

DAV

OL

DD

Figure 5 5 kΩ

IH

IL

VIH = OV
V

D13–D0, DOR, I
DAV, I

D13–D0, DOR, I

DAV, I

DD

= 0 ±5

IL

SINK

= 600µA 0.2

SINK

SOURCE

= 600µA

SOURCE

(Note 4) ±5 µA

(Note 4) 3 pF

(Note 4) 6 pF

DD

Normal operating mode,
f

= 175MHz at -0.5dBFS, CLKTYP = GND,

IN

single-ended clock

VDD

Normal operating mode,

= 175MHz at -0.5dBFS,

f

IN

CLKTYP = OV

differential clock

DD,

Power-down mode clock idle, PD = OV

2pF

0.8 x

OV

DD

0.2 x

OV

±5

5pF

= 200µA 0.2

OV

-

= 200µA

0.2
OV

DD

DD

-

0.2

3.15 3.3 3.60 V
V

1.7 2.0

DD

0.3V

102

110 123

DD

0.045

DD

+

V

V

µA

V

V

V

mA

MAX12553

14-Bit, 65Msps, 3.3V ADC

6 _______________________________________________________________________________________

Note 1: Specifications ≥+25°C guaranteed by production test; <+25°C guaranteed by design and characterization.
Note 2: See definitions in the Parameter Definitions section at the end of this data sheet.
Note 3: Specifications guaranteed by design and characterization. Devices tested for performance during production test.
Note 4: During power-down, D13–D0, DOR, and DAV are high impedance.
Note 5: Guaranteed by design and characterization.
Note 6: Digital outputs settle to V

IH

or VIL.

Note 7: Due to test-equipment-jitter limitations at 175MHz, 0.15% of the spectrum on each side of the fundamental is excluded from

the spectral analysis.

Note 8: Limit specifications include performance degradations due to a production test socket. Performance is improved when the

MAX12553 is soldered directly to the PC board.

ELECTRICAL CHARACTERISTICS (continued)

(V

DD

= 3.3V, OV

DD

= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V

IN

= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, f

CLK

= 65MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)

Analog Power Dissipation P

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Digital Output Supply Current I

TIMING CHARACTERISTICS (Figure 6)

Clock Pulse-Width High t
Clock Pulse-Width Low t
Data-Valid Delay t

Data Setup Time Before Rising
Edge of DAV

Data Hold Time After Rising Edge
of DAV

Wake-Up Time from Power-Down t

Normal operating mode,
f

= 175MHz at -0.5dBFS, CLKTYP = GND,

IN

single-ended clock

DISS

OVDD

CH

CL

DAV

t

SETUP

t

HOLD

WAKE

Normal operating mode,

= 175MHz at -0.5dBFS,

f

IN

CLKTYP = OV
Power-down mode clock idle, PD = OV
Normal operating mode,

f

= 175MHz at -0.5dBFS, OVDD = 2.0V,

IN

≈ 5pF

C

L

Power-down mode clock idle, PD = OV

CL = 5pF (Note 6) 6.9 ns

CL = 5pF (Notes 5, 6) 8.5 ns

CL = 5pF (Notes 5, 6) 6.3 ns

V

= 2.048V 10 ms

REFIN

, differential clock

DD

337

363 406

DD

DD

0.15

8.2 mA

20 µA

7.7 ns

7.7 ns

mW

MAX12553

14-Bit, 65Msps, 3.3V ADC

_______________________________________________________________________________________ 7

Typical Operating Characteristics

(V

DD

= 3.3V, OV

DD

= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V

IN

= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, f

CLK

≈ 65MHz (50% duty cycle), TA = +25°C, unless otherwise noted.)

SINGLE-TONE FFT PLOT

(8192-POINT DATA RECORD)

0

-10

-20

-30

-40

-50

f

= 65MHz

CLK

= 3.00720215MHz

f

IN

= -0.542dBFS

A

IN

SNR = 74.223dB
SINAD = 74.147dB
THD = -91.794dBc
SFDR = 91.499dBc

MAX12553 toc01

-60

-70

AMPLITUDE (dBFS)

-80

HD2

HD3

-90

-100

-110

-120
032

24 2881216204

FREQUENCY (MHz)

0

f

CLK

-10

f

IN

-20

A

IN

SNR = 74.206dB

-30

SINAD = 73.534dB

-40

THD = -81.965dBc

-50

SFDR = 86.015dBc

-60

-70

AMPLITUDE (dBFS)

-80

-90

-100

-110

-120
032

SINGLE-TONE FFT PLOT

(8192-POINT DATA RECORD)

0

f

= 65MHz

CLK

-10

= 174.9017334MHz

f

IN

-20

= -0.499dBFS

A

IN

SNR = 70.971dB

-30

SINAD = 70.260dB

-40

THD = -78.475dBc

-50

SFDR = 80.267dBc

-60

-70

AMPLITUDE (dBFS)

-80

HD2

MAX12553 toc04

HD5

-90

-100

-110

-120
032

24 2881216204

FREQUENCY (MHz)

0

-10

-20

-30

-40

-50

-60

-70

AMPLITUDE (dBFS)

-80

-90

-100

-110

-120
032

SINGLE-TONE FFT PLOT

(8192-POINT DATA RECORD)

= 65MHz

= 32.39685059MHz

= -0.469dBFS

HD2

FREQUENCY (MHz)

SINGLE-TONE FFT PLOT

(8192-POINT DATA RECORD)

f

= 64.96256MHz

CLK

= 250.00911MHz

f

IN

= -0.494dBFS

A

IN

SNR = 69.39dB
SINAD = 68.67dB
THD = -76.8dBc
SFDR = 78.6dBc

HD3

HD2

FREQUENCY (MHz)

SINGLE-TONE FFT PLOT

(8192-POINT DATA RECORD)

0

-10

-20

MAX12553 toc02

-30

-40

-50

-60

-70

HD3

AMPLITUDE (dBFS)

-80

-90

-100

-110

24 2881216204

-120
032

f

= 65MHz

CLK

= 69.89562988MHz

f

IN

= -0.460dBFS

A

IN

SNR = 73.772dB
SINAD = 73.615dB
THD = -88.110dBc
SFDR = 88.325dBc

HD3

HD2

FREQUENCY (MHz)

24 2881216204

TWO-TONE FFT PLOT

(16,384-POINT DATA RECORD)

0

-10

-20

MAX12553 toc05

-30

-40

-50

-60

-70

AMPLITUDE (dBFS)

-80

2 x f

-90

-100

-110

-120

24 2881216204

032

f

= 65MHz

CLK

= 68.50311279MHz

f

IN1

f

IN1

IN2

A

f

IN2

f
A
SFDR
IMD = -87.812dBc
IM3 = -91.844dBc

- f

IN1

= -7.018dBFS

IN1

= 71.50238037MHz

IN2

= -7.087dBFS

IN2

FREQUENCY (MHz)

= 90.085dBc

TT

24 2881216204

MAX12553 toc03

MAX12553 toc06

TWO-TONE FFT PLOT

(16,384-POINT DATA RECORD)

MAX12553 toc07

2.0

1.5

1.0

0.5

0

INL (LSB)

-0.5

-1.0

-1.5

-2.0

0

f

= 65.00352MHz

CLK

-10

= 172.4870625MHz

f

IN1

-20

= -7.047dBFS

A

IN1

= 177.4861125MHz

f

IN2

-30

= -6.984dBFS

A

IN2

-40

SFDR

-50

-60

-70

AMPLITUDE (dBFS)

-80

TT

IMD = -80.035dBc
IM3 = -83.511dBc

- f

IN2

IN1

= 81.484dBc

2 x f

IN2

- f

IN1f

f

IN2

f

IN1

f

+ f

IN1

IN2

-90

-100

-110

-120
032

24 2881216204

FREQUENCY (MHz)

INTEGRAL NONLINEARITY

0 16384

DIGITAL OUTPUT CODE

DIFFERENTIAL NONLINEARITY

1.0

0.8

MAX12553 toc08

0.6

0.4

0.2
0

DNL (LSB)

-0.2

-0.4

-0.6

-0.8

-1.0

1228881924096

0 16384

1228881924096

DIGITAL OUTPUT CODE

MAX12553 toc09

MAX12553

14-Bit, 65Msps, 3.3V ADC

8 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(V

DD

= 3.3V, OV

DD

= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V

IN

= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, f

CLK

≈ 65MHz (50% duty cycle), TA = +25°C, unless otherwise noted.)

75

fIN ≈ 70MHz

74
73
72
71
70
69

SNR, SINAD (dB)

68
67
66
65

080

75

fIN ≈ 175MHz

74
73
72
71
70
69

SNR, SINAD (dB)

68
67
66
65

080

SNR, SINAD

vs. SAMPLING RATE

100

fIN ≈ 70MHz

95

MAX12553 toc10

90

85

80

75

SFDR, -THD (dB)

70

SNR
SINAD

604020

f

(MHz)

CLK

65

60

080

SNR, SINAD

vs. SAMPLING RATE

100

fIN ≈ 175MHz

MAX12553 toc13

SNR
SINAD

604020

f

(MHz)

CLK

95

90

85

80

75

SFDR, -THD (dB)

70

65

60

080

SFDR, -THD

vs. SAMPLING RATE

f

(MHz)

CLK

SFDR, -THD

vs. SAMPLING RATE

f

(MHz)

CLK

POWER DISSIPATION

vs. SAMPLING RATE

500

DIFFERENTIAL CLOCK

≈ 70MHz

f

IN

450

≈ 5pF

C

MAX12553 toc11

SFDR

-THD

604020

L

400

350

300

POWER DISSIPATION (mW)

250

200

080

ANALOG + DIGITAL POWER
ANALOG POWER

604020

f

(MHz)

CLK

POWER DISSIPATION

vs. SAMPLING RATE

500

DIFFERENTIAL CLOCK

≈ 175MHz

f

IN

450

≈ 5pF

C

MAX12553 toc14

SFDR

-THD

604020

L

400

350

300

POWER DISSIPATION (mW)

250

200

080

ANALOG + DIGITAL POWER
ANALOG POWER

604020

f

(MHz)

CLK

MAX12553 toc12

MAX12553 toc15

vs. ANALOG INPUT FREQUENCY

SNR, SINAD

75
73
71
69
67
65
63

SNR, SINAD (dB)

61
59
57
55

SNR
SINAD

0 400

ANALOG INPUT FREQUENCY (MHz)

f

CLK

300200100

≈ 65MHz

MAX12553 toc16

vs. ANALOG INPUT FREQUENCY

95

90

85

80

75

70

SFDR, -THD (dBc)

65

60

55

0 400

SFDR, -THD

f

≈ 65MHz

CLK

SFDR

-THD

300200100

ANALOG INPUT FREQUENCY (MHz)

500

450

MAX12553 toc17

400

350

300

POWER DISSIPATION (mW)

250

200

0 400

POWER DISSIPATION

vs. ANALOG INPUT FREQUENCY

DIFFERENTIAL CLOCK

≈ 65MHz

f

CLK

≈ 5pF

C

L

ANALOG + DIGITAL POWER
ANALOG POWER

ANALOG INPUT FREQUENCY (MHz)

MAX12553 toc18

300200100

MAX12553

14-Bit, 65Msps, 3.3V ADC

_______________________________________________________________________________________ 9

Typical Operating Characteristics (continued)

(V

DD

= 3.3V, OV

DD

= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V

IN

= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, f

CLK

≈ 65MHz (50% duty cycle), TA = +25°C, unless otherwise noted.)

SNR, SINAD

vs. ANALOG INPUT AMPLITUDE

75

f

= 64.96256MHz

CLK

70

= 175.0071MHz

f

IN

65
60
55
50
45

SNR, SINAD (dB)

40
35
30
25

-40 0
ANALOG INPUT AMPLITUDE (dBFS)

SNR, SINAD

vs. ANALOG SUPPLY VOLTAGE

75

f

= 64.96256MHz

CLK

74

= 175.00717MHz

f

IN

73
72
71
70
69

SNR, SINAD (dB)

68
67
66
65

2.6 3.6
VDD (V)

SNR, SINAD

vs. DIGITAL SUPPLY VOLTAGE

75
74
73
72
71
70
69

SNR, SINAD (dB)

68
67
66
65

SNR
SINAD

1.4 3.8

f
f

OVDD (V)

CLK
IN

SNR
SINAD

-5-10-20 -15-30 -25-35

SNR
SINAD

3.43.0 3.22.8

= 65MHz

= 174.9007416MHz

3.43.02.62.21.8

MAX12553 toc19

MAX12553 toc22

MAX12553 toc25

vs. ANALOG INPUT AMPLITUDE

SFDR, -THD

100

f

= 64.96256MHz

CLK

= 175.0071MHz

f

IN

90

80

70

60

SFDR, -THD (dBc)

50

40

30

-40 0
ANALOG INPUT AMPLITUDE (dBFS)

SFDR, -THD

vs. ANALOG SUPPLY VOLTAGE

100

f

= 64.96256MHz

CLK

= 175.00717MHz

f

95

IN

90

85

80

75

SFDR, -THD (dBc)

70

65

60

2.6 3.6

VDD (V)

SFDR, -THD

vs. DIGITAL SUPPLY VOLTAGE

100

95

90

85

80

75

SFDR, -THD (dBc)

70

65

60

SFDR

-THD

1.4 3.8

f

CLK

= 174.9007416MHz

f

IN

OVDD (V)

= 65MHz

500

450

MAX12553 toc20

400

350

300

POWER DISSIPATION (mW)

SFDR

-THD

-5-10-20 -15-30 -25-35

SFDR

-THD

3.43.0 3.22.8

3.43.02.62.21.8

250

200

-40 0

500

450

MAX12553 toc23

400

350

300

POWER DISSIPATION (mW)

250

200

2.6 3.6

500

450

MAX12553 toc26

400

350

300

POWER DISSIPATION (mW)

250

200

1.4 3.8

POWER DISSIPATION

vs. ANALOG INPUT AMPLITUDE

DIFFERENTIAL CLOCK

= 64.96256MHz

f

CLK

= 175.0071MHz

f

IN

≈ 5pF

C

L

ANALOG + DIGITAL POWER
ANALOG POWER

ANALOG INPUT AMPLITUDE (dBFS)

POWER DISSIPATION

vs. ANALOG SUPPLY VOLTAGE

DIFFERENTIAL CLOCK

= 64.96256MHz

f

CLK

= 175.00717MHz

f

IN

≈ 5pF

C

L

ANALOG + DIGITAL POWER
ANALOG POWER

VDD (V)

POWER DISSIPATION

vs. DIGITAL SUPPLY VOLTAGE

DIFFERENTIAL CLOCK
f

CLK

f

IN

C

L

ANALOG + DIGITAL POWER
ANALOG POWER

OVDD (V)

-5-10-20 -15-30 -25-35

3.43.0 3.22.8

= 65MHz

= 174.9007416MHz

≈ 5pF

3.43.02.62.21.8

MAX12553 toc21

MAX12553 toc24

MAX12553 toc27