The MAX1245 12-bit data-acquisition system combines
an 8-channel multiplexer, high-bandwidth track/hold, and
serial interface with high conversion speed and ultra-low
power consumption. It operates from a single +2.375V to
+3.3V supply, and its analog inputs are software configurable for unipolar/bipolar and single-ended/differential
operation.
The 4-wire serial interface directly connects to SPI™,
QSPI™, and Microwire™ devices without external logic.
A serial strobe output allows direct connection to
TMS320-family digital signal processors. The MAX1245
works with an external reference, and uses either the
internal clock or an external serial-interface clock to
perform successive-approximation analog-to-digital
conversions.
This device provides a hard-wired SHDN pin and a
software-selectable power-down, and can be programmed to automatically shut down at the end of a
conversion. Accessing the serial interface powers up
the MAX1245, and the quick turn-on time allows it to be
shut down between conversions. This technique can
cut supply current to under 10µA at reduced sampling
rates.
The MAX1245 is available in a 20-pin DIP package and
an SSOP that occupies 30% less area than an 8-pin DIP.
For supply voltages from +2.7V to +5.25V, use the pincompatible MAX147.
________________________Applications
Portable Data LoggingMedical Instruments
Battery-Powered InstrumentsData Acquisition
___________T ypical Operating Circuit
+2.5V
+2.048V
ANALOG
INPUTS
+2.048V
0V to
0.1µF
CH0
CH7
VREF
MAX1245
V
DGND
AGND
COM
CS
SCLK
DIN
DOUT
SSTRB
SHDN
DD
0.1µF
V
DD
CPU
I/O
SCK (SK)*
MOSI (SO)
MISO (SI)
V
SS
____________________________Features
♦ Single +2.375V to +3.3V Operation
♦ 8-Channel Single-Ended or 4-Channel
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
= +70°C)
A
DD
DD
DD
+ 0.3V)
+ 0.3V)
+ 0.3V)
ELECTRICAL CHARACTERISTICS
(VDD= +2.375V to +3.3V, COM = 0V, f
VREF = 2.048V applied to VREF pin, T
Acquisition Time
DIN to SCLK Setup
DIN to SCLK Hold
SCLK Fall to Output Data Valid
MAX1245
CS Fall to Output Enable
CS Rise to Output Disable
CS to SCLK Rise Setup
CS to SCLK Rise Hold
SCLK Pulse Width Low
SCLK Fall to SSTRBns
CS Fall to SSTRB Output Enable
CS Rise to SSTRB Output Disable
SSTRB Rise to SCLK Rise
Note 1: Tested at V
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
= +2.375V; COM = 0V; unipolar single-ended input mode.
DD
been calibrated.
Note 3: External reference (VREF = +2.048V), offset nulled.
Note 4: Ground “on” channel; sine wave applied to all “off” channels.
Note 5: Conversion time defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 6: The common-mode range for the analog inputs is from AGND to V
Note 7: Guaranteed by design. Not subject to production testing.
Note 8: ADC performance is limited by the converter’s noise floor, typically 300µVp-p.
Note 9: Measured as
VFS(2.375V) - VFS(3.3V)|.
|
to T
MIN
, unless otherwise noted.)
MAX
CONDITIONS
ACQ
DS
DH
t
Figure 1ns20260
DO
Figure 1
DV
Figure 2
TR
CSS
t
CSH
t
CH
CL
Figure 1
SSTRB
External clock mode only, Figure 1
SDV
External clock mode only, Figure 2
STR
Internal clock mode only (Note 7)
SCK
DD
.
300t
0t
260t
UNITSMINTYPMAXSYMBOL
µs2.0t
ns200t
ns0t
ns240t
ns400t
ns200t
ns0
ns300SCLK Pulse Width High
ns