The MAX1233/MAX1234 are complete PDA controllers in
5mm × 5mm, 28-pin QFN and TQFN packages. They feature a 12-bit analog-to-digital converter (ADC), low onresistance switches for driving resistive touch screens, an
internal +1.0V/+2.5V or external reference, ±2°C accurate, on-chip temperature sensor, direct +6V battery monitor, keypad controller, 8-bit digital-to-analog converter
(DAC), and a synchronous serial interface. Each of the
keypad controllers’ eight row and column inputs can be
reconfigured as general-purpose parallel I/O pins (GPIO).
All analog inputs are fully ESD protected, eliminating the
need for external TransZorb™ devices.
The MAX1233/MAX1234 offer programmable resolution
and sampling rates. Interrupts from the devices alert the
host processor when data is ready, when the screen is
touched, or a key press is detected. Softwareconfigurable scan control and internal timers give the user
flexibility without burdening the host processor. These
devices consume only 260µA at the maximum sampling
rate of 50ksps. Supply current falls to below 50µA for
sampling rates of 10ksps. The MAX1233/MAX1234 are
guaranteed over the -40°C to +85°C temperature range.
(DVDD= AVDD= +2.7V to +3.6V (MAX1233), DVDD= AVDD= +4.75V to +5.25V (MAX1234), external reference V
REF
= 2.5V
(MAX1233), V
REF
= 4.096V (MAX1234); f
SCLK
= 10MHz, f
SAMPLE
= 50ksps, 12-bit mode, 0.1µF capacitor at REF, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDDto GND............................................................-0.3V to +6V
DV
DD
to AVDD.......................................................-0.3V to +0.3V
Digital Inputs/Outputs to GND .................-0.3V to (DV
DD
+ 0.3V)
X+, Y+, X-, Y-, AUX1, AUX2,
and REF to GND ..................................-0.3V to (AV
DD
+ 0.3V)
BAT1, BAT2 to GND .................................................-0.3V to +6V
Maximum ESD per IEC 1000-4-2 (per MIL STD-883 HBM)
(DVDD= AVDD= +2.7V to +3.6V (MAX1233), DVDD= AVDD= +4.75V to +5.25V (MAX1234), external reference V
REF
= 2.5V
(MAX1233), V
REF
= 4.096V (MAX1234); f
SCLK
= 10MHz, f
SAMPLE
= 50ksps, 12-bit mode, 0.1µF capacitor at REF, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.)
Note 1: Tested at DVDD= AVDD= +2.7V (MAX1233), DVDD= AVDD= +5V (MAX1234).
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the offset and gain errors
have been removed.
Note 3: Offset nulled.
Note 4: Difference between TEMP1 and TEMP2; temperature in °K = (V
TEMP2
- V
TEMP1
) × 2680°K/V. No calibration is necessary.
Note 5: Temperature coefficient is -2.1mV/°C. Determine absolute temperature by extrapolating from a calibrated value.
Note 6: ADC performance is limited by the conversion noise floor, typically 300µV
P-P
. An external reference below 2.5V can
compromise the ADC performance.
Note 7: Guaranteed from code 5 to 255.
Input CapacitanceC
DIGITAL OUTPUT (DOUT)
Output Voltage LowV
Output Voltage HighV
DIGITAL OUTPUT (BUSY, PENIRQ, KEYIRQ, R_, C_)
Output Voltage LowV
Output Voltage HighV
Supply Voltage (Note 12)
Analog and Digital Supply
Current
TIMING CHARACTERISTICS
SCLK Clock Periodt
SCLK Pulse Width Hight
SCLK Pulse Width Lowt
DIN to SCLK Rise Setupt
SCLK Rise to DIN Holdt
SCLK Fall to DOUT Validt
CS Fall to DOUT Enabledt
CS Rise to DOUT Disabledt
CS Fall to SCLK Riset
CS Fall to SCLK Ignoredt
SCLK Rise to R_/C_ Data Validt
CS Pulse Width Hight
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
IN
OL
OH
OL
OH
15pF
I
= 2mA0.4
SINK
I
= 4mA0.8
SINK
DV
-
DV
DD
0.5
DD
0.5
-
I
I
I
= 1.5mA
SOURCE
= 0.2mA0.4V
SINK
= 0.2mA
SOURCE
POWER REQUIREMENTS
AV
DV
DD
MAX12332.733.6
/
DDMAX12344.7555.25
Idle; all blocks shut down0.55
I
AVDD
I
DVDD
Only ADC on; f
+
Only DAC on; no load150230
= 20ksps150500
SAMPLE
Only internal reference on670900
CP
CH
CL
DS
DH
DOV
DV
DOD
CSS
CSH
GPO
CSW
C
= 50pF40ns
LOAD
C
= 50pF45ns
LOAD
C
= 50pF40ns
LOAD
C
= 50pF (Note 13)230ns
LOAD
100ns
40ns
40ns
40ns
0ns
40ns
0ns
40ns
V
V
V
V
µA
MAX1233/MAX1234
±15kV ESD-Protected Touch-Screen
Controllers Include DAC and Keypad Controller
(DVDD= AVDD= +2.7V to +3.6V (MAX1233), DVDD= AVDD= +4.75V to +5.25V (MAX1234), external reference V
REF
= 2.5V
(MAX1233), V
REF
= 4.096V (MAX1234); f
SCLK
= 10MHz, f
SAMPLE
= 50ksps, 12-bit mode, 0.1µF capacitor at REF, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.)
Note 8: The offset value extrapolated from the range over which the INL is guaranteed.
Note 9: Output settling time is measured by stepping from code 5 to 255, and from code 255 to 5.
Note 10: Actual output voltage at full scale is 255/256 × V
REFDAC
.
Note 11: Resistance is open when configured as GPIO or in shutdown.
Note 12: AV
Positive Digital Supply Voltage, +2.7V to +3.6V for MAX1233, +4.75V to +5.25V for MAX1234. Bypass
with a 0.1µF capacitor. Must be within 300mV of AV
DD
.
2AV
DD
Positive Analog Supply Voltage, +2.7V to +3.6V for MAX1233, +4.75V to +5.25V for MAX1234.
Bypass with a 0.1µF capacitor. Must be within 300mV of DV
DD
.
3*X+X+ Position Input
4*Y+Y+ Position Input
5*X-X- Position Input
6*Y-Y- Position Input
7GNDAnalog and Digital Ground
8*BAT1Battery Monitoring Input 1. Measures battery voltages up to 6V.
9*BAT2Battery Monitoring Input 2. Measures battery voltages up to 6V.
10*AUX1Auxiliary Analog Input 1 to ADC. Measures analog voltages from zero to V
REF
.
11*AUX2Auxiliary Analog Input 2 to ADC. Measures analog voltages from zero to V
REF
.
12REF
Voltage Reference Output/Input. Reference voltage for analog-to-digital conversion. In internal
reference mode, the reference buffer provides a 2.5V or 1.0V nominal output. In external reference
mode, apply a reference voltage between 1.0V and AV
DD
. Bypass REF to GND with a 0.1µF
capacitor in the external reference mode only.
13
DAC Voltage Output; 0.9 × AVDD Full Scale
14R4Keypad Row 4. Can be reconfigured as GPIO3.
15R3Keypad Row 3. Can be reconfigured as GPIO2.
16R2Keypad Row 2. Can be reconfigured as GPIO1.
17R1Keypad Row 1. Can be reconfigured as GPIO0.
18C1Keypad Column 1. Can be reconfigured as GPIO4.
Pin Description
DACOUT
MAX1233/MAX1234
±15kV ESD-Protected Touch-Screen
Controllers Include DAC and Keypad Controller
The MAX1233/MAX1234 are 4-wire touch-screen controllers. Figure 1 shows the functional diagram of the
MAX1233/MAX1234. Each device includes a 12-bit sampling ADC, 8-bit voltage output DAC, keypad scanner
that can also be configured as a GPIO, internal clock,
reference, temperature sensor, two battery monitor
inputs, two auxiliary analog inputs, SPI/QSPI/
MICROWIRE-compatible serial interface, and low onresistance switches for driving touch screens.
The 16-bit register inside the MAX1233/MAX1234
allows for easy control and stores results that can be
read at any time. The BUSY output indicates that a
functional operation is in progress. The PENIRQ andKEYIRQ outputs, respectively, indicate that a screen
touch or a key press has occurred.
Touch-Screen Operation
The 4-wire touch-screen controller works by creating a
voltage gradient across the vertical or horizontal resistive touch screen connected to the analog inputs of the
MAX1233/MAX1234, as shown in Figure 2. The voltage
across the touch-screen panels is applied through internal MOSFET switches that connect each resistive layer
to AVDDand ground. For example, to measure the Y
position when a pointing device presses on the touch
screen, the Y+ and Y- drivers are turned on, connecting
one side of the vertical resistive layer to AVDDand the
other side to ground. The horizontal resistive layer functions as a sense line. One side of this resistive layer gets
connected to the X+ input, while the other side is left
open or floating. The point where the touch screen is
pressed brings the two resistive layers in contact and
creates a voltage-divider at that point. The data converter senses the voltage at the point of contact through the
X+ input and digitizes it.
12-Bit ADC
Analog Inputs
Figure 3 shows a block diagram of the ADC’s analog
input section including the input multiplexer, the differential input, and the differential reference. The input multiplexer switches between X+, X-, Y+, Y-, AUX1, AUX2,
BAT1, BAT2, and the internal temperature sensor.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens, and more time must be
allowed. The acquisition time (t
ACQ
) is the maximum
time the device takes to acquire the input signal to 12bit accuracy. Configure t
ACQ
by writing to the ADC
control register. See Table 1 for the maximum input signal source impedance (R
SOURCE
) for complete settling
during acquisition.
Accommodate higher source impedances by placing a
0.1µF capacitor between the analog input and GND.
Input Bandwidth
The ADC’s input-tracking circuitry has a 0.5MHz smallsignal bandwidth. To avoid high-frequency signals
being aliased into the frequency band of interest, antialias filtering is recommended.
Pin Description (continued)
*
ESD protected: ±8kV Contact, ±15kV Air.
PINNAMEFUNCTION
19C2Keypad Column 2. Can be reconfigured as GPIO5.
20C3Keypad Column 3. Can be reconfigured as GPIO6.
21C4Keypad Column 4. Can be reconfigured as GPIO7.
22KEYIRQActive-Low Keypad Interrupt. KEYIRQ is low when a key press is detected.
23PENIRQActive-Low Pen Touch Interrupt. PENIRQ is low when a screen touch is detected.
24DOUTSerial Data Output. Data is clocked out at SCLK falling edge. High impedance when CS is high.
25BUSY
26DINSerial Data Input. Data is clocked in on the rising edge of SCLK.
27SCLK
28CS
—EP
Active-Low Busy Output. BUSY goes low and stays low during each functional operation. The host
controller should wait until BUSY is high again before using the serial interface.
Serial Clock Input. Clocks data in and out of the serial interface and sets the conversion speed (duty
cycle must be 30% to 70%).
Active-Low Chip Select. Data is not clocked into DIN unless CS is low. When CS is high, DOUT is
high impedance.
Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal
performance. Not intended as an electrical connection point.
Internal protection diodes that clamp the analog input
to AVDDand GND allow the analog input pins to swing
from GND - 0.3V to AVDD+ 0.3V without damage.
Analog inputs must not exceed AV
DD
by more than
50mV or be lower than GND by more than 50mV for
accurate conversions. If an off-channel analog input
voltage exceeds the supplies, limit the input current to
50mA. All analog inputs are also fully ESD protected
to ±8kV, using the Contact-Discharge method and
±15kV using the Air-Gap method specified in IEC1000-4-2.
Reference for ADC
Internal Reference
The MAX1233/MAX1234 offer an internal voltage reference for the ADC that can be set to +1.0V or +2.5V. The
MAX1233/MAX1234 typically use the internal reference
for battery monitoring, temperature measurement, and for
Figure 3. Simplified Diagram of Analog Input Section
TEMP1
TEMP2
X+
X-
Y+
Y-
+AV
DD
V
REF
MAX1233
MAX1234
REF ON/OFF
CONVERTER
+REF
-
REF
2.5V/1.0V
REFERENCE
+IN
-IN
7.5kΩ
V
BAT1
7.5kΩ
V
BAT2
AUX1
AUX2
GND
2.5kΩ
BATTERY
ON
2.5kΩ
BATTERY
ON
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