The MAX1233/MAX1234 are complete PDA controllers in
5mm × 5mm, 28-pin QFN and TQFN packages. They feature a 12-bit analog-to-digital converter (ADC), low onresistance switches for driving resistive touch screens, an
internal +1.0V/+2.5V or external reference, ±2°C accurate, on-chip temperature sensor, direct +6V battery monitor, keypad controller, 8-bit digital-to-analog converter
(DAC), and a synchronous serial interface. Each of the
keypad controllers’ eight row and column inputs can be
reconfigured as general-purpose parallel I/O pins (GPIO).
All analog inputs are fully ESD protected, eliminating the
need for external TransZorb™ devices.
The MAX1233/MAX1234 offer programmable resolution
and sampling rates. Interrupts from the devices alert the
host processor when data is ready, when the screen is
touched, or a key press is detected. Softwareconfigurable scan control and internal timers give the user
flexibility without burdening the host processor. These
devices consume only 260µA at the maximum sampling
rate of 50ksps. Supply current falls to below 50µA for
sampling rates of 10ksps. The MAX1233/MAX1234 are
guaranteed over the -40°C to +85°C temperature range.
(DVDD= AVDD= +2.7V to +3.6V (MAX1233), DVDD= AVDD= +4.75V to +5.25V (MAX1234), external reference V
REF
= 2.5V
(MAX1233), V
REF
= 4.096V (MAX1234); f
SCLK
= 10MHz, f
SAMPLE
= 50ksps, 12-bit mode, 0.1µF capacitor at REF, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDDto GND............................................................-0.3V to +6V
DV
DD
to AVDD.......................................................-0.3V to +0.3V
Digital Inputs/Outputs to GND .................-0.3V to (DV
DD
+ 0.3V)
X+, Y+, X-, Y-, AUX1, AUX2,
and REF to GND ..................................-0.3V to (AV
DD
+ 0.3V)
BAT1, BAT2 to GND .................................................-0.3V to +6V
Maximum ESD per IEC 1000-4-2 (per MIL STD-883 HBM)
(DVDD= AVDD= +2.7V to +3.6V (MAX1233), DVDD= AVDD= +4.75V to +5.25V (MAX1234), external reference V
REF
= 2.5V
(MAX1233), V
REF
= 4.096V (MAX1234); f
SCLK
= 10MHz, f
SAMPLE
= 50ksps, 12-bit mode, 0.1µF capacitor at REF, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.)
Note 1: Tested at DVDD= AVDD= +2.7V (MAX1233), DVDD= AVDD= +5V (MAX1234).
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the offset and gain errors
have been removed.
Note 3: Offset nulled.
Note 4: Difference between TEMP1 and TEMP2; temperature in °K = (V
TEMP2
- V
TEMP1
) × 2680°K/V. No calibration is necessary.
Note 5: Temperature coefficient is -2.1mV/°C. Determine absolute temperature by extrapolating from a calibrated value.
Note 6: ADC performance is limited by the conversion noise floor, typically 300µV
P-P
. An external reference below 2.5V can
compromise the ADC performance.
Note 7: Guaranteed from code 5 to 255.
Input CapacitanceC
DIGITAL OUTPUT (DOUT)
Output Voltage LowV
Output Voltage HighV
DIGITAL OUTPUT (BUSY, PENIRQ, KEYIRQ, R_, C_)
Output Voltage LowV
Output Voltage HighV
Supply Voltage (Note 12)
Analog and Digital Supply
Current
TIMING CHARACTERISTICS
SCLK Clock Periodt
SCLK Pulse Width Hight
SCLK Pulse Width Lowt
DIN to SCLK Rise Setupt
SCLK Rise to DIN Holdt
SCLK Fall to DOUT Validt
CS Fall to DOUT Enabledt
CS Rise to DOUT Disabledt
CS Fall to SCLK Riset
CS Fall to SCLK Ignoredt
SCLK Rise to R_/C_ Data Validt
CS Pulse Width Hight
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
IN
OL
OH
OL
OH
15pF
I
= 2mA0.4
SINK
I
= 4mA0.8
SINK
DV
-
DV
DD
0.5
DD
0.5
-
I
I
I
= 1.5mA
SOURCE
= 0.2mA0.4V
SINK
= 0.2mA
SOURCE
POWER REQUIREMENTS
AV
DV
DD
MAX12332.733.6
/
DDMAX12344.7555.25
Idle; all blocks shut down0.55
I
AVDD
I
DVDD
Only ADC on; f
+
Only DAC on; no load150230
= 20ksps150500
SAMPLE
Only internal reference on670900
CP
CH
CL
DS
DH
DOV
DV
DOD
CSS
CSH
GPO
CSW
C
= 50pF40ns
LOAD
C
= 50pF45ns
LOAD
C
= 50pF40ns
LOAD
C
= 50pF (Note 13)230ns
LOAD
100ns
40ns
40ns
40ns
0ns
40ns
0ns
40ns
V
V
V
V
µA
MAX1233/MAX1234
±15kV ESD-Protected Touch-Screen
Controllers Include DAC and Keypad Controller
(DVDD= AVDD= +2.7V to +3.6V (MAX1233), DVDD= AVDD= +4.75V to +5.25V (MAX1234), external reference V
REF
= 2.5V
(MAX1233), V
REF
= 4.096V (MAX1234); f
SCLK
= 10MHz, f
SAMPLE
= 50ksps, 12-bit mode, 0.1µF capacitor at REF, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.)
Note 8: The offset value extrapolated from the range over which the INL is guaranteed.
Note 9: Output settling time is measured by stepping from code 5 to 255, and from code 255 to 5.
Note 10: Actual output voltage at full scale is 255/256 × V
REFDAC
.
Note 11: Resistance is open when configured as GPIO or in shutdown.
Note 12: AV
Positive Digital Supply Voltage, +2.7V to +3.6V for MAX1233, +4.75V to +5.25V for MAX1234. Bypass
with a 0.1µF capacitor. Must be within 300mV of AV
DD
.
2AV
DD
Positive Analog Supply Voltage, +2.7V to +3.6V for MAX1233, +4.75V to +5.25V for MAX1234.
Bypass with a 0.1µF capacitor. Must be within 300mV of DV
DD
.
3*X+X+ Position Input
4*Y+Y+ Position Input
5*X-X- Position Input
6*Y-Y- Position Input
7GNDAnalog and Digital Ground
8*BAT1Battery Monitoring Input 1. Measures battery voltages up to 6V.
9*BAT2Battery Monitoring Input 2. Measures battery voltages up to 6V.
10*AUX1Auxiliary Analog Input 1 to ADC. Measures analog voltages from zero to V
REF
.
11*AUX2Auxiliary Analog Input 2 to ADC. Measures analog voltages from zero to V
REF
.
12REF
Voltage Reference Output/Input. Reference voltage for analog-to-digital conversion. In internal
reference mode, the reference buffer provides a 2.5V or 1.0V nominal output. In external reference
mode, apply a reference voltage between 1.0V and AV
DD
. Bypass REF to GND with a 0.1µF
capacitor in the external reference mode only.
13
DAC Voltage Output; 0.9 × AVDD Full Scale
14R4Keypad Row 4. Can be reconfigured as GPIO3.
15R3Keypad Row 3. Can be reconfigured as GPIO2.
16R2Keypad Row 2. Can be reconfigured as GPIO1.
17R1Keypad Row 1. Can be reconfigured as GPIO0.
18C1Keypad Column 1. Can be reconfigured as GPIO4.
Pin Description
DACOUT
MAX1233/MAX1234
±15kV ESD-Protected Touch-Screen
Controllers Include DAC and Keypad Controller
The MAX1233/MAX1234 are 4-wire touch-screen controllers. Figure 1 shows the functional diagram of the
MAX1233/MAX1234. Each device includes a 12-bit sampling ADC, 8-bit voltage output DAC, keypad scanner
that can also be configured as a GPIO, internal clock,
reference, temperature sensor, two battery monitor
inputs, two auxiliary analog inputs, SPI/QSPI/
MICROWIRE-compatible serial interface, and low onresistance switches for driving touch screens.
The 16-bit register inside the MAX1233/MAX1234
allows for easy control and stores results that can be
read at any time. The BUSY output indicates that a
functional operation is in progress. The PENIRQ andKEYIRQ outputs, respectively, indicate that a screen
touch or a key press has occurred.
Touch-Screen Operation
The 4-wire touch-screen controller works by creating a
voltage gradient across the vertical or horizontal resistive touch screen connected to the analog inputs of the
MAX1233/MAX1234, as shown in Figure 2. The voltage
across the touch-screen panels is applied through internal MOSFET switches that connect each resistive layer
to AVDDand ground. For example, to measure the Y
position when a pointing device presses on the touch
screen, the Y+ and Y- drivers are turned on, connecting
one side of the vertical resistive layer to AVDDand the
other side to ground. The horizontal resistive layer functions as a sense line. One side of this resistive layer gets
connected to the X+ input, while the other side is left
open or floating. The point where the touch screen is
pressed brings the two resistive layers in contact and
creates a voltage-divider at that point. The data converter senses the voltage at the point of contact through the
X+ input and digitizes it.
12-Bit ADC
Analog Inputs
Figure 3 shows a block diagram of the ADC’s analog
input section including the input multiplexer, the differential input, and the differential reference. The input multiplexer switches between X+, X-, Y+, Y-, AUX1, AUX2,
BAT1, BAT2, and the internal temperature sensor.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens, and more time must be
allowed. The acquisition time (t
ACQ
) is the maximum
time the device takes to acquire the input signal to 12bit accuracy. Configure t
ACQ
by writing to the ADC
control register. See Table 1 for the maximum input signal source impedance (R
SOURCE
) for complete settling
during acquisition.
Accommodate higher source impedances by placing a
0.1µF capacitor between the analog input and GND.
Input Bandwidth
The ADC’s input-tracking circuitry has a 0.5MHz smallsignal bandwidth. To avoid high-frequency signals
being aliased into the frequency band of interest, antialias filtering is recommended.
Pin Description (continued)
*
ESD protected: ±8kV Contact, ±15kV Air.
PINNAMEFUNCTION
19C2Keypad Column 2. Can be reconfigured as GPIO5.
20C3Keypad Column 3. Can be reconfigured as GPIO6.
21C4Keypad Column 4. Can be reconfigured as GPIO7.
22KEYIRQActive-Low Keypad Interrupt. KEYIRQ is low when a key press is detected.
23PENIRQActive-Low Pen Touch Interrupt. PENIRQ is low when a screen touch is detected.
24DOUTSerial Data Output. Data is clocked out at SCLK falling edge. High impedance when CS is high.
25BUSY
26DINSerial Data Input. Data is clocked in on the rising edge of SCLK.
27SCLK
28CS
—EP
Active-Low Busy Output. BUSY goes low and stays low during each functional operation. The host
controller should wait until BUSY is high again before using the serial interface.
Serial Clock Input. Clocks data in and out of the serial interface and sets the conversion speed (duty
cycle must be 30% to 70%).
Active-Low Chip Select. Data is not clocked into DIN unless CS is low. When CS is high, DOUT is
high impedance.
Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal
performance. Not intended as an electrical connection point.
Internal protection diodes that clamp the analog input
to AVDDand GND allow the analog input pins to swing
from GND - 0.3V to AVDD+ 0.3V without damage.
Analog inputs must not exceed AV
DD
by more than
50mV or be lower than GND by more than 50mV for
accurate conversions. If an off-channel analog input
voltage exceeds the supplies, limit the input current to
50mA. All analog inputs are also fully ESD protected
to ±8kV, using the Contact-Discharge method and
±15kV using the Air-Gap method specified in IEC1000-4-2.
Reference for ADC
Internal Reference
The MAX1233/MAX1234 offer an internal voltage reference for the ADC that can be set to +1.0V or +2.5V. The
MAX1233/MAX1234 typically use the internal reference
for battery monitoring, temperature measurement, and for
Figure 3. Simplified Diagram of Analog Input Section
measurement of the auxiliary inputs. Figure 4 shows the
on-chip reference circuitry of the MAX1233/MAX1234.
Set the internal reference voltage by writing to the RFV
bits in the ADC control register (see Tables 4, 5, and 12).
The MAX1233/MAX1234 can accept an external reference connected to REF for ADC conversion.
External Reference
The MAX1233/MAX1234 can accept an external reference connected to the REF pin for ADC conversions.
The internal reference should be disabled (RES1 = 1)
when using an external reference. At a conversion rate
of 50ksps, an external reference at REF must deliver up
to 15µA of load current and have 50Ω or less output
impedance. If the external reference has high output
impedance or is noisy, bypass it close to the REF pin
with a 0.1µF capacitor.
Selecting Internal or External Reference
Set the type of reference being used by programming
the ADC control register. To select the internal reference, clock zeros into bits [A/D3:A/D0] and a zero to bit
RES1, as shown in the
Control Registers
section. To
change to external reference mode, clock zeros into
bits [A/D3:A/D0] and a one to bit RES1. See Table 13
for more information about selecting an internal or
external reference for the ADC.
Reference Power Modes
Auto Power-Down Mode (RES1 = RES0 = 0)
The MAX1233/MAX1234 are in auto power-down mode
at initial power-up. Set the RES1 and RES0 bits to zero
to use the MAX1233/MAX1234 in the auto power-down
mode. In this mode, the internal reference is normally
off. When a command to perform a battery measure-
ment, temperature measurement, or auxiliary input
measurement is written to the ADC control register, the
device powers on the internal reference, waits for the
internal reference to settle, completes the requested
scan, and powers down the internal reference. The reference power delay depends upon the ADC resolution
selected (see Table 8). Do not bypass REF with an
external capacitor when performing scans in auto
power-down mode.
Full-Power Mode (RES1 = 0, RES0 = 1)
In the full-power mode, the RES1 bit is set LOW and
RES0 bit is set HIGH. In this mode, the device is powered up and the internal ADC reference is always ON.
The MAX1233/MAX1234 internal reference remains fully
powered after completing a scan.
Internal Clock
The MAX1233/MAX1234 operate from an internal oscillator, which is accurate to within 20% of the 10MHz
specified clock rate. The internal oscillator controls the
timing of the acquisition, conversion, touch-screen settling, reference power-up, and keypad debounce times.
8-Bit DAC
The MAX1233/MAX1234 have a voltage-output, true 8-bit
monotonic DAC with less than 1LSB integral nonlinearity
error and less than 1LSB differential nonlinearity error. It
requires a supply current of only 150µA (typ) and provides a buffered voltage output. The DAC is at midscale
code at power-up and remains there until a new code is
written to the DAC register. During shutdown, the DAC’s
output is pulled to ground with a 1MΩ load.
The internal DAC can be used in various system applications such as LCD/TFT-bias control, automatic tuning
(VCO), power amplifier bias control, programmable
threshold levels, and automatic gain control (AGC).
The 8-bit DAC in the MAX1233/MAX1234 employs a
current-steering topology as shown in Figure 5. At the
core of this DAC is a reference voltage-to-current converter (V/I) that generates a reference current. This current is mirrored to 255 equally weighted current
sources. DAC switches control the outputs of these current mirrors so that only the desired fraction of the total
current-mirror currents is steered to the DAC output.
The current is then converted to a voltage across a
resistor, and the output amplifier buffers this voltage.
DAC Output Voltage
The 8-bit DAC code is binary unipolar with 1LSB =
(V
REF
/256). The DAC has a full-scale output voltage of
(0.9 × AV
DD
- 1LSB).
Figure 4. Block Diagram of the Internal Reference
+1.25V
BANDGAP
3R
2R
2x
REF PIN
OPTIONAL
MAX1233/MAX1234
±15kV ESD-Protected Touch-Screen
Controllers Include DAC and Keypad Controller
The DAC voltage output is an internally buffered unitygain follower that slews at up to ±0.4V/µs. The output
can swing from zero to full scale. With a 1/4FS to 3/4FS
output transition, the amplifier output typically settles to
1/2LSB in less than 5µs when loaded with 10kΩ in parallel with 50pF. The buffer amplifier is stable with any
combination of resistive loads >10kΩ and capacitive
loads <50pF.
Power-On Reset
All registers of the MAX1233/MAX1234 power up at a
default zero state, except the DAC data register, which
is set to 10000000, so the output is at midscale.
Keypad Controller and GPIO
The keypad controller is designed to interface a matrixtype 4 rows × 4 columns (16 keys or fewer) keypad to a
host controller. The KEY control register controls keypad
interrupt, keypad scan, and keypad debounce times.
The KeyMask and ColumnMask registers enable masking of a particular key or an entire column of the keypad
when they are not in use. The MAX1233/MAX1234 offer
two keypad data registers. KPData1 is the pending register. KPData2 holds keypad scan results of only the
unmasked keys. If 12 or fewer keys are being monitored,
one or more of the row/column pins of the
MAX1233/MAX1234 can be software programmed as
GPIO pins.
Touch-Screen Detection
Touch-screen detection can be enabled or disabled by
writing to the ADC control register as shown in Table 4.
Touch-screen detection is disabled at initial power-up.
Once touch-screen detection is enabled, the Y- driver
is on and the Y- pin is connected to GND. The X+ pin is
internally pulled to AVDDthrough a 1MΩ resistor as
shown in Figure 6. When the screen is touched, the X+
pin is pulled to GND through the touch screen and a
touch is detected.
When the 1MΩ pullup resistor is first connected, the X+
pin can be floating near ground. To prevent false touch
detection in this case, the X+ pin is precharged high for
0.1µs using the 7Ω PMOS driver before touch detection
begins.
Key-Press Detection
Key-press detection can be enabled or disabled by
writing to the keypad control register as shown in Table
17. Key-press detection is disabled at initial power-up.
Once key-press detection is enabled, the C_ pins are
internally connected to DV
DD
and the R_ pins are internally pulled to GND through a 16kΩ resistor. When a
key is pressed, the associated row pin is pulled to
DVDDand the key press is detected. Figure 7 shows
the key-press detection circuitry.
Interrupts
PEN Interrupt Request (PENIRQ)
The PENIRQ output can be used to alert the host controller of a screen touch. The PENIRQ output is normally
high and goes low after a screen touch is detected.
PENIRQ returns high only after a touch-screen scan is
completed. PENIRQ does not go low again until one of
the touch-screen data registers is read. Figures 8a and
8b show the timing diagrams for the PENIRQ pin.
Keypad Interrupt Request (KEYIRQ)
The KEYIRQ output can be used to alert the host controller of a key press. The KEYIRQ output is normally
high and goes low after a key press is detected.
KEYIRQ returns high only after a key-press scan is
completed. KEYIRQ does not go low again until one of
the key-press data registers is read. Figures 9a and 9b
show the timing diagrams for the KEYIRQ pin.
Busy Indicator (
BUSY
)
BUSY informs the host processor that a scan is in
progress. BUSY is normally high and goes low and
stays low during each functional operation. The host
controller should wait until BUSY is high again before
using the serial interface.
Digital Interface
The MAX1233/MAX1234 interface to the host controller
through a standard 3-wire serial interface at up to
10MHz. DIN and CS are the digital inputs to the
MAX1233/MAX1234. DOUT is the serial data output.
Data is clocked out at the SCLK falling edge and is
high impedance when CS is high. When performing an
ADC scan, CS must de-assert high before the end of
the first conversion, otherwise the conversion results
will not be stored. PENIRQ and KEYIRQ communicate
interrupts from the touch-screen and keypad controllers
to the host processor when a screen touch or a key
press is detected. BUSY informs the host processor that
a scan is in progress. In addition to these digital I/Os, the
row and column pins of the keypad controller can be
programmed as GPIO pins.
Communications Protocol
The MAX1233/MAX1234 are controlled by reading from
and writing to registers through the 3-wire serial interface. These registers are addressed through a 16-bit
command that is sent prior to the data. The command
is shown in Table 2.
The first 16 bits after the falling edge of CS contain the
command word. The command word begins with an
R/W bit, which specifies the direction of data flow on
the serial bus. Bits 14 through 7 are reserved for future
use. Bit 6 specifies the page of memory in which the
desired register is located. The last 6 bits specify the
address of the desired register. The next 16 bits of data
are read from or written to the address specified in the
command word. After 32 clock cycles, the interface
automatically increments its address pointer and continues reading or writing until the rising edge of CS, or
until it reaches the end of the page.
Figure 9a. Timing Diagram for Key-Press-Initiated Debounce
Scan
Figure 9b. Timing Diagram for Host-Initiated Keypad
Debounce Scan
In order to read the entire first page of memory, for
example, the host processor must send the
MAX1233/MAX1234 the command 0x8000
H
. The
MAX1233/MAX1234 then begin clocking out 16-bit data
starting with the X-data register. In order to write to the
second page of memory, the host processor sends the
MAX1233/MAX1234 the command 0x0040H. The succeeding data is then written in 16-bit words beginning
with the ADC control register. Figures 10a and 10b show
a complete write and read operation, respectively,
between the processor and the MAX1233/MAX1234.
Memory Map
The MAX1233/MAX1234s’ internal memory is divided
into two pages—one for data and one for control, each
of which contains thirty-two 16-bit registers.
Control Registers
Table 3 provides a summary of all registers and bit
locations of the MAX1233/MAX1234.
ADC Control Register
The ADC measures touch position, touch pressure, battery voltage, auxiliary analog inputs, and temperature.
The ADC control register determines which input is
selected and converted. Tables 4 and 5 show the format and bit descriptions for the ADC control register.
Figure 10a. Timing Diagram of Write Operation
Figure 10b. Timing Diagram of Read Operation
Table 4. ADC Control Register (Write 0x0040/Read 0x8040)
These bits are used to control or monitor ADC scans.
Bits 10-13: ADC Scan Select
These bits control which input to convert and which converter mode is used. The bits are identical regardless of a
read or write. See Table 7 for details about using these bits.
Bits 8-9: ADC Resolution Control
These bits specify the ADC resolution and are identical
regardless of read or write. Table 8 shows how to use
these bits to set the resolution.
Bits 6-7: Converter Averaging Control
These bits specify the number of data averages the
converter performs. Table 9 shows how to program for
the desired number of averages. When averaging is
used, ADSTS and BUSY indicate the converter is busy
until all conversions needed for the averaging finish.
These bits are identical, regardless of read or write.
Bits 4-5: ADC Conversion Rate Control
These bits specify the internal conversion rate, which
the ADC uses to perform a single conversion, as shown
in Table 10. Lowering the conversion rate also reduces
power consumption. These bits are identical, regardless of read or write.
Table 5. ADC Control Register Bit Descriptions (Write 0x0040/Read 0x8040)
Applicable only for temperature, battery, or auxiliary
measurements in auto power-up reference mode.
Table 9. ADC Averaging Control
Table 10. ADC Conversion Rate Control
A/D3 A/D2 A/D1 A/D0FUNCTION
0000
0001Measures X/Y touch position and returns results to the X and Y data registers.
0010
0011Measures X touch position and returns results to the X data register.
0100Measures Y touch position and returns results to the Y data register.
0101Measures Z1/Z2 touch pressure and returns results to the Z1 and Z2 data register.
0110Measures Battery Input 1 through a 4:1 divider and returns results to the BAT1 data register.
0111Measures Battery Input 2 through a 4:1 divider and returns results to the BAT2 data register.
1000Measures Auxiliary Input 1 and returns results to the AUX1 data register.
1001Measures Auxiliary Input 2 and returns results to the AUX2 data register.
1010Measures temperature (single ended) and returns results to the TEMP1 data register.
1011
1100Measures temperature (differential) and returns results to the TEMP1 and TEMP2 data registers.
1101Turns on Y+, Y- drivers. No measurement is performed.
1110Turns on X+, X- drivers. No measurement is performed.
1111Turns on Y+, X- drivers. No measurement is performed.
Configures the ADC reference as selected by RES [1:0] bits as shown in Table 13. No measurement
is performed.
Measures X/Y touch position and Z1/ Z2 touch pressure and returns results to the X, Y, Z1, and Z2
data registers.
Measures Battery Input 1, Battery Input 2, Auxiliary Input 1, Auxiliary Input 2, and temperature
(differential), and returns results to the appropriate data registers.
These bits specify the time delay from pen-touch detection to a conversion start. This allows the selection of the
appropriate settling time for the touch screen being used.
Table 11 shows how to set the settling time. These bits
are identical, regardless of read or write.
Bit 0: ADC Internal Reference Voltage Control
This bit selects the ADC internal reference voltage,
either +1.0V or +2.5V. This bit is identical, regardless of
read or write. The reference control bit is shown in
Table 12.
Internal ADC Reference Power-Down Control
The ADC control register controls the power setting of
the internal ADC reference. Zeros must be written to
bits A/D3–A/D0 to control internal reference power-up
followed by the appropriate logic at the RES1 and RES0
bits. Table 13 shows the internal ADC reference powerdown control.
DAC Control Register
The MSB in this control register determines the powerdown control of the on-board DAC. Table 14 shows the
DAC control register. Writing a zero to bit 15 (DAPD)
powers up the DAC, while writing a 1 powers down the
DAC. Table 15 describes the DAC control register contents, while Table 16 shows the DAC power-down bit.
Keypad Control Registers
The keypad control register, keypad mask register, and
keypad column mask control register control the keypad scanner in the MAX1233/MAX1234. The keypad
control register (Table 17) controls scanning and
debouncing, while the keypad mask register (Table 22)
and the keypad column mask control register (Table 24),
Table 11. Touch-Screen Settling Time
Control*
*
Applicable only for X, Y, Z1, and Z2 measurements.
Table 13. Internal ADC Reference Auto Power-Up Control
Table 12. ADC Reference Control Bit
Table 14. DAC Control Register (Write 0x0042/Read 0x8042)
BIT
DESCRIPTION
15 (MSB)
DAC powered down
[14:0]
0Reserved
Table 15. DAC Control Register
Descriptions
DAPCFUNCTION
0DAC powered up
1DAC powered down
Table 16. DAC Power-Down Bit
ST2ST1ST0SETTLING TIME
000Settling time: 0µs
001Settling time: 100µs
010Settling time: 500µs
011Settling time: 1ms
100Settling time: 5ms
101Settling time: 10ms
110Settling time: 50ms
111Settling time: 100ms
NAME
DAPD
RFVFUNCTION
0+1.0V reference
1+2.5V reference
[A/D3:A/D0]RES1RES0
000000Internal
000001InternalAlways powered up
000010ExternalAlways powered down
000011ExternalAlways powered down
A DC R EF ER EN C E
SOURCE
Power up, wait for reference to settle, and power down again for
each temperature, battery, or auxiliary scan (auto power-up mode)
allowing certain keys to be masked from detection.
Tables 18–21 show the programmable bits of the keypad
control register. Tables 23, 24, and 25 show the programmable bits of the keypad mask registers. The
Keypad
Controller and GPIO
section provides more details.
GPIO Control Register
The GPIO control register and the GPIO pullup register
allow the keypad controller’s row and column inputs to be
configured as up to eight parallel I/O pins. Tables 26 and
27 show the GPIO control register layout and control register descriptions. Tables 28 and 29 show the GPIO pullup
disable register and associated descriptions. For more
information, see the
The data results from conversions or keypad scans are
held in the data registers of the MAX1233/MAX1234.
During power-up, all of these data registers with the
exception of the DAC data register default to 0000
H
.
The DAC register defaults to 1000
H
.
Analog Input Data Registers
Table 30 shows the format of the X, Y, Z1, Z2, BAT1,
BAT2, AUX1, AUX2, TEMP1, and TEMP2 data registers.
The data format for these registers is right justified
beginning with bit 11. Data written through the serial
interface to these registers is not stored.
Keypad Data Registers
Table 31 shows the formatting of the keypad data registers, while Tables 32, 33, and 34 provide individual register bit descriptions. These registers have the same
format as the keypad mask register. Each bit represents one key on the keypad. Table 35 shows a map of
a 16-key keypad. Data written through the serial interface to these registers is not stored.
Table 26. GPIO Control Register (Write 0x004F/Read 0x804F)
Table 27. GPIO Control Register Bit Descriptions (Write 0x004F/Read 0x804F)
The DAC data register stores data that is to be written
to the 8-bit DAC. Table 36 shows the configuration of
the DAC data register. It is right justified with bit 7–bit 0
storing the input data.
GPIO Data Register
Tables 37 and 38 show the format and descriptions for
the GPIO data register. The register is left justified with
data in bit 15–bit 8. Reading the GPIO data register
gives the state of the R_ and C_ pins. Data written to
the GPIO data register appears on those R_ and C_
pins, which are configured as general-purpose outputs.
Data written to pins not configured as general-purpose
outputs is not stored.
ADC Transfer Function
The MAX1233/MAX1234 output data is in straight binary format as shown in Figure 11. This figure shows the
ideal output code for the given input voltage and does
not include the effects of offset error, gain error, noise,
or nonlinearity.
Applications Information
Programmable 8-/10-/12-Bit Resolution
The MAX1233/MAX1234 provide the option of three different resolutions for the ADC: 8, 10, or 12 bits. Lower
resolutions are practical for some measurements such
as touch pressure. Lower resolution conversions have
smaller conversion times and therefore consume less
power. Program the resolution of the MAX1233/
MAX1234 12-bit ADCs by writing to the RES1 and RES0
bits in the ADC control register. When the MAX1233/
MAX1234 power up, both bits are set to zero so the resolution is set to 8 bits with a 31µs internally timed reference power-up delay as indicated by the ADC
resolution control table. As explained in the control register section, the RES1 and RES0 bits control the refer-
Table 35. Keypad to Key Bit Mapping
Table 36. DAC Data Register(Write 0x000B/Read 0x800B)
Table 37. GPIO Data Register (Write 0x000F/Read 0x800F)
Table 38. GPIO Data Register Bit Descriptions (Write 0x000F/Read 0x800F)
ence power-up status when the A/D0–A/D3 bits are
zero. These values can be set initially on power-up.
(Subsequently A/D0–A/D3 bits are not zero, and any
other value of these bits is exclusive to ADC resolution
programming.)
Differential Ratiometric Touch-Position
Measurement
The MAX1233/MAX1234 provide differential conversions. Figure 12 shows the switching matrix configuration for Y coordinate measurement. The +REF and -REF
inputs are connected directly to Y+ and Y-. The conversion result is a percentage of the external resistances,
and is unaffected by variation in the total touch-screen
resistance or the on-resistance of the internal switching
matrix. The touch screen remains powered during the
acquisition and conversion process.
Touch-Screen Settling
There are two mechanisms that affect the voltage level
at the point where the touch panel is pressed. One is
electrical ringing due to parasitic capacitance between
the top and bottom layers of the touch screen and the
other is the mechanical bouncing caused by vibration
of the top layer of the touch screen. Thus, the input sig-
nal, reference, or both may not settle into their final
steady-state values before the ADC samples the inputs,
and the reference voltage may continue to change during the conversion cycle. The MAX1233/MAX1234 can
be programmed to wait for a fixed amount of time after
a screen touch has been detected before beginning a
scan. Use the touch-screen settling control bits in the
ADC control register (Table 11) to set the settling delay
to between zero and 100ms.
The settling problem is amplified in some applications
where external filter capacitors may be required across
the touch screen to filter noise that may be generated
by the LCD panel or backlight circuitry, etc. The values
of these capacitors cause an additional settling time
requirement when the panel is touched. Any failure to
settle before conversion start may show up as a gain
error. Average the conversion result by writing to the
ADC control register, as shown in Table 10, to minimize
noise.
Touch-Pressure Measurement
The MAX1233/MAX1234 provide two methods of measurement of the pressure applied to the touch screen.
Although 8-bit resolution is typically sufficient, the following calculations use 12-bit resolution demonstrating the
maximum precision of the MAX1233/MAX1234. Figure 13
shows the pressure measurement block diagram.
The first method performs pressure measurements
using a known X-plate resistance. After completing
three conversions, X-position, Z1-position, and Z2 position, use the following equation to calculate R
TOUCH
:
The second method requires knowing both the X-plate
and Y-plate resistance. Three touch-screen conversions are required in this method as well for measurement of the X-position, Y-position, and Z- position of the
touch screen. Use the following equation to calculate
R
TOUCH
:
R
R
Z
X
Z
R
Y
TOUCH
XPLATEPOSITION
YPLATE
POSITION
=
⎛
⎝
⎜
⎞
⎠
⎟
×
⎛
⎝
⎜
⎞
⎠
⎟
×
⎛
⎝
⎜
⎞
⎠
⎟
−
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥
⎧
⎨
⎪
⎩
⎪
⎫
⎬
⎪
⎭
⎪
−×
⎛
⎝
⎜
⎞
⎠
⎟
⎧
⎨
⎪
⎩
⎪
⎫
⎬
⎪
⎭
⎪
11
4096
4096
1
4096
RR
XZ
Z
TOUCHXPLATE
POSITION
=
()
×
⎛
⎝
⎜
⎞
⎠
⎟
×
⎛
⎝
⎜
⎞
⎠
⎟
−
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥
4096
1
2
1
Figure 12. Ratiometric Y-Coordinate Measurement
+AV
DD
FORCE LINE
Y+
X+
SENSE LINE
+IN
-IN
SENSE LINE
+REF
CONVERTER
-REF
FORCE LINE
Y-
GND
Battery-Voltage Monitors
Two dedicated analog inputs (BAT1 and BAT2) allow the
MAX1233/MAX1234 to monitor the battery voltages prior
to the DC/DC converter. Figure 14 shows the battery voltage monitoring circuitry. The MAX1233/ MAX1234 directly monitor battery voltages from 0.5V to 6V. An internal
resistor network divides down BAT1 and BAT2 by 4 so
that a 6V battery voltage results in a 1.5V input to the
ADC. To minimize power consumption, the divider is only
enabled during the sampling of BAT1 and BAT2. Figure
15 illustrates the process of battery input reading.
Two auxiliary analog inputs (AUX1 and AUX2) allow the
MAX1233/MAX1234 to monitor analog input voltages
from zero to V
REF
. Figure 16 illustrates the process of
auxiliary input reading.
Temperature Measurements
The MAX1233/MAX1234 provide two temperature measurement options: a single-ended conversion method
and a differential conversion method. Both temperature
measurement techniques rely on the semiconductor
junction’s operational characteristics at a fixed current
level. The forward diode voltage (VBE) vs. temperature is
a well-defined characteristic. The ambient temperature
can be predicted in applications by knowing the value
of the V
BE
voltage at a fixed temperature and then monitoring the delta of that voltage as the temperature
changes. Figure 17 illustrates the functional block of the
internal temperature sensor.
The single conversion method requires calibration at a
known temperature, but only requires a single reading to
predict the ambient temperature. First, the internal diode
forward bias voltage is measured by the ADC at a
known temperature. Subsequent diode measurements
provide an estimate of the ambient temperature through
extrapolation. This assumes a temperature coefficient of
-2.1mV/°C. The single conversion method results in a
resolution of 0.29°C/LSB (2.5V reference) and
0.12°C/LSB (1.0V reference) with a typical accuracy of
±2°C. Figure 18 shows the flowchart for the single temperature measurement.
The differential conversion method uses two measurement points. The first measurement is performed with a
fixed bias current into the internal diode. The second
measurement is performed with a fixed multiple of the
original bias current. The voltage difference between the
first and second conversion is proportional to the
absolute temperature and is expressed by the following
formula:
ΔV
BE
= (kT/q) ✕ ln(N)
where:
ΔVBE= difference in diode voltage
N = current ratio of the second measurement to the first
measurement
k = Boltzmann’s constant (1.38 × 10
-23
eV/°Kelvin)
q = electron charge (1.60 × 10
-19
C)
T = temperature in °Kelvin
The resultant equation solving for °K is:
T(°K) = q x ΔV / (k × ln(N))
Figure 16. Auxiliary Input Flowchart
Figure 17. Internal Block Diagram of Temperature Sensor
where:
ΔV = V (I N) - V (I1) (in mV)
T(°K) = 2.68(°K/mV) ×ΔV(mV)
T(°C) = [2.68(°K/mV) ×ΔV(mV) - 273°K]°C/ °K
This differential conversion method does not require a
test temperature calibration and can provide much
improved absolute temperature measurement. In the
differential conversion method, however, the resolution
is 1.6°C/LSB (2.5V reference) and 0.65°C/LSB (1V reference) with a typical accuracy of ±3°C. Figure 19
shows the differential temperature measurementprocess.
Note: The bias current for each diode temperature
measurement is only turned ON during the acquisition
and, therefore, does not noticeably increase power
consumption.
Figure 18. Single Temperature Measurement Process
Figure 19. Differential Temperature Measurement Process
HOST WRITES
CONTROL REGISTER
START CLOCK
NO
REFERENCE IN
AUTO POWER-DOWN
POWER UP REFERENCE
TEMPERATURE INPUT 1
ADC
SET BUSY
LOW
IS ADC
MODE?
YES
POWER UP
ADC
CONVERT
TEMPERATURE INPUT 1
POWER DOWN
ADC
POWER DOWN REFERENCE
HOST WRITES
CONTROL REGISTER
START CLOCK
NO
REFERENCE IN
AUTO POWER-DOWN
POWER UP REFERENCE
TEMPERATURE INPUT 1
ADC
SET BUSY
LOW
IS ADC
MODE?
YES
POWER UP
ADC
CONVERT
TEMPERATURE INPUT 1
AND TEMPERATURE INPUT 2
CONVERT
TEMPERATURE INPUT 2
NO
STORE TEMPERATURE INPUT 2 IN
IS DATA
AVERAGING DONE?
YES
TEMP2 REGISTER
POWER DOWN
ADC
POWER DOWN REFERENCE
SET BUSY HIGH
NO
STORE TEMPERATURE INPUT 1 IN
IS DATA
AVERAGING DONE?
YES
TEMP1 REGISTER
TURN OFF CLOCK
DONE
SET BUSY HIGH
NO
STORE TEMPERATURE INPUT 1 IN
IS DATA
AVERAGING DONE?
YES
TEMP1 REGISTER
TURN OFF CLOCK
DONE
MAX1233/MAX1234
±15kV ESD-Protected Touch-Screen
Controllers Include DAC and Keypad Controller
Use this scan to make periodic measurements of both
battery inputs, both auxiliary inputs, and both temperature inputs. The respective data registers have the latest results at the end of each cycle. Thus, a single write
by the host to the MAX1233/MAX1234 ADC control register results in six different measurements being made.
Figure 20 shows this scan operation.
Touch-Initiated Screen Scans
(PENSTS = 1; ADSTS = 0)
In the touch-initiated screen-scan mode, the
MAX1233/MAX1234 automatically perform a touchscreen scan upon detecting a screen touch. The touchscreen scans performed are determined by the
[A/D3:A/D0] written to the ADC control register. Figure
21 shows the flowchart for a complete touch-initiated Xand Y- coordinate scan. Selection of resolution, conversion rate, averaging, and touch-screen settling time
determine the overall conversion time.
Figure 22 shows the complete flowchart for a touchinitiated X, Y, and Z scan.
Table 38 shows ADSTS Bit Operation.
Host-Initiated Screen Scans
(PENSTS = ADSTS = 0)
In this mode, the host processor decides when a touchscreen scan begins. The MAX1233/MAX1234 detect a
screen touch and drive PENIRQ LOW. The host recognizes the interrupt request and can choose to write to
the ADC control register to select a touch-screen scan
function (PENSTS = ADSTS = 0). Figures 23 and 24
show the process of a host-initiated screen scan.
Key-Press Initiated Debounce Scan
(KEYSTS1 = 1, KEYSTS0 =0)
In the key-press initiated debounce mode, the
MAX1233/MAX1234 automatically perform a debounce
upon detecting a key press. Key scanning begins once
a key press has been detected and ends when a key
press has been debounced (Figures 25 and 9a).
Host-Initiated Debounce Scan
In this mode, the host processor decides when a
debounce scan begins. The MAX1233/MAX1234 detect
a key press and drive KEYIRQ low. The host processor
recognizes the interrupt request and can choose to
write to the keypad control register to initiate a
debounce scan (Figures 26 and 9b).
Keypad Debouncing
Keys are debounced either when (1) a key press has
been detected, or (2) when commanded by the host MPU.
The keys scanned by the keypad row and column pins
are debounced for a period of time (debounce period)
as determined by bits [DBN2:DBN0] of the keypad control register.
The keypad controller continues scanning until the keypad
stays in the same state for an entire debounce period.
Keypad Data
Keypad data can be read out of either the keypad data
status register (maskable), or the keypad data pending
register (not maskable). The keypad mask register is
used to mask individual keys in the keypad data status
register.
GPIO Control
Write to bits [GP7:GP0] of the GPIO control register to
configure one or more of the R_/C_pins as a GPIO pin.
Write to bits [OE7:OE0] of the GPIO control register to
configure the pins as an input or an output. GPIO data
can be read from or written to the GPIO data register. A
read returns the logic state of the GPIO pin. A write sets
the logic state of a GPIO output pin. Writing to a GPIO
input pin has no effect.
GPIO Pullup Disable Register
When programmed as GPIO output, by default, the
GPIO pins are active CMOS outputs. Write a 1 to the
pullup disable register to configure the GPIO output as
an open-drain output.
Using the 8-Bit DAC for LCD/TFT
Contrast Control
Design Example:
The 8-bit DAC offers the ability to control biasing of
LCD/TFT screens. In the circuit of Figure 27, it is
desired to have the MAX1677 DC-DC converter’s V
OUT
to be adjustable.
The minimum and maximum DAC voltages (V
DAC(HIGH)
and V
DAC(LOW)
) can be found in the
Electrical
Characteristics
table.
The output voltage of the MAX1677 (V
OUT
) can be cal-
culated by noting the following equations:
V
OUT
= V
REFDAC
+ i1R1[Equation 1]
i1= i2+ i
3
[Equation 2]
i
2
= V
REFDAC
/ R2[Equation 3]
i
3
= (V
REFDAC
- V
DAC
) / R3[Equation 4]
Substituting equations 2, 3, and 4 into equation 1
yields:
Equation 5 shows that the maximum output voltage occurs
for the minimum DAC voltage, and that the minimum
output voltage occurs for the maximum DAC voltage.
To ensure that the desired output swing is achieved,
choose appropriate values of R1, R2, and R3.
Calculate V
OUTMAX
using the following equation:
V
OUTMAX
= V
REFMAX
+ (R1
MAX
/ R2
MIN)VREFMAX
+ (R1
MAX
/ R3
MIN
) (V
REFMAX
- V
DACMIN
)
[Equation 6]
If V
OUTMAX
exceeds the maximum ratings of the
LCD/TFT display, the DAC codes that cause the output
voltage to go too high must be avoided.
Calculate V
OUTMIN
using the following equation:
V
OUTMIN
= V
REFMIN
+ (R1
MIN
/ R2
MAX)VREFMIN
+
(R1
MAX
/ R3
MIN
) (V
REFMIN
- V
DACMAX
)
[Equation 7]
If V
OUTMIN
is too low for desired operation, avoid the DAC
codes, which cause the output voltage to go too low.
Connection to Standard Interface
SPI and MICROWIRE Interfaces
When using an SPI interface (Figure 28a) or
MICROWIRE (Figure 28b), set the CPOL = CPHA = 0.
At least four 8-bit operations are necessary to read or
write data to/from the MAX1233/MAX1234. DOUT data
transitions on the serial clock’s falling edge and is
clocked into the µP on the SCLK’s rising edge. The first
Figure 27. LCD Contrast Control Circuit
Figure 28a. SPI Interface
Figure 28b. MICROWIRE Interface
V
BATT
MAX1233
MAX1234
AV
DD
DAC
DACOUT
FEEDBACK
RESISTORS
i
3R2
R1R3i
SIMPLIFIED DC/DC CONVERTER
1
i
2
ERROR AMP
V
REF
1.25V
MAX1677
CONTROL
V
OUT
(LCD BIAS)
CS
SCK
MISO
SPI
V
DD
SS
MOSI
CS
SCLK
DOUT
DIN
BUSY
PENIRQ
KEYIRQ
MAX1233
MAX1234
CS
SCK
MISO
MICROWIRE
MOSI
CS
SCLK
DOUT
DIN
BUSY
PENIRQ
KEYIRQ
MAX1233
MAX1234
MAX1233/MAX1234
±15kV ESD-Protected Touch-Screen
Controllers Include DAC and Keypad Controller
two 8-bit data streams write the command word into the
MAX1233/MAX1234. The next two 8-bit data streams
can contain either the input or output data.
QSPI Interface
Using the high-speed QSPI interface (Figure 29) with
CPOL = 0 and CPHA = 0, the MAX1233/MAX1234 support a maximum f
SCLK
of 10MHz. DOUT data transitions on the serial clock’s falling edge and is clocked
into the µP on the SCLK’s rising edge.
Layout, Grounding, and Bypassing
For best performance, use printed circuit boards with
good layouts; do not use wire-wrap boards even for
prototyping. Ensure that digital and analog signal lines
are separated from each other. Do not run analog and
digital (especially clock) lines parallel to one another, or
digital lines underneath the ADC package.
Figure 30 shows the recommended system ground
connections. Establish a single-point analog ground
(star ground point) at GND. Connect all analog grounds
to the star ground. Connect the digital system ground
to the star ground at this point only. For lowest noise operation, the ground return to the star ground’s power supply
should be low impedance and as short as possible.
High-frequency noise in the power supply may affect
the high-speed comparator in the ADC. Bypass the
supply to the star ground with a 0.1µF capacitor as
close to pins 1 and 2 of the MAX1233/MAX1234 as
possible. Minimize capacitor lead lengths for best supply-noise rejection. If the power supply is very noisy, a
10Ω resistor can be connected as a lowpass filter.
While using the MAX1233/MAX1234 with a resistive
touch screen, the interconnection between the converter and the touch screen should be as short and robust
as possible. Since resistive touch screens have a low
resistance, longer or loose connections are a source of
error. Noise can also be a major source of error in
touch-screen applications (e.g., applications that
require a backlight LCD panel). This EMI noise can be
coupled through the LCD panel to the touch screen
and cause “flickering” of the converted data. Utilizing a
touch screen with a bottom-side metal layer connected
to ground couples the majority of noise to ground. In
addition, the filter capacitors from Y+, Y-, X+, and Xinputs to ground also help reduce the noise further.
Caution should be observed for settling time of the
touch screen.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the end points of the transfer function,
once offset and gain errors have been nullified. The
static linearity parameters for the MAX1233/MAX1234
are measured using the end-point method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of less than 1LSB guarantees
no missing codes and a monotonic transfer function.
Aperture Jitter
Aperture jitter (tAJ) is the sample-to-sample variation in
the time between the samples.
Aperture Delay
Aperture delay (tAD) is the time defined between the
falling edge of the sampling clock and the instant when
an actual sample is taken.
For a waveform perfectly reconstructed from digital samples, signal-to-noise ratio (SNR) is the ratio of full-scale
analog input (RMS value) to the RMS quantization error
(residual error). The ideal, theoretical minimum analogto-digital noise is caused by quantization error only and
results directly from the ADC’s resolution (N bits):
SNR = (6.02 ✕ N + 1.76) dB
In reality, there are other noise sources besides quantization noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five harmonics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to the
RMS equivalent of all other ADC output signals:
SINAD (dB) = 20 ✕ log (Signal
RMS
/ Noise
RMS
)
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of
quantization noise only. With an input range equal to
the full-scale range of the ADC, calculate the effective
number of bits as follows:
ENOB = (SINAD - 1.76) / 6.02
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the first five harmonics of the input signal to the
fundamental itself. This is expressed as:
where V1is the fundamental amplitude, and V2through
V5are the amplitudes of the 2nd- through 5th-order
harmonics, respectively.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of RMS
amplitude of the fundamental (maximum signal component) to the RMS value of the next-largest distortion
component.
THD
VVVV
V
=×
+++
⎛
⎝
⎜
⎜
⎞
⎠
⎟
⎟
20
2232425
2
1
2
log
Chip Information
TRANSISTOR COUNT: 28,629
Package Information
For the latest package outline information, go to
www.maxim-ic.com/packages
.
PACKAGE TYPEPACKAGE CODEDOCUMENT NO.
28 QFNG2855-2
21-0091
28 TQFNT2855-6
21-0140
MAX1233/MAX1234
±15kV ESD-Protected Touch-Screen
Controllers Include DAC and Keypad Controller
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
44
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600