MAXIM MAX1214 Technical data

General Description

The MAX1214 is a monolithic, 12-bit, 210Msps analog­to-digital converter (ADC) optimized for outstanding
dynamic performance at high-IF frequencies up to
300MHz. The product operates with conversion rates
up to 210Msps while consuming only 820mW.

At 210Msps and an input frequency up to 250MHz, the
MAX1214 achieves a spurious-free dynamic range
(SFDR) of 77.2dBc. Its excellent signal-to-noise ratio
(SNR) of 66dB at 10MHz remains flat (within 2dB) for
input tones up to 300MHz. This ADC yields an excellent
low noise floor of -67.6dBFS, which makes it ideal for
wideband applications such as cable-head end
receivers and power-amplifier predistortion in cellular
base-station transceivers.

The MAX1214 requires a single 1.8V supply. The analog
input is designed for either differential or single-ended
operation and can be AC- or DC-coupled. The ADC also
features a selectable on-chip divide-by-2 clock circuit,
which allows the user to apply clock frequencies as high
as 340MHz. This helps to reduce the phase noise of the
input clock source. A low-voltage differential signal
(LVDS) sampling clock is recommended for best perfor­mance. The converter’s digital outputs are LVDS com­patible and the data format can be selected to be either
two’s complement or offset binary.

The MAX1214 is available in a 68-pin QFN package
with exposed paddle (EP) and is specified over the
industrial (-40°C to +85°C) temperature range.

See the Pin-Compatible Versions table for a complete
selection of 8-bit, 10-bit, and 12-bit high-speed DACs in
this family (with and without input buffers).

Applications

Base-Station Power-Amplifier Linearization

Cable-Head End Receivers

Wireless and Wired Broadband Communication

Communications Test Equipment

Radar and Satellite Subsystems

Features

♦ 210Msps Conversion Rate

♦ Low Noise Floor of -67.6dBFS

♦ Excellent Low-Noise Characteristics

SNR = 65.6dB at fIN= 100MHz
SNR = 65dB at fIN= 250MHz

♦ Excellent Dynamic Range

SFDR = 74.2dBc at f

IN

= 100MHz

SFDR = 77.2dBc at fIN= 250MHz

♦ 59.5dB NPR for f

NOTCH

= 28.8MHz and a Noise

Bandwidth of 50MHz

♦ Single 1.8V Supply

♦ 820mW Power Dissipation at f

SAMPLE

= 210MHz

and f

IN

= 100MHz

♦ On-Chip Track-and-Hold Amplifier

♦ Internal 1.23V-Bandgap Reference

♦ On-Chip Selectable Divide-by-2 Clock Input

♦ LVDS Digital Outputs with Data Clock Output

♦ MAX1214 EV Kit Available

MAX1214

1.8V, 12-Bit, 210Msps ADC for
Broadband Applications

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-3652; Rev 1; 9/06

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

*EP = Exposed paddle.
+Denotes lead-free package.
D = Dry pack.

EVALUATION KIT

AVAILABLE

Pin-Compatible Versions

Pin Configuration appears at end of data sheet.

PART TEMP RANGE PIN-PACKAGE

MAX1214EGK-D -40°C to +85°C 68 QFN-EP*
MAX1214EGK+D -40°C to +85°C 68 QFN-EP*

PART

MAX1121 8 250

MAX1122 10 170

MAX1123 10 210

MAX1124 10 250

MAX1213 12 170

MAX1215 12 250

MAX1213N 12 170

MAX1214N 12 210

MAX1215N 12 250

RESOLUTION

(BITS)

SPEED GRADE

(Msps)

ON-CHIP
BUFFER

Yes

Yes

Yes

Yes

Yes

Yes

No

No

No

MAX1214

1.8V, 12-Bit, 210Msps ADC for
Broadband Applications

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(AV

CC

= OV

CC

= 1.8V, AGND = OGND = 0, f

SAMPLE

= 210MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,

internal reference, digital output pins differential R

L

= 100Ω±1%, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at

T

A

= +25°C.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

AVCCto AGND ......................................................-0.3V to +2.1V

OV

CC

to OGND .....................................................-0.3V to +2.1V

AV

CC

to OVCC.......................................................-0.3V to +2.1V

AGND to OGND ....................................................-0.3V to +0.3V

INP, INN to AGND....................................-0.3V to (AV

CC

+ 0.3V)

All Digital Inputs to AGND........................-0.3V to (AV

CC

+ 0.3V)

REFIO, REFADJ to AGND ........................-0.3V to (AV

CC

+ 0.3V)

All Digital Outputs to OGND ....................-0.3V to (OV

CC

+ 0.3V)

Continuous Power Dissipation (T

A

= +70°C, multi-layer board)
68-Pin QFN-EP (derate 41.7mW/°C

above +70°C)........................................................3333mW/°C

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature .....................................................+150°C

Storage Temperature Range ............................-60°C to +150°C

Maximum Current into Any Pin .........................................±50mA

Lead Temperature (soldering,10s) ..................................+300°C

DC ACCURACY

Resolution 12 Bits

Integral Nonlinearity (Note 2) INL f

Differential Nonlinearity (Note 2) DNL TA = +25°C, no missing codes -1 ±0.4 +1 LSB

Transfer Curve Offset V
Offset Temperature Drift 40 µV/°C

ANALOG INPUTS (INP, INN)

Full-Scale Input Voltage Range V

Full-Scale Range Temperature
Drift

Common-Mode Input Range V

Input Capacitance C

Differential Input Resistance R

Full-Power Analog Bandwidth FPBW 700 MHz

REFERENCE (REFIO, REFADJ)

Reference Output Voltage V
Reference Temperature Drift 90 ppm/°C

REFADJ Input High Voltage V

SAMPLING CHARACTERISTICS

Maximum Sampling Rate f

Minimum Sampling Rate f

Clock Duty Cycle Set by clock-management circuit 40 to 60 %

Aperture Delay t

Aperture Jitter t

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

OS

FS

CM

IN

IN

REFIO

REFADJ

SAMPLE

SAMPLE

AD

AJ

= 10MHz, TA = +25°C -1.75 ±0.75 +1.75 LSB

IN

TA = +25°C (Note 2) -3.5 +3.5 mV

TA = +25°C (Note 2) 1320 1454 1590 mV

Internally self-biased 1.365 ±0.15 V

TA = +25°C, REFADJ = AGND 1.18 1.23 1.30 V

Used to disable the internal reference AV

Figures 4, 11 620 ps

Figure 11 0.2 ps

130 ppm/°C

2.5 pF

3.0 4.2 6.3 kΩ

- 0.3 V

CC

210 MHz

20 MHz

P-P

RMS

MAX1214

1.8V, 12-Bit, 210Msps ADC for
Broadband Applications

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(AV

CC

= OV

CC

= 1.8V, AGND = OGND = 0, f

SAMPLE

= 210MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,

internal reference, digital output pins differential R

L

= 100Ω±1%, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at

T

A

= +25°C.) (Note 1)

CLOCK INPUTS (CLKP, CLKN)

Differential Clock Input Amplitude (Note 3) 200 500 mV

Clock Input Common-Mode
Voltage Range

Clock Differential Input
Resistance

Clock Differential Input
Capacitance

DYNAMIC CHARACTERISTICS (at -1dBFS)

Signal-to-Noise
Ratio

Signal-to-Noise
and Distortion

Spurious-Free
Dynamic Range

Worst Harmonics
(HD2 or HD3)

Two-Tone Intermodulation
Distortion

Noise-Power Ratio NPR

LVDS DIGITAL OUTPUTS (D0P/N–D11P/N, ORP/N)

Differential Output Voltage |VOD|RL = 100Ω ±1% 250 400 mV

Output Offset Voltage OV

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

R

CLK

C

CLK

SNR

SINAD

SFDR

TTIMD

OS

Internally self-biased 1.15 ±0.25 V

fIN = 10MHz, TA ≥ +25°C6466

fIN = 100MHz, TA ≥ +25°C 64 65.6

fIN = 200MHz 65.3

f

= 250MHz 65

IN

fIN = 10MHz, TA ≥ +25°C 64 65.8

fIN = 100MHz, TA ≥ +25°C 63.3 65

fIN = 200MHz 63.7

f

= 250MHz 64.4

IN

fIN = 10MHz, TA ≥ +25°C 73 80.7

fIN = 100MHz, TA ≥ +25°C 68 74.2

fIN = 200MHz 69.1

= 250MHz 77.2

f

IN

fIN = 10MHz, TA ≥ +25°C -82 -73

fIN = 100MHz, TA ≥ +25°C -74.2 -68

fIN = 200MHz -73.5

fIN = 250MHz -72.5

f

= 99MHz at -7dBFS,

IN1

= 101MHz at -7dBFS

f

IN2

f
noise BW = 50MHz, A

RL = 100Ω ±1% 1.125 1.310 V

= 28.8MHz ±1MHz,

NOTCH

= -9.1dBFS

IN

11

±25%

5pF

-74 dBc

59.5 dB

P-P

kΩ

dB

dB

dBc

dBc

MAX1214

1.8V, 12-Bit, 210Msps ADC for
Broadband Applications

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(AV

CC

= OV

CC

= 1.8V, AGND = OGND = 0, f

SAMPLE

= 210MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,

internal reference, digital output pins differential R

L

= 100Ω±1%, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at

T

A

= +25°C.) (Note 1)

Note 1: ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
Note 2: Static linearity and offset parameters are based on the end-point fit method. The full-scale range (FSR) is defined as 4095 x

slope of the line.

Note 3: Parameter guaranteed by design and characterization: T

A

= T

MIN

to T

MAX

.

Note 4: PSRR is measured with both analog and digital supplies connected to the same potential.

LVCMOS DIGITAL INPUTS (CLKDIV, T/B)

Digital Input-Voltage Low V

Digital Input-Voltage High V

TIMING CHARACTERISTICS

CLK-to-Data Propagation Delay t

CLK-to-DCLK Propagation Delay t

DCLK-to-Data Propagation Delay t

LVDS Output Rise Time t

LVDS Output Fall Time t

Output Data Pipeline Delay t

POWER REQUIREMENTS

Analog Supply Voltage Range AV

Digital Supply Voltage Range OV

Analog Supply Current I

Digital Supply Current I

Analog Power Dissipation P

Power-Supply Rejection Ratio
(Note 4)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

PDL

IL

IH

PDL

CPDL

- t

CPDL

RISE

FALL

LATENCY

CC

CC

AVCC

OVCC

DISS

PSRR

Figure 4 1.77 ns

Figure 4 4.31 ns

Figure 4 (Note 3) 2.09 2.54 2.91 ns

20% to 80%, CL = 5pF 460 ps

20% to 80%, CL = 5pF 460 ps

Figure 4 11

fIN = 100MHz 390 460 mA

fIN = 100MHz 64 75 mA

fIN = 100MHz 820 963 mW

Offset 1.8 mV/V

Gain 1.5 %FS/V

0.2 x AV

0.8 x AV

CC

1.70 1.80 1.90 V

1.70 1.80 1.90 V

CC

V

V

Clock

cycles

MAX1214

1.8V, 12-Bit, 210Msps ADC for
Broadband Applications

_______________________________________________________________________________________ 5

Typical Operating Characteristics

(AV

CC

= OV

CC

= 1.8V, AGND = OGND = 0, f

SAMPLE

= 210MHz, A

IN

= -1dBFS; see each TOC for detailed information on test condi­tions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential R

L

= 100Ω, TA= +25°C.)

0

-10

-20

-30

-40

-50

-60

-70

AMPLITUDE (dBFS)

-80

-90

-100

-110

0

-10

-20

-30

-40

-50

-60

-70

AMPLITUDE (dBFS)

-80

-90

-100

-110

FFT PLOT

(8192-POINT DATA RECORD)

f

= 209.99946MHz

SAMPLE

= 12.79172MHz

f

IN

= -1.083dBFS

A

IN

SNR = 66.6dB
SINAD = 66.4dB
THD = -79.3dBc
SFDR = 82.3dB
HD2 = -90.8dBc
HD3 = -82.3dBc

HD3

HD2

0 102030405060708090100

ANALOG INPUT FREQUENCY (MHz)

FFT PLOT

(8192-POINT DATA RECORD)

f

= 209.99946MHz

SAMPLE

= 249.91269MHz

f

IN

= -1.080dBFS

A

IN

SNR = 65dB
SINAD = 64.4dB
THD = -73.4dBc
SFDR = 77.2dBc
HD2 = -77.2dBc
HD3 = -78.3dBc

0 102030405060708090100

ANALOG INPUT FREQUENCY (MHz)

HD3 HD2

MAX1214 toc01

AMPLITUDE (dBFS)

MAX1214 toc04

AMPLITUDE (dBFS)

FFT PLOT

(8192-POINT DATA RECORD)

0

f

= 209.99946MHz

SAMPLE

-10
= 65.08650MHz

f

IN

-20

= -1.119dBFS

A

IN

SNR = 66.5dB

-30

SINAD = 66.5dB

-40

THD = -75.2dBc
SFDR = 73.1dBc

-50

HD2 = -87.9dBc

-60

HD3 = -73.1dBc

-70

-80

HD3

-90

-100

-110
0 102030405060708090100

ANALOG INPUT FREQUENCY (MHz)

TWO-TONE IMD PLOT

(8192-POINT DATA RECORD)

0

f

= 209.99946MHz

SAMPLE

-10
= 99.02686MHz

f

IN1

-20

= 101.0776221MHz

f

IN2

= A

= -7dBFS

A

IN1

-30

-40

-50

-60

-70

-80

-90

-100

-110

IN2

IMD = -74dBc

2f

IN2 +fIN1

2f

IN1 +fIN2

0 102030405060708090100

ANALOG INPUT FREQUENCY (MHz)

f

f

2f

IN2 -fIN2

(8192-POINT DATA RECORD)

FFT PLOT

HD2

MAX1214 toc02

AMPLITUDE (dBFS)

0

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

HD2

0 102030405060708090100

ANALOG INPUT FREQUENCY (MHz)

HD3

f

= 209.99946MHz

SAMPLE

= 199.77122MHz

f

IN

= -1.030dBFS

A

IN

SNR = 65.3dB
SINAD = 63.7dB
THD = -68.7dBc
SFDR = 69.1dBc
HD2 = -83.7dBc
HD3 = -69.1dBc

SNR/SINAD vs. ANALOG INPUT FREQUENCY

= 209.99946MHz, AIN = -1dBFS)

(f

SAMPLE

70

MAX1214 toc05

IN1

IN2

65

60

55

SNR/SINAD (dB)

50

45

0300

SNR

SINAD

25020015010050

fIN (MHz)

MAX1214 toc03

MAX1214 toc06

SFDR vs. ANALOG INPUT FREQUENCY

= 209.99946MHz, A

(f

SAMPLE

95

90

85

80

75

70

65

SFDR (dBc)

60

55

50

45

40

0300

fIN (MHz)

= -1dBFS)

IN

25020015010050

MAX1214 toc07

HD2/HD3 vs. ANALOG INPUT FREQUENCY

= 209.99946MHz, AIN = -1dBFS)

(f

SAMPLE

-50

-55

-60

-65

-70

-75

-80

HD2/HD3 (dBc)

-85

-90

-95

-100
0300

HD3

fIN (MHz)

HD2

SNR/SINAD vs. ANALOG INPUT AMPLITUDE

= 209.99964MHz, fIN = 65.0865033MHz)

(f

SAMPLE

70

60

MAX1214 toc08

50

40

SNR/SINAD (dB)

30

20

10

25020015010050

-55 0
ANALOG INPUT AMPLITUDE (dBFS)

SNR

MAX1214 toc9

SINAD

5-10-15-20-25-30-35-40-45-50

MAX1214

1.8V, 12-Bit, 210Msps ADC for
Broadband Applications

6 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(AV

CC

= OV

CC

= 1.8V, AGND = OGND = 0, f

SAMPLE

= 210MHz, A

IN

= -1dBFS; see each TOC for detailed information on test condi­tions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential R

L

= 100Ω, TA= +25°C.)

(f

SAMPLE

90

80

70

60

SFDR (dBc)

50

40

SFDR vs. ANALOG INPUT AMPLITUDE

= 209.99946MHz, f

= 65.08650MHz)

IN

MAX1214 toc10

HD2/HD3 vs. ANALOG INPUT AMPLITUDE

= 209.99946MHz, f

(f

SAMPLE

-30

-40

-50

-60

-70

HD2/HD3 (dBc)

-80

-90

IN

HD3

HD2

= 65.08650MHz)

MAX1214 toc11

SNR/SINAD vs. SAMPLE FREQUENCY

= 65MHz, AIN = -1dBFS)

(f

70

66

62

58

SNR/SINAD (dB)

54

IN

SINAD

SNR

MAX1214 toc12

30

-55 0
ANALOG INPUT AMPLITUDE (dBFS)

-5-10-15-20-25-35-35-40-45-50

SFDR vs. SAMPLE FREQUENCY

= 65MHz, AIN = -1dBFS)

(f

85

80

75

70

SFDR (dBc)

65

60

55

IN

0210

f

(MHz)

SAMPLE

180150120906030

INTEGRAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

1.0

0.8

0.6

0.4

0.2

0

INL (LSB)

-0.2

-0.4

-0.6

-0.8

-1.0
04096

DIGITAL OUTPUT CODE

fIN = 13MHz

358430722048 25601024 1536512

MAX1214 toc13

MAX1214 toc16

-100

-55 0
ANALOG INPUT AMPLITUDE (dBFS)

HD2/HD3 vs. SAMPLE FREQUENCY

(f

-60

-65

-70

-75

-80

-85

-90

HD2/HD3 (dBc)

-95

-100

-105

-110

IN

HD3

0210

DIFFERENTIAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

1.0

0.8

0.6

0.4

0.2

0

DNL (LSB)

-0.2

-0.4

-0.6

-0.8

-1.0
04096

= 65MHz, A

DIGITAL OUTPUT CODE

f

SAMPLE

HD2

= -1dBFS)

IN

(MHz)

180150120906030

fIN = 13MHz

358430722048 25601024 1536512

-5-10-15-20-25-30-35-40-45-50

50

0210

f

(MHz)

SAMPLE

180150120906030

TOTAL POWER DISSIPATION vs. SAMPLE

= 65MHz, AIN = -1dBFS)

IN

180150120906030

f

(MHz)

SAMPLE

MAX1214 toc15

MAX1214 toc14

FREQUENCY (f

830

810

790

(mW)

770

DISS

P

750

730

710

0210

GAIN BANDWIDTH PLOT
= 209.99946MHz, AIN = -1dBFS)

(f

SAMPLE

MAX1214 toc17

1

0

-1

-2

-3

GAIN (dB)

-4

-5

-6
DIFFERENTIAL TRANSFORMER COUPLING

-7

10 1000

ANALOG INPUT FREQUENCY (MHz)

100

MAX1214 toc18