General Description
The MAX1213 is a monolithic, 12-bit, 170Msps analogto-digital converter (ADC) optimized for outstanding
dynamic performance at high-IF frequencies up to
300MHz. The product operates with conversion rates
up to 170Msps while consuming only 788mW.
At 170Msps and an input frequency up to 250MHz, the
MAX1213 achieves a spurious-free dynamic range
(SFDR) of 72.9dBc. Its excellent signal-to-noise ratio
(SNR) of 65.8dB at 10MHz remains flat (within 2dB) for
input tones up to 250MHz. This ADC yields an excellent
low-noise floor of -68dBFS, which makes it ideal for
wideband applications such as cable head-end
receivers and power-amplifier predistortion in cellular
base-station transceivers.
The MAX1213 requires a single 1.8V supply. The analog
input is designed for either differential or single-ended
operation and can be AC- or DC-coupled. The ADC also
features a selectable on-chip divide-by-2 clock circuit,
which allows the user to apply clock frequencies as high
as 340MHz. This helps to reduce the phase noise of the
input clock source. A low-voltage differential signal
(LVDS) sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compatible and the data format can be selected to be either
two’s complement or offset binary.
The MAX1213 is available in a 68-pin QFN package
with exposed paddle (EP) and is specified over the
industrial (-40°C to +85°C) temperature range.
See the Pin-Compatible Versions table for a complete
selection of 8-bit, 10-bit, and 12-bit high-speed ADCs in
this family.
Applications
Base-Station Power-Amplifier Linearization
Cable Head-End Receivers
Wireless and Wired Broadband Communication
Communications Test Equipment
Radar and Satellite Subsystems
Features
♦ 170Msps Conversion Rate
♦ Low Noise Floor of -68dBFS
♦ Excellent Low-Noise Characteristics
SNR = 65.8dB at fIN= 65MHz
SNR = 64.5dB at fIN= 250MHz
♦ Excellent Dynamic Range
SFDR = 76.5dBc at fIN= 65MHz
SFDR = 72.9dBc at fIN= 250MHz
♦ 59.5dB NPR for f
NOTCH
= 28.8MHz and a Noise
Bandwidth of 50MHz
♦ Single 1.8V Supply
♦ 788mW Power Dissipation at f
SAMPLE
= 170MHz
and fIN= 65MHz
♦ On-Chip Track-and-Hold Amplifier
♦ Internal 1.23V-Bandgap Reference
♦ On-Chip Selectable Divide-by-2 Clock Input
♦ LVDS Digital Outputs with Data Clock Output
♦ MAX1213 EV Kit Available
MAX1213
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
________________________________________________________________ Maxim Integrated Products 1
PART TEMP RANGE PIN-PACKAGE
MAX1213EGK -40°C to +85°C 68 QFN-EP*
Ordering Information
19-1003; Rev 2; 6/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
*EP = Exposed paddle.
EVALUATION KIT
AVAILABLE
Pin-Compatible Versions
PART
RESOLUTION
(BITS)
SPEED GRADE
(Msps)
MAX1121 8 250
MAX1122 10 170
MAX1123 10 210
MAX1124 10 250
MAX1213 12 170
MAX1214 12 210
MAX1215 12 250
Pin Configuration appears at end of data sheet.
MAX1213
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω ±1%, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVCCto AGND ..................................................... -0.3V to +2.1V
OV
CC
to OGND .................................................... -0.3V to +2.1V
AV
CC
to OVCC...................................................... -0.3V to +2.1V
AGND to OGND ................................................... -0.3V to +0.3V
INP, INN to AGND....................................-0.3V to (AV
CC
+ 0.3V)
REFIO, REFADJ to AGND ........................-0.3V to (AV
CC
+ 0.3V)
All Digital Inputs to AGND........................-0.3V to (AV
CC
+ 0.3V)
All Digital Outputs to OGND ....................-0.3V to (OV
CC
+ 0.3V)
ESD on All Pins (Human Body Model) .............................±2000V
Thermal Resistance (multilayer board)
θjc ................................................................................0.8°C/W
θja .................................................................................24°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-60°C to +150°C
Maximum Current into Any Pin............................................50mA
Lead Temperature (soldering,10s) ..................................+300°C
DC ACCURACY
Resolution 12 Bits
Integral Nonlinearity
(Note 2)
INL f
IN
= 10MHz, TA = +25°C-2
+2 LSB
Differential Nonlinearity (Note 2) DNL TA = +25°C, No missing codes
LSB
Transfer Curve Offset V
OS
TA = +25°C (Note 2)
mV
Offset Temperature Drift 40
ANALOG INPUTS (INP, INN)
Full-Scale Input Voltage Range V
FS
TA = +25°C (Note 2)
Full-Scale Range Temperature
Drift
Common-Mode Input Range V
CM
Internally self-biased 1.365 ±0.15 V
Input Capacitance C
IN
2.5 pF
Differential Input Resistance R
IN
kΩ
Full-Power Analog Bandwidth FPBW
REFERENCE (REFIO, REFADJ)
Reference Output Voltage V
REFIO
TA = +25°C, REFADJ = AGND
V
Reference Temperature Drift 90
REFADJ Input High Voltage
Used to disable the internal reference AV
CC
- 0.1 V
SAMPLING CHARACTERISTICS
Maximum Sampling Rate f
SAMPLE
Minimum Sampling Rate f
SAMPLE
20
Clock Duty Cycle Set by clock-management circuit 40 to 60 %
Aperture Delay t
AD
Figures 4, 11
ps
Aperture Jitter t
AJ
Figure 11 0.2
±0.75
-0.8 ±0.3 +0.8
-3.3 +3.3
V
REFADJ
1320 1454 1590
3.00
1.18 1.23 1.30
170
130
700
620
6.25
MAX1213
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω±1%, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
CLOCK INPUTS (CLKP, CLKN)
Differential Clock Input Amplitude
Clock Input Common-Mode
Voltage Range
Internally self-biased 1.15 ±0.25 V
Clock Differential Input
Resistance
R
CLK
11
kΩ
Clock Differential Input
Capacitance
C
CLK
5pF
DYNAMIC CHARACTERISTICS (at -1dBFS)
fIN = 10MHz, TA ≥ +25°C
fIN = 200MHz 65
Signal-to-Noise
Ratio
SNR
f
IN
= 250MHz
dB
fIN = 10MHz, TA ≥ +25°C64
Signal-to-Noise
and Distortion
SINAD
f
IN
= 250MHz
dB
fIN = 10MHz, TA ≥ +25°C7383
fIN = 65MHz, TA ≥ +25°C69
Spurious-Free
Dynamic Range
SFDR
f
IN
= 250MHz
dBc
fIN = 10MHz, TA ≥ +25°C -85 -73
fIN = 65MHz, TA ≥ +25°C
Worst Harmonics
(HD2 or HD3)
fIN = 250MHz
dBc
Two-Tone Intermodulation
Distortion
TTIMD
f
IN1
= 99MHz at -7dBFS,
f
IN2
= 101MHz at -7dBFS
dBc
Noise Power Ratio NPR
f
NOTCH
= 28.8MHz ±1MHz,
noise BW = 50MHz, A
IN
= -9.1dBFS
dB
LVDS DIGITAL OUTPUTS (D0P/N–D11P/N, ORP/N)
Differential Output Voltage |VOD|RL = 100Ω ±1%
400 mV
Output Offset Voltage OV
OS
RL = 100Ω ±1%
200 500
±25%
64.5 66.2
64.5 65.8
64.5
65.9
63.5 65.2
63.9
63.5
76.5
250
1.125 1.310
70.7
72.9
-76.5
-70.7
-72.9
-78
59.5
MAX1213
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω±1%, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
LVCMOS DIGITAL INPUTS (CLKDIV, T/B)
Digital Input Voltage Low V
IL
V
Digital Input Voltage High V
IH
0.8 x AV
CC
V
TIMING CHARACTERISTICS
CLK-to-Data Propagation Delay t
PDL
Figure 4
CLK-to-DCLK Propagation Delay
DCLK-to-Data Propagation Delay
Figure 4 (Note 3) 2.8 3.2 3.6 ns
LVDS Output Rise Time t
RISE
20% to 80%, CL = 5pF
ps
LVDS Output Fall Time t
FALL
20% to 80%, CL = 5pF
ps
Output Data Pipeline Delay
POWER REQUIREMENTS
Analog Supply Voltage Range AV
CC
V
Digital Supply Voltage Range OV
CC
V
Analog Supply Current I
AVCC
fIN = 65MHz
425 mA
Digital Supply Current I
OVCC
fIN = 65MHz 63 75 mA
Analog Power Dissipation P
DISS
fIN = 65MHz
Power-Supply Rejection Ratio
(Note 4)
PSRR
Gain 1.5
Note 1: ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
Note 2: Static linearity and offset parameters are computed from a best-fit straight line through the code transition points. The full-
scale range (FSR) is defined as 4095 x slope of the line.
Note 3: Parameter guaranteed by design and characterization: T
A
= T
MIN
to T
MAX
.
Note 4: PSRR is measured with both analog and digital supplies connected to the same potential.
0.2 x AV
1.75
4.95
t
- t
PDL
CPDL
460
460
t
LATENCY
1.70 1.80 1.90
1.70 1.80 1.90
375
788
CC
MAX1213
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
_______________________________________________________________________________________ 5
Typical Operating Characteristics
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, A
IN
= -1dBFS; see each TOC for detailed information on test conditions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential RL = 100Ω, TA= +25°C.)
FFT PLOT
(8192-POINT DATA RECORD)
MAX1213 toc01
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-110
HD2
f
SAMPLE
= 170MHz
f
IN
= 12.47192MHz
A
IN
= -1.001dBFS
SNR = 66.7dB
SINAD = 66.4dB
SFDR = 83.8dBc
HD2 = -83.8dBc
HD3 = -84dBc
HD3
706040
50
20 30100
80
FFT PLOT
(8192-POINT DATA RECORD)
MAX1213 toc02
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-110
HD2
f
SAMPLE
= 170MHz
f
IN
= 65.09888MHz
A
IN
= -1.099dBFS
SNR = 66.5dB
SINAD = 65.7dB
SFDR = 76dBc
HD2 = -77.7dBc
HD3 = -76dBc
HD3
706040
50
20 30100
80
FFT PLOT
(8192-POINT DATA RECORD)
MAX1213 toc03
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-110
HD2
f
SAMPLE
= 170MHz
f
IN
= 200.11108MHz
A
IN
= -1.025dBFS
SNR = 65dB
SINAD = 63.9dB
SFDR = 70.7dBc
HD2 = -74.8dBc
HD3 = -70.7dBc
HD3
706040
50
20 30100
80
FFT PLOT
(8192-POINT DATA RECORD)
MAX1213 toc04
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-110
HD2
f
SAMPLE
= 170MHz
f
IN
= 250.04038MHz
A
IN
= -1.040dBFS
SNR = 64.5dB
SINAD = 63.5dB
SFDR = 72.9dBc
HD2 = -77.4dBc
HD3 = -72.9dBc
HD3
706040
50
20 30100
80
TWO-TONE IMD PLOT
(8192-POINT DATA RECORD)
MAX1213 toc05
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-110
f
IN2
f
SAMPLE
= 170MHz
f
IN1
= 99.25659MHz
f
IN2
= 101.08276MHz
A
IN1
= A
IN2
= -6.974dBFS
IMD = -78dBc
f
IN1
- f
IN2
f
IN1
+ f
IN2
3f
IN2
- 2f
IN1
2f
IN1
- f
IN2
f
IN1
706040
50
20 30100
80
45
50
60
55
65
70
010050 150 200 250 300
SNR/SINAD vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 170MHz, AIN = -1dBFS)
MAX1213 toc06
fIN (MHz)
SNR/SINAD (dB)
SNR
SINAD
40
45
50
55
60
65
70
75
80
85
90
95
0 50 100 150 200 250 300
SFDR vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 170MHz, AIN = -1dBFS
MAX1213 toc07
fIN (MHz)
SFDR (dBc)
-100
-85
-90
-95
-80
-75
-70
-65
-60
-55
-50
0 10050 150 200 250 300
HD2/HD3 vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 170MHz, AIN = -1dBFS)
MAX1213 toc08
fIN (MHz)
HD2/HD3 (dBc)
HD3
HD2
10
30
20
50
40
60
70
-55 -45 -40 -35-50 -30 -25 -20 -15 -10 -5 0
MAX1213 toc09
ANALOG INPUT AMPLITUDE (dBFS)
SNR/SINAD (dB)
SINAD
SNR/SINAD vs. ANALOG INPUT AMPLITUDE
(f
SAMPLE
= 170MHz, fIN = 65.098877MHz)
SNR
MAX1213
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, A
IN
= -1dBFS; see each TOC for detailed information on test conditions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential RL = 100Ω, TA= +25°C.)
30
50
40
70
60
80
90
-55 -45 -40 -35-50 -30 -25 -20 -15 -10 -5 0
MAX1213 toc10
ANALOG INPUT AMPLITUDE (dBFS)
SFDR (dBc)
SFDR vs. ANALOG INPUT AMPLITUDE
(f
SAMPLE
= 170MHz, fIN = 65.098877MHz)
-100
-80
-90
-60
-70
-40
-50
-30
-55 -45 -40 -35-50 -30 -25 -20 -15 -10 -5 0
MAX1213 toc11
ANALOG INPUT AMPLITUDE (dBFS)
HD2/HD3 (dBc)
HD2/HD3 vs. ANALOG INPUT AMPLITUDE
(f
SAMPLE
= 170MHz, fIN = 65.098877MHz)
HD2
HD3
40
50
45
60
55
70
65
75
0406020 80 100 120 140 160 180
SNR/SINAD vs. SAMPLE FREQUENCY
(f
IN
= 65MHz, AIN = -1dBFS)
MAX1213 toc12
f
SAMPLE
(MHz)
SNR/SINAD (dB)
SNR
SINAD
55
60
65
70
75
80
85
04020 60 80 100 120 140 160 180
MAX1213 toc13
f
SAMPLE
(MHz)
SFDR (dBc)
SFDR vs. SAMPLE FREQUENCY
(f
IN
= 65MHz, AIN = -1dBFS)
-110
-100
-105
-90
-95
-80
-85
-75
-65
-70
-60
0 40608020 100 120 140 160 180
MAX1213 toc14
f
SAMPLE
(MHz)
HD2/HD3 (dBc)
HD2/HD3 vs. SAMPLE FREQUENCY
(f
IN
= 65MHz,AIN = -1dBFS)
HD3
HD2
710
730
750
770
790
810
830
20 6040 80 100 120 140 160 180
TOTAL POWER DISSIPATION vs. SAMPLE
FREQUENCY (f
IN
= 65MHz, AIN = -1dBFS)
MAX1213 toc15
f
SAMPLE
(MHz)
P
DISS
(mW)
-2.0
-1.2
-1.6
-0.4
-0.8
0.4
0
0.8
1.6
1.2
2.0
0 1024 1536512 2048 2560 3072 3584 4096
INTEGRAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
MAX1213 toc16
DIGITAL OUTPUT CODE
INL (LSB)
fIN = 12.5MHz
-1.0
-0.6
-0.8
-0.2
-0.4
0.2
0
0.4
0.8
0.6
1.0
0 1024 1536512 2048 2560 3072 3584 4096
DIFFERENTIAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
MAX1213 toc17
DIGITAL OUTPUT CODE
DNL (LSB)
fIN = 12.5MHz
GAIN BANDWIDTH PLOT
(f
SAMPLE
= 170MHz, AIN = -1dBFS)
MAX1213 toc18
ANALOG INPUT FREQUENCY (MHz)
GAIN (dB)
100
-6
-5
-4
-3
-2
-1
0
1
-7
10 1000
DIFFERENTIAL TRANSFORMER COUPLING
MAX1213
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
_______________________________________________________________________________________ 7
Typical Operating Characteristics (continued)
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, A
IN
= -1dBFS; see each TOC for detailed information on test conditions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential RL = 100Ω, TA= +25°C.)
SINAD
60
63
62
61
64
65
66
67
68
69
70
-40 10-15 35 60 85
SNR/SINAD vs. TEMPERATURE
(f
IN
= 65MHz, AIN = -1dBFS)
MAX1213 toc19
TEMPERATURE (°C)
SNR/SINAD (dB)
SNR
64
66
68
70
72
74
76
78
80
-40 -15 10 35 60 85
SFDR vs. TEMPERATURE
(f
IN
= 65MHz, AIN = -1dBFS)
MAX1213 toc20
TEMPERATURE (°C)
SFDR (dBc)
-100
-88
-92
-96
-84
-80
-76
-72
-68
-64
-60
-40 10-15 35 60 85
HD2/HD3 vs. TEMPERATURE
(f
IN
= 65MHz, AIN = -1dBFS)
MAX1213 toc21
TEMPERATURE (°C)
HD2/HD3 (dBc)
HD3
HD2
60
64
72
68
76
80
SNR/SINAD, SFDR vs. SUPPLY VOLTAGE
(f
IN
= 65.098877MHz, AIN = -1dBFS)
MAX1213 toc22
VOLTAGE SUPPLY (V)
SNR/SINAD, SFDR (dB, dBc)
1.70 1.801.75 1.85 1.90
AVCC = OV
CC
SFDR
SNR
SINAD
1.2450
1.2470
1.2510
1.2490
1.2530
1.2550
INTERNAL REFERENCE
vs. SUPPLY VOLTAGE
MAX1213 toc23
VOLTAGE SUPPLY (V)
V
REFIO
(V)
1.70 1.801.75 1.85 1.90
MEASURED AT THE REFIO PIN
REFADJ = AV
CC
= OV
CC
0
2
1
4
3
5
6
-40 10-15 35 60 85
PROPAGATION DELAY TIMES
vs. TEMPERATURE
MAX1213 toc24
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
t
CPDL
t
PDL
20
30
25
40
35
50
45
55
65
60
70
-40 -30 -25-35 -20 -15 -10 -5 0
NOISE-POWER RATIO vs. ANALOG INPUT
POWER (f
NOTCH
= 28.2MHz ±1MHz)
MAX1213 toc25
ANALOG INPUT POWER (dBFS)
NPR (dB)
-100
-80
-90
-60
-70
-40
-50
-30
-10
-20
0
010152052530354540 50
NOISE-POWER RATIO PLOT
(WIDE NOISE BANDWIDTH: 50MHz)
MAX1213 toc26
ANALOG INPUT FREQUENCY (MHz)
NPR (dB)
f
NOTCH
= 28.8MHz
NPR = 59.5dB