MAXIM MAX1192 Technical data

General Description
The MAX1192 is an ultra-low-power, dual, 8-bit, 22Msps analog-to-digital converter (ADC). The device features two fully differential wideband track-and-hold (T/H) inputs. These inputs have a 440MHz bandwidth and accept fully differential or single-ended signals. The MAX1192 deliv­ers a typical signal-to-noise and distortion (SINAD) of
An internal 1.024V precision bandgap reference sets the full-scale range of the ADC to ±0.512V. A flexible reference structure allows the MAX1192 to use its inter­nal reference or accept an externally applied reference for applications requiring increased accuracy.
The MAX1192 features parallel, multiplexed, CMOS­compatible tri-state outputs. The digital output format is offset binary. A separate digital power input accepts a voltage from 1.8V to 3.6V for flexible interfacing to dif­ferent logic levels. The MAX1192 is available in a 5mm × 5mm, 28-pin thin QFN package, and is specified for the extended industrial (-40°C to +85°C) temperature range.
For higher sampling frequency applications, refer to the MAX1195–MAX1198 dual 8-bit ADCs. Pin-compatible versions of the MAX1192 are also available. Refer to the MAX1191 data sheet for 7.5Msps, and the MAX1193 data sheet for 45Msps.
Applications
Ultrasound and Medical Imaging
IQ Baseband Sampling
Battery-Powered Portable Instruments
Low-Power Video
WLAN, Mobile DSL, WLL Receiver
Features
o Ultra-Low Power
27.3mW (Normal Operation: 22Msps)
1.8µW (Shutdown Mode)
o Excellent Dynamic Performance
48.6dB/47.2dB SNR at f
IN
= 5.5MHz/125MHz
70dBc/69dBc SFDR at fIN= 5.5MHz/125MHz
o 2.7V to 3.6V Single Analog Supply
o 1.8V to 3.6V TTL/CMOS-Compatible Digital
Outputs
o Fully Differential or Single-Ended Analog Inputs
o Internal/External Reference Option
o Multiplexed CMOS-Compatible Tri-State Outputs
o 28-Pin Thin QFN Package
o Evaluation Kit Available (Order MAX1193EVKIT)
MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
________________________________________________________________
Maxim Integrated Products
1
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
MAX1192
5mm x 5mm THIN QFN
TOP VIEW
PD0
EXPOSED PADDLE
PD1
REFIN
COM
REFN
REFP
V
DD
INA+
INA-
GND
CLK
GND
INB+
INB-
V
DD
V
DD
GND
OGND
OV
DD
D7
D6
D0
D1
D2
D3
A/B
D4
D5
Pin Configuration
Ordering Information
19-2835; Rev 2; 7/09
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-PACKAGE
MAX1192ETI-T -40°C to +85°C 28 Thin QFN-EP*
-
Denotes a package containing lead(Pb). *EP = Exposed paddle. T = Tape and reel.
MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= 3.0V, OVDD= 1.8V, V
REFIN
= VDD(internal reference), CL≈ 10pF at digital outputs, f
CLK
= 22MHz, C
REFP
= C
REFN
= C
COM
=
0.33µF, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VDD, OVDDto GND ...............................................-0.3V to +3.6V
OGND to GND.......................................................-0.3V to +0.3V
INA+, INA-, INB+, INB- to GND .................-0.3V to (V
DD
+ 0.3V)
CLK, REFIN, REFP, REFN, COM to GND ...-0.3V to (V
DD
+ 0.3V)
PD0, PD1 to OGND .................................-0.3V to (OV
DD
+ 0.3V)
Digital Outputs to OGND.........................-0.3V to (OV
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
28-Pin Thin QFN (derated 20.8mW/°C above +70°C) ..1667mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
CONDITIONS MIN TYP
UNITS
DC ACCURACY
Resolution 8 Bits
Integral Nonlinearity INL
LSB
Differential Nonlinearity DNL No missing codes over temperature
LSB
+25°C ±4
Offset Error
< +25°C ±6
%FS
Gain Error Excludes REFP - REFN error ±2
%FS
DC Gain Matching
dB
Gain Temperature Coefficient ±30
ppm/°C
Offset (VDD ±5%)
Power-Supply Rejection
Gain (V
DD
±5%)
LSB
ANALOG INPUT
Differential Input Voltage Range
Differential or single-ended inputs
V
Common-Mode Input Voltage Range
V
Input Resistance R
IN
Switched capacitor load 245 kΩ
Input Capacitance C
IN
5pF
CONVERSION RATE
Clock Frequency Range f
CLK
7.5 22
MHz
Channel A 5.0
Data Latency
Channel B 5.5
Clock
cycles
DYNAMIC CHARACTERISTICS (differential inputs, 4096-point FFT)
fIN = 1.875MHz 48.6
fIN = 5.5MHz 47 48.6
Signal-to-Noise Ratio (Note 2)
SNR
f
IN
= 11MHz 48.6
dB
fIN = 1.875MHz 48.7
fIN = 5.5MHz 47 48.6
Signal-to-Noise and Distortion (Note 2)
fIN = 11MHz 48.6
dB
SYMBOL
±0.15 ±1.00 ±0.14 ±1.00
MAX
V
V
SINAD
DIFF
COM
±0.01 ±0.2
±0.02
±0.05
±0.512
VDD / 2
MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.0V, OVDD= 1.8V, V
REFIN
= VDD(internal reference), CL≈ 10pF at digital outputs, f
CLK
= 22MHz, C
REFP
= C
REFN
= C
COM
=
0.33µF, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETER
CONDITIONS MIN TYP
UNITS
fIN = 1.875MHz 70.8
fIN = 5.5MHz 59.0 70.0
Spurious-Free Dynamic Range (Note 2)
fIN = 11MHz 70.4
dBc
fIN = 1.875MHz 75.8
fIN = 5.5MHz
Thi r d - H ar m oni c D i stor ti on ( N ote 2)
HD3
f
IN
= 11MHz
dBc
Intermodulation Distortion IMD
f
IN1
= 1MHz at -7dB FS, f
IN2
= 1.01MHz at
-7dB FS
-64
dBc
Third-Order Intermodulation IM3
f
IN1
= 1MHz at -7dB FS, f
IN2
= 1.01MHz at
-7dB FS
-67
dBc
fIN = 1.875MHz
fIN = 5.5MHz
Total Harmonic Distortion (Note 2)
THD
f
IN
= 11MHz
dBc
Small-Signal Bandwidth
Input at -20dB FS 440
MHz
Full-Power Bandwidth
Input at -0.5dB FS 440
MHz
Aperture Delay t
AD
1.5 ns
Aperture Jitter t
AJ
2
ps
RMS
Overdrive Recovery Time 1.5 × full-scale input 2 ns
INTERNAL REFERENCE (REFIN = VDD; V
REFP
, V
REFN
, and V
COM
are generated internally)
REFP Output Voltage V
REFP
- V
COM
V
REFN Output Voltage V
REFN
- V
COM
V
COM Output Voltage
V
Differential Reference Output
V
REFP
- V
REFN
V
Differential Reference Output Temperature Coefficient
±30
ppm/°C
Maximum REFP/REFN/COM Source Current
2mA
Maximum REFP/REFN/COM Sink Current
2mA
BUFFERED EXTERNAL REFERENCE (V
REFIN
= 1.024V, V
REFP
, V
REFN
, and V
COM
are generated internally)
REFIN Input Voltage
V
COM Output Voltage
V
Differential Reference Output
V
REFP
- V
REFN
V
Maximum REFP/REFN/COM Source Current
2mA
SYMBOL
SFDR
SSBW
FPBW
V
COM
V
REF
V
REFTC
I
SOURCE
-74.0
-74.8
-71.0
-70.0 -57.0
-70.2
0.256
-0.256
VDD / 2
- 0.15
V
DD
0.512
/ 2
MAX
V
DD
+ 0.15
/ 2
I
SINK
V
REFIN
V
COM
V
REF
I
SOURCE
VDD / 2
- 0.15
1.024
V
DD
0.512
/ 2
V
DD
+ 0.15
/ 2
PARAMETER
SYMBOL
CONDITIONS MIN TYP
MAX
UNITS
Maximum REFP/REFN/COM Sink Current
2mA
REFIN Input Resistance >500 kΩ
REFIN Input Current -0.7 µA
UNBUFFERED EXTERNAL REFERENCE (REFIN = GND, V
REFP
, V
REFN
, and V
COM
are applied externally)
REFP Input Voltage V
REFP
- V
COM
V
REFN Input Voltage V
REFN
- V
COM
V
COM Input Voltage
V
Differential Reference Input Voltage
V
REFP
- V
REFN
V
REFP Input Resistance
Measured between REFP and COM 4 kΩ
REFN Input Resistance
Measured between REFN and COM 4 kΩ
DIGITAL INPUTS (CLK, PD0, PD1)
CLK
0.7 x V
DD
Input High Threshold V
IH
PD0, PD1
0.7 x
V
CLK
0.3 x V
DD
Input Low Threshold V
IL
PD0, PD1
0.3 x
V
Input Hysteresis
0.1 V
CLK at GND or V
DD
±5
Digital Input Leakage Current DI
IN
PD0 and PD1 at OGND or OV
DD
±5
µA
Digital Input Capacitance
5pF
DIGITAL OUTPUTS (D7–D0, A/B)
Output Voltage Low V
OLISINK
= 200µA
0.2 x
V
Output Voltage High V
OHISOURCE
= 200µA
0.8 x V
Tri-State Leakage Current
±5 µA
Tri-State Output Capacitance
5pF
MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.0V, OVDD= 1.8V, V
REFIN
= VDD(internal reference), CL≈ 10pF at digital outputs, f
CLK
= 22MHz, C
REFP
= C
REFN
= C
COM
=
0.33µF, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
I
SINK
0.256
-0.256
V
COM
VDD / 2
V
R
R
REF
REFP
REFN
0.512
V
HYST
DC
IN
OV
DD
OV
DD
I
LEAK
C
OUT
OV
OV
DD
DD
MAX1192
PARAMETER
CONDITIONS MIN TYP
POWER REQUIREMENTS
Analog Supply Voltage V
DD
2.7 3.0 3.6 V
Digital Output Supply Voltage
1.8 V
DD
V
Normal operating mode, fIN = 1.875MHz at -0.5dB FS, f
CLK
= 7.5MHz,
CLK input from GND to V
DD
4.2 5.0
Normal operating mode, fIN = 5.5MHz at -0.5dB FS, f
CLK
= 22MHz,
CLK input from GND to V
DD
9.1 10.5
Idle mode (tri-state), fIN = 1.875MHz at -
0.5dB FS, f
CLK
= 7.5MHz, CLK input from
GND to V
DD
4.2
Idle mode (tri-state), fIN = 5.5MHz at
-0.5dB FS, f
CLK
= 22MHz, CLK input from
GND to V
DD
9.1
Standby mode, f
CLK
= 7.5MHz, CLK input
from GND to V
DD
2.3
Standby mode, f
CLK
= 22MHz, CLK input
from GND to V
DD
4.9
mA
Analog Supply Current I
DD
Shutdown mode, CLK = GND or VDD, PD0 = PD1 = OGND
0.6 5.0 µA
Normal operating mode, f
IN
= 1.875MHz at -0.5dB FS,
f
CLK
= 7.5MHz, CL 10pF
1.0
Normal operating mode, f
IN
= 5.5MHz at -0.5dB FS,
f
CLK
= 22MHz, CL 10pF
2.9
mA
Idle mode (tri-state), DC input, CLK = GND or V
DD,
PD0 = OVDD, PD1 = OGND
0.1 5.0
Standby mode, DC input, CLK = GND or V
DD,
PD0 = OGND, PD1 = OV
DD
0.1
Digital Output Supply Current (Note 3)
Shutdown mode, CLK = GND or VDD, PD0 = PD1 = OGND
0.1 5.0
µA
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.0V, OVDD= 1.8V, V
REFIN
= VDD(internal reference), CL≈ 10pF at digital outputs, f
CLK
= 22MHz, C
REFP
= C
REFN
= C
COM
=
0.33µF, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
_______________________________________________________________________________________ 5
SYMBOL
OV
DD
MAX UNITS
I
ODD
MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.0V, OVDD= 1.8V, V
REFIN
= VDD(internal reference), CL≈ 10pF at digital outputs, f
CLK
= 22MHz, C
REFP
= C
REFN
= C
COM
=
0.33µF, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Note 1: Specifications +25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Note 2: SNR, SINAD, SFDR, HD3, and THD are based on a differential analog input voltage of -0.5dB FS referenced to the
amplitude of the digital output. SNR and THD are calculated using HD2 through HD6.
Note 3: The power consumption of the output driver is proportional to the load capacitance (CL). Note 4: Guaranteed by design and characterization. Not production tested. Note 5: SINAD settles to within 0.5dB of its typical value. Note 6: Crosstalk rejection is measured by applying a high-frequency test tone to one channel and a low-frequency tone to the
second channel. FFTs are performed on each channel. The parameter is specified as the power ratio of the first and second channel FFT test tone bins.
Note 7: Amplitude/phase matching is measured by applying the same signal to each channel, and comparing the magnitude and
phase of the fundamental bin on the calculated FFT.
PARAMETER
SYMBOL
CONDITIONS MIN TYP
MAX
UNITS
TIMING CHARACTERISTICS
CLK Rise to CHA Output Data Valid
t
DOA
50% of C LK to 50% of d ata, Fi g ur e 5 ( N ote 4)
1 6 8.5 ns
CLK Fall to CHB Output Data Valid
t
DOB
50% of C LK to 50% of d ata, Fi g ur e 5 ( N ote 4)
1 6 8.5 ns
CLK Rise/Fall to A/B Rise/Fall Time
t
DA/B
50% of C LK to 50% of A/B, Fi g ur e 5 ( N ote 4)
1 6 8.5 ns
PD1 Rise to Output Enable t
EN
PD0 = OV
DD
5ns
PD1 Fall to Output Disable t
DIS
PD0 = OV
DD
5ns
CLK Duty Cycle 50 %
CLK Duty Cycle Variation ±10 %
Wake-Up Time from Shutdown Mode
(Note 5) 20 µs
Wake-Up Time from Standby Mode
(Note 5) 5.4 µs
Digital Output Rise/Fall Time 20% to 80% 2 ns
INTERCHANNEL CHARACTERISTICS
Crosstalk Rejection
f
IN,X
= 5.5MHz at -0.5dB FS,
f
IN,Y
= 0.3MHz at -0.5dB FS (Note 6)
-75 dB
Amplitude Matching fIN = 5.5MHz at -0.5dB FS (Note 7)
dB
Phase Matching fIN = 5.5MHz at -0.5dB FS (Note 7) ±0.1
Degrees
t
WAKE, SD
t
WAKE, ST
±0.03
MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
_______________________________________________________________________________________
7
FFT PLOT CHANNEL A (DIFFERENTIAL
INPUTS, 8192-POINT DATA RECORD)
MAX1192 toc01
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
108642
-80
-70
-60
-50
-40
-30
-20
-10
0
-90 012
f
CLK
= 22.005678MHz
f
INA
= 5.606183MHz
f
INB
= 8.056034MHz
A
INA
= A
INB
= -0.5dB FS
HD3
HD2
f
INB
FFT PLOT CHANNEL B (DIFFERENTIAL
INPUTS, 8192-POINT DATA RECORD)
MAX1192 toc02
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
108642
-80
-70
-60
-50
-40
-30
-20
-10
0
-90 012
f
CLK
= 22.005678MHz
f
INA
= 5.606183MHz
f
INB
= 8.056034MHz
A
INA
= A
INB
= -0.5dB FS
HD3
HD2
f
INA
FFT PLOT CHANNEL A (DIFFERENTIAL
INPUTS, 8192-POINT DATA RECORD)
MAX1192 toc03
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
108642
-80
-70
-60
-50
-40
-30
-20
-10
0
-90 012
f
CLK
= 22.005678MHz
f
INA
= 8.056034MHz
f
INB
= 5.606183MHz
A
INA
= A
INB
= -0.5dB FS
HD3
HD2
f
INB
FFT PLOT CHANNEL B (DIFFERENTIAL
INPUTS, 8192-POINT DATA RECORD)
MAX1192 toc04
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
108642
-80
-70
-60
-50
-40
-30
-20
-10
0
-90 012
f
CLK
= 22.005678MHz
f
INA
= 8.056034MHz
f
INB
= 5.606183MHz
A
INA
= A
INB
= -0.5dB FS
HD3
HD2
f
INA
TWO-TONE IMD PLOT (DIFFERENTIAL INPUTS, 8192-POINT DATA RECORD)
MAX1192 toc05
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
108642
-80
-70
-60
-50
-40
-30
-20
-10
0
-90 012
f
CLK
= 22.005678MHz
f
IN1
= 1.8MHz
f
IN2
= 2.3MHz
A
IN
= -7dB FS
f
IN2
f
IN1
Typical Operating Characteristics
(VDD= 3.0V, OVDD= 1.8V, V
REFIN
= VDD(internal reference), CL≈ 10pF at digital outputs, differential input at -0.5dB FS, f
CLK
=
22.005678MHz at 50% duty cycle, T
A
= +25°C, unless otherwise noted.)
MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
8 _______________________________________________________________________________________
FFT PLOT CHANNEL A (SINGLE-ENDED
INPUTS, 8192-POINT DATA RECORD)
MAX1192 toc06
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
108642
-80
-70
-60
-50
-40
-30
-20
-10
0
-90 012
f
CLK
= 22.005678MHz
f
INA
= 5.606183MHz
f
INB
= 8.056034MHz
A
INA
= A
INB
= -0.5dB FS
HD3
HD2
f
INB
FFT PLOT CHANNEL B (SINGLE-ENDED
INPUTS, 8192-POINT DATA RECORD)
MAX1192 toc07
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
108642
-80
-70
-60
-50
-40
-30
-20
-10
0
-90 012
f
CLK
= 22.005678MHz
f
INA
= 5.606183MHz
f
INB
= 8.056034MHz
A
INA
= A
INB
= -0.5dB FS
HD3
HD2
f
INA
FFT PLOT CHANNEL B (SINGLE-ENDED INPUTS, 8192-POINT DATA RECORD)
MAX1192 toc09
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
108642
-80
-70
-60
-50
-40
-30
-20
-10
0
-90 012
f
CLK
= 22.005678MHz
f
INA
= 8.056034MHz
f
INB
= 5.606183MHz
A
INA
= A
INB
= -0.5dB FS
HD3
HD2
f
INA
FFT PLOT CHANNEL A (SINGLE-ENDED INPUTS, 8192-POINT DATA RECORD)
MAX1192 toc08
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
108642
-80
-70
-60
-50
-40
-30
-20
-10
0
-90 012
f
CLK
= 22.005678MHz
f
INA
= 8.056034MHz
f
INB
= 5.606183MHz
A
INA
= A
INB
= -0.5dB FS
HD3
HD2
f
INB
Typical Operating Characteristics (continued)
(VDD= 3.0V, OVDD= 1.8V, V
REFIN
= VDD(internal reference), CL≈ 10pF at digital outputs, differential input at -0.5dB FS, f
CLK
=
22.005678MHz at 50% duty cycle, T
A
= +25°C, unless otherwise noted.)
MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
_______________________________________________________________________________________
9
SIGNAL-TO-NOISE RATIO
vs. ANALOG INPUT FREQUENCY
MAX1192 toc10
ANALOG INPUT FREQUENCY (MHz)
SNR (dB)
1007525 50
46.5
47.0
47.5
48.0
48.5
49.0
49.5
50.0
46.0 0125
CHANNEL A
CHANNEL B
SIGNAL-TO-NOISE AND DISTORTION
vs. ANALOG INPUT FREQUENCY
MAX1192 toc11
ANALOG INPUT FREQUENCY (MHz)
SINAD (dB)
1007525 50
46.5
47.0
47.5
48.0
48.5
49.0
49.5
50.0
46.0 0125
CHANNEL A
CHANNEL B
TOTAL HARMONIC DISTORTION vs. ANALOG INPUT FREQUENCY
MAX1192 toc12
ANALOG INPUT FREQUENCY (MHz)
THD (dBc)
1007525 50
-80
-75
-70
-65
-60
-55
-50
-45
-85 0125
CHANNEL A
CHANNEL B
SPURIOUS-FREE DYNAMIC RANGE
vs. ANALOG INPUT FREQUENCY
MAX1192 toc13
ANALOG INPUT FREQUENCY (MHz)
SFDR (dBc)
1007525 50
50
55
60
65
70
75
80
85
45
0125
CHANNEL A
CHANNEL B
Typical Operating Characteristics (continued)
(VDD= 3.0V, OVDD= 1.8V, V
REFIN
= VDD(internal reference), CL≈ 10pF at digital outputs, differential input at -0.5dB FS, f
CLK
=
22.005678MHz at 50% duty cycle, T
A
= +25°C, unless otherwise noted.)
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