MAXIM MAX1186 User Manual

General Description

The MAX1186 is a 3V, dual 10-bit analog-to-digital con­verter (ADC) featuring fully-differential wideband track­and-hold (T/H) inputs, driving two pipelined, nine-stage
ADCs. The MAX1186 is optimized for low-power, high
dynamic performance applications in imaging, instru­mentation, and digital communication applications. This
ADC operates from a single 2.7V to 3.6V supply, con­suming only 105mW while delivering a typical signal-to­noise ratio (SNR) of 59.4dB at an input frequency of
20MHz and a sampling rate of 40Msps. Digital outputs
A and B are updated alternating on the rising (CHA)
and the falling (CHB) edge of the clock. The T/H driven
input stages incorporate 400MHz (-3dB) input ampli­fiers. The converters may also be operated with single­ended inputs. In addition to low operating power, the
MAX1186 features a 2.8mA sleep mode as well as a
1µA power-down mode to conserve power during idle
periods.

An internal 2.048V precision bandgap reference sets
the full-scale range of the ADCs. A flexible reference
structure allows the use of this internal or an externally
derived reference, if desired for applications requiring
increased accuracy or a different input voltage range.

The MAX1186 features parallel, multiplexed, CMOS­compatible three-state outputs. The digital output for­mat can be set to two’s complement or straight offset
binary through a single control pin. The device provides
for a separate output power supply of 1.7V to 3.6V for
flexible interfacing. The MAX1186 is available in a
7mm x 7mm, 48-pin TQFP-EP package, and is speci­fied for the extended industrial (-40°C to +85°C) tem­perature range.

Pin-compatible, nonmultiplexed, high-speed versions of
the MAX1186 are also available. Please refer to the
MAX1180 data sheet for 105Msps, the MAX1181 data
sheet for 80Msps, the MAX1182 data sheet for 65Msps,
the MAX1183 data sheet for 40Msps, and the MAX1184
data sheet for 20Msps. For a pin-compatible lower
speed version (20Msps) of the MAX1186, please refer
to the MAX1185 data sheet.

Applications

Features

♦ Single 3V Operation
♦ Excellent Dynamic Performance:

59.4dB SNR at fIN= 20MHz
72dBc SFDR at fIN= 20MHz

♦ Low Power:

35mA (Normal Operation)

2.8mA (Sleep Mode)
1µA (Shutdown Mode)

♦ 0.02dB Gain and 0.25° Phase Matching
♦ Wide ±1V

P-P

Differential Analog Input Voltage

Range

♦ 400MHz, -3dB Input Bandwidth
♦ On-Chip 2.048V Precision Bandgap Reference
♦ Single 10-Bit Bus for Multiplexed, Digital Outputs
♦ User-Selectable Output Format—Two’s

Complement or Offset Binary

♦ 48-Pin TQFP Package with Exposed Paddle For

Improved Thermal Dissipation

MAX1186

Dual 10-Bit, 40Msps, 3V, Low-Power ADC with

Internal Reference and Multiplexed Parallel Outputs

________________________________________________________________ Maxim Integrated Products 1

D1A/B
D0A/B
OGND
OV

DD

OV

DD

OGND
A/B
N.C.
N.C.
N.C.
N.C.
N.C.

COM

V

DD

GND

INA+

INA-

V

DD

GND
INB-

INB+

GND

V

DD

CLK

1

2

3

4

5

6

7

8

9

10

11

12

36

35

34

33

32

31

30

29

28

27

26

25

48 TQFP-EP

GND

V

DD

GND

V

DD

T/B

SLEEP

PD

OE

N.C.

N.C.

N.C.

N.C.

1314151617181920212223

24

4847464544434241403938

37

REFN

REFP

REFIN

REFOUT

D9A/B

D8A/B

D7A/B

D6A/B

D5A/B

D4A/B

D3A/B

D2A/B

MAX1186

EP

NOTE: THE PIN 1 INDICATOR FOR LEAD-FREE
PACKAGES IS REPLACED BY A "+" SIGN.

Pin Configuration

19-2263; Rev 1; 4/06

Ordering Information

PART

TEMP RANGE

PIN­PACKAGE

PKG
CODE

MAX1186ECM

C48E-7

MAX1186ECM+

C48E-7

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Functional Diagram appears at end of data sheet.

High-Resolution Imaging

I/Q Channel Digitization

Multichannel IF Sampling

Instrumentation

Video Application

Ultrasound

+Denotes lead-free package.
*EP = Exposed paddle.

Pin-Compatible Versions table at end of data sheet.

-40°C to +85°C 48 TQFP-EP*

-40°C to +85°C 48 TQFP-EP*

MAX1186

Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Multiplexed Parallel Outputs

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= 3V, OVDD= 2.5V, 0.1µF and 1µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential w.r.t. COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 40MHz, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C.) (Note 2)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VDD, OVDDto GND ...............................................-0.3V to +3.6V

OGND to GND.......................................................-0.3V to +0.3V

INA+, INA-, INB+, INB- to GND ...............................-0.3V to V

DD

REFIN, REFOUT, REFP, REFN, COM,

CLK to GND............................................-0.3V to (V

DD

+ 0.3V)

OE, PD, SLEEP, T/B, D9A/B–D0A/B,

A/B to OGND .......................................-0.3V to (OV

DD

+ 0.3V)

Continuous Power Dissipation (T

A

= +70°C)

48-Pin TQFP-EP (derate 30.4mW/°C

above +70°C).........................................................2430mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-60°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER

CONDITIONS

UNITS

DC ACCURACY

Resolution 10 Bits

Integral Nonlinearity INL fIN = 7.5MHz

LSB

Differential Nonlinearity DNL fIN = 7.5MHz, no missing codes guaranteed

LSB

Offset Error

% FS

Gain Error 0 ±2

% FS

ANALOG INPUT

Differential Input Voltage
Range

V

DIFF

Differential or single-ended inputs ±1V

Common-Mode Input Voltage
Range

V

CM

V

D D

/ 2

V

Input Resistance R

IN

Switched capacitor load 100 kΩ

Input Capacitance C

IN

5pF

CONVERSION RATE

Maximum Clock Frequency f

CLK

40

MHz

CHA 5

Data Latency

CHB 5.5

Clock

cycles

DYNAMIC CHARACTERISTICS

f

INA or B

= 7.5MHz, TA = +25°C

Signal-to-Noise Ratio
(Note 3)

SNR

f

INA or B

= 20MHz, TA = +25°C

dB

f

INA or B

= 7.5MHz, TA = +25°C57

Signal-to-Noise and Distortion
(Note 3)

f

INA or B

= 20MHz, TA = +25°C

dB

f

INA or B

= 7.5MHz, TA = +25°C6474

Spurious-Free Dynamic Range
(Note 3)

SFDR

f

INA or B

= 20MHz, TA = +25°C6472

dBc

SYMBOL

MIN TYP MAX

±0.5 ±1.7

±0.25 ±1.0

< ±1 ±2.3

SINAD

± 0.5

57.3 59.5

56.8 59.4

56.5 59.2

59.4

MAX1186

Dual 10-Bit, 40Msps, 3V, Low-Power ADC with

Internal Reference and Multiplexed Parallel Outputs

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3V, OVDD= 2.5V, 0.1µF and 1µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential w.r.t. COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 40MHz, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C.) (Note 2)

PARAMETER

CONDITIONS

UNITS

f

INA or B

= 7.5MHz, TA = +25°C -72 -64

Total Harmonic Distortion
(First 4 Harmonics) (Note 3)

THD

f

INA or B

= 20MHz, TA = +25°C -71 -63

dBc

f

INA or B

= 7.5MHz -74

Third-Harmonic Distortion
(Note 3)

HD3

f

INA or B

= 20MHz -72

dBc

f

INA or B

= 11.6066MHz at -6.5dBFS

Intermodulation Distortion IMD

f

I N A o r B

= 13.3839M H z at - 6.5d BFS ( N ote 4)

-76

dBc

Small-Signal Bandwidth Input at -20dBFS, differential inputs

MHz

Full-Power Bandwidth

Input at -0.5dBFS, differential inputs

MHz

Aperture Delay t

AD

1ns

Aperture Jitter t

AJ

2

ps

RMS

Overdrive Recovery Time For 1.5x full-scale input 2 ns

Differential Gain ±1%

Differential Phase

D egr ees

Output Noise INA+ = INA- = INB+ = INB- = COM 0.2

LSB

RMS

INTERNAL REFERENCE

Reference Output Voltage

V

Reference Temperature
Coefficient

60

ppm/°C

Load Regulation

mV/mA

BUFFERED EXTERNAL REFERENCE (V

REFIN

= 2.048V)

REFIN Input Voltage

V

Positive Reference Output
Voltage

V

Negative Reference Output
Voltage

V

Differential Reference Output
Voltage Range

∆V

REF

= V

REFP

- V

REFN

V

REFIN Resistance

MΩ

SYMBOL

FPBW

REFOUT

TC

REF

V

REFIN

V

REFP

V

REFN

∆V

REF

R

REFIN

MIN TYP MAX

0.95 1.024 1.10

500

400

±0.25

2.048
±3%

1.25

2.048

2.012

0.988

> 50

MAX1186

Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Multiplexed Parallel Outputs

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3V, OVDD= 2.5V, 0.1µF and 1µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential w.r.t. COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 40MHz, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C.) (Note 2)

PARAMETER

CONDITIONS

UNITS

Maximum REFP, COM Source
Current

5

mA

Maximum REFP, COM Sink
Current

I

SINK

µA

Maximum REFN Source Current

µA

Maximum REFN Sink Current I

SINK

-5

mA

UNBUFFERED EXTERNAL REFERENCE (V

REFIN

= GND, reference voltage applied to REFP, REFN, and COM)

REFP, REFN Input Resistance

R

REFP

,

Measured between REFP and COM, and
REFN and COM

4kΩ

Differential Reference Input
Voltage

∆V

REF

= V

REFP

- V

REFN

V

COM Input Voltage V

COM

VDD / 2

V

REFP Input Voltage

V

COM

+

∆V

REF

/ 2

V

REFN Input Voltage

V

COM

-

∆V

REF

/ 2

V

DIGITAL INPUTS (CLK, PD, OE, SLEEP, T/B)

CLK

0.8

Input High Threshold V

IH

PD, OE, SLEEP, T/B

0.8

V

CLK

0.2

Input Low Threshold V

IL

PD, OE, SLEEP, T/B

0.2

V

Input Hysteresis

0.1 V

I

IH

VIH = OV

DD

or V

DD

(CLK) ±5

Input Leakage

I

IL

VIL = 0 ±5

µA

Input Capacitance C

IN

5pF

DIGITAL OUTPUTS (D0A/B–D9A/B, A/B)

Output-Voltage Low V

OL

I

SINK

= -200µA 0.2 V

Output-Voltage High V

OH

I

SOURCE

= 200µA

- 0.2

V

Three-State Leakage Current I

LEAK

OE = OV

DD

±10 µA

Three-State Output Capacitance

C

OUT

OE = OV

DD

5pF

SYMBOL

I

SOURCE

MIN TYP MAX

I

SOURCE

R

REFN

∆V

REF

V

REFP

V

REFN

V

HYST

V

DD

x OV

DD

-250

250

1.024
±10%

±10%

x V

x OV

DD

DD

OV

DD

MAX1186

Dual 10-Bit, 40Msps, 3V, Low-Power ADC with

Internal Reference and Multiplexed Parallel Outputs

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3V, OVDD= 2.5V, 0.1µF and 1µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential w.r.t. COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 40MHz, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C.) (Note 2)

PARAMETER

CONDITIONS

UNITS

POWER REQUIREMENTS

Analog Supply Voltage Range V

DD

2.7 3.0 3.6 V

Output Supply Voltage Range OV

DD

1.7 2.5 3.6 V

Operating, f

INA or B

= 20MHz at -0.5dBFS 35 50

Sleep mode 2.8

mA

Analog Supply Current I

VDD

Shutdown, clock idle, PD = OE = OV

DD

115µA

Operating, CL = 15pF, f

INA or B

= 20MHz at

-0.5dBFS

9mA

Sleep mode

Output Supply Current

Shutdown, clock idle, PD = OE = OV

DD

210

µA

Operating, f

INA or B

= 20MHz at -0.5dBFS

Sleep mode 8.4

mW

Power Dissipation

Shutdown, clock idle, PD = OE = OV

DD

345µW

Offset

mV/V

Power-Supply Rejection Ratio PSRR

Gain

%/V

TIMING CHARACTERISTICS

CLK Rise to CHA Output Data
Valid

t

DOA

Figure 3 (Note 5) 5 8 ns

CLK Fall to CHB Output Data
Valid

t

DOB

Figure 3 (Note 5) 5 8 ns

Clock Rise/Fall to A/B Rise/Fall
Time

t

DA/B

6ns

Output Enable Time

Figure 4 10 ns

Output Disable Time

Figure 4 1.5 ns

CLK Pulse Width High t

CH

Figure 3, clock period: 25ns

12.5 ±3.8

ns

CLK Pulse Width Low t

CL

Figure 3, clock period: 25ns

12.5 ±3.8

ns

Wake-up from sleep mode (Note 6)

Wake-Up Time

Wake-up from shutdown (Note 6) 1.5

µs

CHANNEL-TO-CHANNEL MATCHING

Crosstalk f

INA or B

= 20MHz at -0.5dBFS -70 dB

Gain Matching f

INA or B

= 20MHz at -0.5dBFS

dB

Phase Matching f

INA or B

= 20MHz at -0.5dBFS

D eg r ees

Note 1: Equivalent dynamic performance is obtainable over full OVDDrange with reduced CL.
Note 2: Specifications at ≥ +25°C are guaranteed by production test and < +25°C guaranteed by design and characterization.
Note 3: SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dB FS referenced to a ±1.024V full-scale

input voltage range.

Note 4: Intermodulation distortion power of the intermodulation products relative to the individual carrier. This number is 6dB or bet-

ter, if referenced to the two-tone envelope.

Note 5: Digital outputs settle to V

IH

and VIL. Parameter guaranteed by design.

Note 6: With REFIN driven externally, REFP, COM, and REFN are left floating while powered down.

SYMBOL

I

OVDD

PDISS

t

ENABLE

t

DISABLE

t

WAKE

MIN TYP MAX

100

105 150

±0.2

±0.1

0.41

0.02 ±0.2

0.25

MAX1186

Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Multiplexed Parallel Outputs

6 _______________________________________________________________________________________

Typical Operating Characteristics

(VDD= 3V, OVDD= 2.5V, V

REFIN

= 2.048V, differential input at -0.5dBFS, f

CLK

= 40MHz, CL≈ 10pF, TA= +25°C, unless otherwise noted.)

-100

-80

-90

-60

-70

-40

-50

-30

-10

-20

0

046821012141816 20

FFT PLOT CHA (DIFFERENTIAL INPUT,

8192-POINT DATA RECORD)

MAX1186 toc01

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHA

f

CLK

= 40.0005678MHz

f

INA

= 6.1475482MHz

f

INB

= 7.5342866MHz

A

INA

= -0.552dBFS

HD3

HD2

-100

-80

-90

-60

-70

-40

-50

-30

-10

-20

0

046821012141816 20

FFT PLOT CHB (DIFFERENTIAL INPUT,

8192-POINT DATA RECORD)

MAX1186 toc02

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHB

f

CLK

= 40.0005678MHz

f

INA

= 6.1475482MHz

f

INB

= 7.5342866MHz

A

INB

= -0.534dBFS

HD3

HD2

-100

-80

-90

-60

-70

-40

-50

-30

-10

-20

0

0 46821012141816 20

FFT PLOT CHA (DIFFERENTIAL INPUT,

8192-POINT DATA RECORD)

MAX1186 toc03

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHAf

CLK

= 40.0005678MHz

f

INA

= 19.8879776MHz

f

INB

= 24.9661747MHz

A

INA

= -0.516dBFS

HD3

HD2

-100

-80

-90

-60

-70

-40

-50

-30

-10

-20

0

0 46821012141816 20

FFT PLOT CHB (DIFFERENTIAL INPUT,

8192-POINT DATA RECORD)

MAX1186 toc04

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHBf

CLK

= 40.0005678MHz

f

INA

= 19.8879776MHz

f

INB

= 24.9661747MHz

A

INB

= -0.498dBFS

HD3

HD2

-100

-80

-90

-60

-70

-40

-50

-30

-10

-20

0

0 46821012141816 20

TWO-TONE IMD PLOT (DIFFERENTIAL INPUT,

8192-POINT DATA RECORD)

MAX1186 toc05

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

IM2

IM3

IM3

f

CLK

= 40.0005678MHz

f

IN1

= 11.606610MHz

f

IN2

= 13.383979MHz

A

IN

= -6.5dBFS

IM2

f

IN2

f

IN1

57

56

55

59

58

60

61

0 102030405060708090100110

SIGNAL-TO-NOISE RATIO

vs. ANALOG INPUT FREQUENCY

MAX1186 toc06

ANALOG INPUT FREQUENCY (MHz)

SNR (dB)

CHB

CHA

62

61

60

59

58

57

54

56

55

0102030 5040 60 8070 90 100 110

SIGNAL-TO-NOISE AND DISTORTION

vs. ANALOG INPUT FREQUENCY

MAX1186 toc07

ANALOG INPUT FREQUENCY (MHz)

SINAD (dB)

CHB

CHA

-72

-76

-80

-68

-64

-60

TOTAL HARMONIC DISTORTION

vs. ANALOG INPUT FREQUENCY

MAX1186 toc08

ANALOG INPUT FREQUENCY (MHz)

THD (dBc)

0102030405060708090100110

CHA

CHB

60

64

72

68

76

80

SPURIOUS-FREE DYNAMIC RANGE

vs. ANALOG INPUT FREQUENCY

MAX1186 toc09

ANALOG INPUT FREQUENCY (MHz)

SFDR (dBc)

0 102030405060708090100110

CHA

CHB

MAX1186

Dual 10-Bit, 40Msps, 3V, Low-Power ADC with

Internal Reference and Multiplexed Parallel Outputs

_______________________________________________________________________________________ 7

-8

-4

-6

0

-2

4

2

6

1 10 100 1000

FULL-POWER INPUT BANDWIDTH

vs. ANALOG INPUT FREQUENCY, SINGLE-ENDED

MAX1186 toc10

ANALOG INPUT FREQUENCY (MHz)

GAIN (dB)

-8

-4

-6

0

-2

4

2

6

1 10 100 1000

SMALL-SIGNAL INPUT BANDWIDTH

vs. ANALOG INPUT FREQUENCY, SINGLE-ENDED

MAX1186 toc11

ANALOG INPUT FREQUENCY (MHz)

GAIN (dB)

VIN = 100mV

P-P

35

45

40

55

50

60

65

-20 0

SIGNAL-TO-NOISE RATIO

vs. ANALOG INPUT POWER (f

IN

= 19.89MHz)

MAX1186 toc12

ANALOG INPUT POWER (dBFS)

SNR (dB)

-12-16 -8 -4

35

45

40

55

50

60

65

-20 0

SIGNAL-TO-NOISE PLUS DISTORTION

vs. ANALOG INPUT POWER (f

IN

= 19.89MHz)

MAX1186 toc13

ANALOG INPUT POWER (dBFS)

SINAD (dB)

-12-16 -8 -4

-80

-75

-65

-70

-60

-55

-20 -12-16 -8 -4 0

TOTAL HARMONIC DISTORTION

vs. ANALOG INPUT POWER (f

IN

= 19.89MHz)

MAX1186 toc14

ANALOG INPUT POWER (dBFS)

THD (dBc)

65

60

75

70

80

-20 -12-16 -8 -4 0

SPURIOUS-FREE DYNAMIC RANGE

vs. ANALOG INPUT POWER (f

IN

= 19.89MHz)

MAX1186 toc15

ANALOG INPUT POWER (dBFS)

SFDR (dBc)

-0.3

-0.2

-0.1

0

0.1

0.2

0.3

0 256128 384 512 640 768 896 1024

INTEGRAL NONLINEARITY

(BEST ENDPOINT FIT)

MAX1186 toc16

DIGITAL OUTPUT CODE

INL (LSB)

-0.3

-0.2

-0.1

0

0.1

0.2

0.3

0 256128 384 512 640 768 896 1024

DIFFERENTIAL NONLINEARITY

MAX1186 toc17

DIGITAL OUTPUT CODE

DNL (LSB)

-0.1

-0.2

0.1

0

0.3

0.2

0.4

-40 85

GAIN ERROR vs. TEMPERATURE

EXTERNAL REFERENCE (V

REFIN

= 2.048V)

MAX1186 toc18

TEMPERATURE (°C)

GAIN ERROR (%FS)

10-15 35 60

CHB

CHA

Typical Operating Characteristics (continued)

(VDD= 3V, OVDD= 2.5V, V

REFIN

= 2.048V, differential input at -0.5dBFS, f

CLK

= 40MHz, CL≈ 10pF, TA= +25°C, unless otherwise noted.)