MAXIM MAX1182 Technical data

General Description

The MAX1182 is a 3V, dual 10-bit analog-to-digital con­verter (ADC) featuring fully-differential wideband track­and-hold (T/H) inputs, driving two pipelined, 9-stage
ADCs. The MAX1182 is optimized for low-power, high­dynamic performance applications in imaging, instru­mentation and digital communication applications. This
ADC operates from a single 2.7V to 3.6V supply, con­suming only 195mW while delivering a typical signal-to­noise ratio (SNR) of 59dB at an input frequency of
20MHz and a sampling rate of 65Msps. The T/H driven
input stages incorporate 400MHz (-3dB) input amplifiers.
The converters may also be operated with single-ended
inputs. In addition to low operating power, the MAX1182
features a 2.8mA sleep mode as well as a 1µA power­down mode to conserve power during idle periods.

An internal 2.048V precision bandgap reference sets
the full-scale range of the ADC. A flexible reference
structure allows the use of the internal or an externally
derived reference, if desired for applications requiring
increased accuracy or a different input voltage range.

The MAX1182 features parallel, CMOS-compatible
three-state outputs. The digital output format is set to
two’s complement or straight offset binary through a
single control pin. The device provides for a separate
output power supply of 1.7V to 3.6V for flexible interfac­ing. The MAX1182 is available in a 7mm x 7mm, 48-pin
TQFP package, and is specified for the extended
industrial (-40°C to +85°C) temperature range.

Pin-compatible higher and lower speed versions of the
MAX1182 are also available. Please refer to the
MAX1180 datasheet for 105Msps, the MAX1181
datasheet for 80Msps, the MAX1183 datasheet for
40Msps, and the MAX1184 datasheet for 20Msps. In
addition to these speed grades, this family includes a
20Msps multiplexed output version (MAX1185), for
which digital data is presented time-interleaved on a
single, parallel 10-bit output port.

Applications

High Resolution Imaging

I/Q Channel Digitization

Multchannel IF Undersampling

Instrumentation

Video Application

Features

♦ Single 3V Operation
♦ Excellent Dynamic Performance:

59dB SNR at fIN= 20MHz
77dB SFDR at fIN= 20MHz

♦ Low Power:

65mA (Normal Operation)

2.8mA (Sleep Mode)
1µA (Shutdown Mode)

♦ 0.02dB Gain and 0.25° Phase Matching (typ)
♦ Wide ±1V

P-P

Differential Analog Input Voltage

Range

♦ 400MHz -3dB Input Bandwidth
♦ On-Chip 2.048V Precision Bandgap Reference
♦ User-Selectable Output Format—Two’s

Complement or Offset Binary

♦ 48-Pin TQFP Package with Exposed Pad for

Improved Thermal Dissipation

♦ Evaluation Kit Available

MAX1182

Dual 10-Bit, 65Msps, 3V, Low-Power ADC

with Internal Reference and Parallel Outputs

________________________________________________________________ Maxim Integrated Products 1

D1A
D0A
OGND
OV

DD

OV

DD

OGND
D0B
D1B
D2B
D3B
D4B
D5B

COM

V

DD

GND

INA+

INA-

V

DD

GND
INB-

INB+

GND

V

DD

CLK

1

2

3

4

5

6

7

8

9

10

11

12

36

35

34

33

32

31

30

29

28

27

26

25

48 TQFP-EP

MAX1182

1314151617181920212223

24

4847464544434241403938

37

REFN

REFP

REFIN

REFOUT

D9A

D8A

D7A

D6A

D5A

D4A

D3A

D2A

EP

NOTE: THE PIN 1 INDICATOR FOR LEAD-FREE
PACKAGES IS REPLACED BY A "+" SIGN.

GND

V

DD

V

DD

GND

T/B

SLEEP

PD

OE

D9B

D8B

D7B

D6B

Pin Configuration

19-2094; Rev 1; 4/06

EVALUATION KIT

AVAILABLE

Ordering Information

PART

TEMP RANGE

PIN­PACKAGE

PKG

+Denotes lead-free package.
*EP = Exposed paddle.

Pin-Compatible Versions table at end of data sheet.

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim's website at www.maxim-ic.com.

MAX1182ECM -40°C to +85°C 48 TQFP-EP* C48E-7
M AX 1182E C M + -40°C to +85°C 48 TQFP-EP* C48E-7

CODE

MAX1182

Dual 10-Bit, 65Msps, 3V, Low-Power ADC
with Internal Reference and Parallel Outputs

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= 3V, OVDD= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2Vp-p (differential w.r.t. COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 65MHz (50% duty cycle),

T

A

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VDD, OVDD to GND...............................................-0.3V to +3.6V

OGND to GND.......................................................-0.3V to +0.3V

INA+, INA-, INB+, INB- to GND ...............................-0.3V to V

DD

REFIN, REFOUT, REFP, REFN, CLK,

COM to GND ..........................................-0.3V to (V

DD

+ 0.3V)

OE, PD, SLEEP, T/B, D9A–D0A,

D9B–D0B to OGND .............................-0.3V to (OV

DD

+ 0.3V)

Continuous Power Dissipation (T

A

= +70°C)
48-Pin TQFP-EP (derate 30.4mW/°C

above +70°C)............................................................2430mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-60°C to +150°C

Lead temperature (soldering, 10s) ..................................+300°C

PARAMETER

CONDITIONS

UNITS

DC ACCURACY

Resolution 10 Bits

Integral Nonlinearity INL fIN = 7.47MHz

LSB

Differential Nonlinearity DNL

LSB

Offset Error

% FS

Gain Error 0 ±2

% FS

ANALOG INPUT

Differential Input Voltage
Range

V

DIFF

Differential or single-ended inputs

V

Common-Mode Input Voltage
Range

V

CM

V

D D

/ 2

V

Input Resistance R

IN

Switched capacitor load 33 kΩ

Input Capacitance C

IN

5pF

CONVERSION RATE

Maximum Clock Frequency f

CLK

65

MHz

Data Latency 5

Clock

cycles

DYNAMIC CHARACTERISTICS

f

INA or B

= 7.47MHz, TA = +25°C

f

INA or B

= 20MHz, TA = +25°C

59

Signal-to-Noise Ratio
(Note 3)

SNR

f

INA or B

= 39.9MHz 59

dB

f

INA or B

= 7.47MHz, TA = +25°C

59

f

INA or B

= 20MHz, TA = +25°C56

Signal-to-Noise and Distortion
(Up to 5th Harmonic) (Note 3)

f

INA or B

= 39.9MHz

dB

f

INA or B

= 7.47MHz, TA = +25°C6576

f

INA or B

= 20MHz, TA = +25°C6577

Spurious-Free Dynamic Range
(Note 3)

SFDR

f

INA or B

= 39.9MHz 75

dBc

SYMBOL

fIN = 7.47MHz, no missing codes guaranteed ±0.4 ±1.0

MIN TYP MAX

±0.6 ±2.2

< ±1 ±1.7

SINAD

±1.0

± 0.5

56.8 59.5

56.5

56.5

58.5

58.5

MAX1182

Dual 10-Bit, 65Msps, 3V, Low-Power ADC

with Internal Reference and Parallel Outputs

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3V, OVDD= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2Vp-p (differential w.r.t. COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 65MHz (50% duty cycle),

T

A

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)

PARAMETER

CONDITIONS

UNITS

f

INA or B

= 7.47MHz, TA = +25°C

-64

f

INA or B

= 20MHz, TA = +25°C -76 -63

Total Harmonic Distortion
(First 4 Harmonics) (Note 3)

THD

f

INA or B

= 39.9MHz -74

dBc

f

INA or B

= 7.47MHz -83

f

INA or B

= 20MHz -82

Third-Harmonic Distortion
(Note 3)

HD3

f

INA or B

= 39.9MHz -77

dBc

Intermodulation Distortion IMD

f

INA or B

= 19.13042MHz at -6.5dBFS

f

I N A o r B

= 21.2886M H z at - 6.5d BFS ( N ote 4)

-75

dBc

Small-Signal Bandwidth Input at -20dB FS, differential inputs

MHz

Full-Power Bandwidth

Input at -0.5dB FS, differential inputs

MHz

Aperture Delay t

AD

1ns

Aperture Jitter t

AJ

2

ps

RMS

Overdrive Recovery Time For 1.5x full-scale input 2 ns
Differential Gain ±1%

Differential Phase

d egr ees

Output Noise INA+ = INA- = INB+ = INB- = COM 0.2

LSB

RMS

INTERNAL REFERENCE

Reference Output Voltage

V

Reference Temperature
Coefficient

60

ppm/°C

Load Regulation

mV/mA

BUFFERED EXTERNAL REFERENCE (V

REFIN

= 2.048V)

REFIN Input Voltage

V

Positive Reference Output
Voltage

V

Negative Reference Output
Voltage

V

Differential Reference Output
Voltage Range

ΔV

REF

= V

REFP

- V

REFN

V

REFIN Resistance

MΩ

SYMBOL

FPBW

REFOUT

TC

REF

V

REFIN

V

REFP

V

REFN

ΔV

REF

R

REFIN

MIN TYP MAX

-75.5

500

400

±0.25

2.048

±3%

1.25

0.95 1.024 1.10

2.048

2.012

0.988

> 50

MAX1182

Dual 10-Bit, 65Msps, 3V, Low-Power ADC
with Internal Reference and Parallel Outputs

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3V, OVDD= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2Vp-p (differential w.r.t. COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 65MHz (50% duty cycle),

T

A

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)

PARAMETER

CONDITIONS

UNITS

Maximum REFP, COM Source
Current

> 5

mA

Maximum REFP, COM Sink
Current

I

SINK

µA

Maximum REFN Source Current

µA

Maximum REFN Sink Current I

SINK

> 5

mA

UNBUFFERED EXTERNAL REFERENCE (V

REFIN

= AGND, reference voltage applied to REFP, REFN, and COM)

REFP, REFN Input Resistance

R

REFP

,

Measured between REFP and COM, and
REFN and COM

4kΩ

Differential Reference Input
Voltage

ΔV

REF

= V

REFP

- V

REFN

V

COM Input Voltage V

COM

VDD / 2

V

REFP Input Voltage

V

COM

+

ΔV

REF

/ 2

V

REFN Input Voltage

V

COM

-

ΔV

REF

/ 2

V

DIGITAL INPUTS (CLK, PD, OE, SLEEP, T/B)

CLK

0.8

Input High Threshold V

IH

PD, OE, SLEEP, T/B

0.8

V

CLK

0.2

Input Low Threshold V

IL

PD, OE, SLEEP, T/B

0.2

V

Input Hysteresis

0.1 V

I

IH

VIH = OV

DD

or V

DD

(CLK) ±5

Input Leakage

I

IL

VIL = 0 ±5

µA

Input Capacitance C

IN

5pF

DIGITAL OUTPUTS (D9A–D0A, D9B–D0B)

Output-Voltage Low V

OL

I

SINK

= 200µA 0.2 V

Output-Voltage High V

OH

I

SOURCE

= 200µA

- 0.2

V

Three-State Leakage Current I

LEAK

OE = OV

DD

±10 µA

Three-State Output Capacitance

C

OUT

OE = OV

DD

5pF

SYMBOL

I

SOURCE

MIN TYP MAX

I

SOURCE

R

REFN

ΔV

REF

V

REFP

V

REFN

V

HYST

x V

DD

x OV

DD

250

250

1.024

±10%

± 10%

x V

x OV

DD

DD

OV

DD

MAX1182

Dual 10-Bit, 65Msps, 3V, Low-Power ADC

with Internal Reference and Parallel Outputs

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3V, OVDD= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2Vp-p (differential w.r.t. COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 65MHz (50% duty cycle),

T

A

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)

PARAMETER

CONDITIONS

POWER REQUIREMENTS

Analog Supply Voltage Range V

DD

2.7 3.0 3.6 V

Output Supply Voltage Range OV

DD

1.7 2.5 3.6 V

Operating, f

INA or B

= 20MHz at -0.5dBFS 65 80

Sleep mode 2.8

mA

Analog Supply Current I

VDD

Shutdown, clock idle, PD = OE = OV

DD

115µA

Operating, CL = 15pF,
f

INA or B

= 20MHz at -0.5dBFS

11 mA

Sleep mode

Output Supply Current

Shutdown, clock idle, PD = OE = OV

DD

210

µA

Operating, f

INA or B

= 20MHz at -0.5dBFS

Sleep mode 8.4

Power Dissipation

Shutdown, clock idle, PD = OE = OV

DD

345µW

Offset

Power-Supply Rejection Ratio PSRR

Gain

TIMING CHARACTERISTICS

CLK Rise to Output Data Valid t

DO

Figure 3 (Note 5) 5 8 ns

Output Enable Time

Figure 4 10 ns

Output Disable Time

Figure 4 1.5 ns

CLK Pulse Width High t

CH

Figure 3, clock period: 15.4ns

7.7 ± 1.5

ns

CLK Pulse Width Low t

CL

Figure 3, clock period: 15.4ns

7.7 ± 1.5

ns

Wake-up from sleep mode (Note 6)

Wake-Up Time

Wake-up from shutdown (Note 6) 1.5

µs

CHANNEL-TO-CHANNEL MATCHING

Crosstalk f

INA or B

= 20MHz at -0.5dBFS -70 dB

Gain Matching f

INA or B

= 20MHz at -0.5dBFS

dB

Phase Matching f

INA or B

= 20MHz at -0.5dBFS

Note 1: Equivalent dynamic performance is obtainable over full OVDDrange with reduced CL.
Note 2: Specifications at ≥ +25°C are guaranteed by production test and < +25°C are guaranteed by design and characterization.
Note 3: SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dBFS referenced to a ±1.024V full-scale

input voltage range.

Note 4: Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is

6dB or better, if referenced to the two-tone envelope.

Note 5: Digital outputs settle to V

IH

, VIL. Parameter guaranteed by design.

Note 6: With REFIN driven externally, REFP, COM, and REFN are left floating while powered down.

SYMBOL

I

OVDD

PDISS

t

ENABLE

t

DISABLE

t

WAKE

MIN TYP MAX UNITS

100

195 240

±0.2 mV/V
±0.1 %/V

0.42

0.02 ±0.2

0.25 d eg r ees

mW

MAX1182

Dual 10-Bit, 65Msps, 3V, Low-Power ADC
with Internal Reference and Parallel Outputs

6 _______________________________________________________________________________________

Typical Operating Characteristics

(VDD= 3V, OVDD= 2.5V, internal reference, differential input at -0.5dBFS, f

CLK

= 65MHz, CL≈ 10pF, TA= +25°C, unless otherwise

noted.)

-100

-70

-80

-90

-50

-60

-10

-20

-30

-40

0

0 5 10 15 20 25 30 35

FFT PLOT CHA (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1182 toc01

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHA

f

INA

= 6.0065MHz

f

INB

= 7.51410MHz

f

CLK

= 65.00057MHz

A

INA

= -0.55dBFS

-100

-70

-80

-90

-50

-60

-10

-20

-30

-40

0

0 5 10 15 20 25 30 35

FFT PLOT CHB (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1182 toc02

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHB

f

INA

= 6.0065MHz

f

INB

= 7.51410MHz

f

CLK

= 65.00057MHz

A

INB

= -0.56dBFS

-100

-70

-80

-90

-50

-60

-10

-20

-30

-40

0

0 5 10 15 20 25 30 35

FFT PLOT CHA (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1182 toc03

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHA

f

INA

= 20.08257MHz

f

INB

= 25.09727MHz

f

CLK

= 65.00057MHz

A

INB

= -0.52dBFS

-100

-70

-80

-90

-50

-60

-10

-20

-30

-40

0

0 5 10 15 20 25 30 35

FFT PLOT CHB (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1182 toc04

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHB

f

INA

= 20.08257MHz

f

INB

= 25.09727MHz

f

CLK

= 65.00057MHz

A

INB

= -0.52dBFS

-100

-70

-80

-90

-50

-60

-10

-20

-30

-40

0

0 5 10 15 20 25 30 35

FFT PLOT CHA (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1182 toc05

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHA

f

INA

= 37.31661MHz

f

INB

= 46.99687MHz

f

CLK

= 65.00057MHz

A

INB

= -0.52dBFS

-100

-70

-80

-90

-50

-60

-10

-20

-30

-40

0

0 5 10 15 20 25 30 35

FFT PLOT CHB (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1182 toc06

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHB

f

INA

= 37.31661MHz

f

INB

= 46.99687MHz

f

CLK

= 65.00057MHz

A

INB

= -0.49dBFS

-100

-70

-80

-90

-50

-60

-10

-20

-30

-40

0

0 5 10 15 20 25 30 35

TWO-TONE IMD PLOT (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1182 toc07

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

f

IN1

f

IN1

= 19.13042MHz

f

IN2

= 21.28864MHz

f

CLK

= 65.00057MHz

A

IN

= -6.5dBFS

f

IN2

IM2

IM3

SIGNAL-TO-NOISE RATIO

vs. ANALOG INPUT FREQUENCY

MAX1182 toc08

ANALOG INPUT FREQUENCY (MHz)

SNR (dB)

61

55

56

57

58

59

60

0 102030405060708090100

CHA

CHB

62

61

54

010 2030405060708090100

56

55

58

57

59

60

SIGNAL-TO-NOISE AND DISTORTION

vs. ANALOG INPUT FREQUENCY

MAX1182 toc09

ANALOG INPUT FREQUENCY (MHz)

SINAD (dB)

CHA

CHB

MAX1182

Dual 10-Bit, 65Msps, 3V, Low-Power ADC

with Internal Reference and Parallel Outputs

_______________________________________________________________________________________ 7

-60

-80
0

10

20

30 40 50 60 70 80 90 100

TOTAL HARMONIC DISTORTION

vs. ANALOG INPUT FREQUENCY

-76

MAX1182 toc10

ANALOG INPUT FREQUENCY (MHz)

THD (dBc)

-72

-68

-64

CHB

CHA

0 10 20 30 40 50 60 70 80 90 100

SPURIOUS-FREE DYNAMIC RANGE

vs. ANALOG INPUT FREQUENCY

MAX1182 toc11

ANALOG INPUT FREQUENCY (MHz)

SFDR (dBc)

63

67

71

75

79

83

87

CHB

CHA

-8

-4

-6

0

-2

4

2

6

FULL-POWER INPUT BANDWIDTH

vs. ANALOG INPUT FREQUENCY, SINGLE-ENDED

MAX1182 toc12

ANALOG INPUT FREQUENCY (MHz)

GAIN (dB)

1 100 100010

-8

-4

-6

0

-2

4

2

6

SMALL-SIGNAL INPUT BANDWIDTH

vs. ANALOG INPUT FREQUENCY, SINGLE-ENDED

MAX1182 toc13

ANALOG INPUT FREQUENCY (MHz)

GAIN (dB)

1 100 100010

AIN = 100mV

P-P

35

45

40

55

50

60

65

-20 -12-16 -8 -4 0

SIGNAL-TO-NOISE RATIO

vs. ANALOG INPUT POWER (f

IN

= 20.09MHz)

MAX1182 toc14

ANALOG INPUT POWER (dBFS)

SNR (dB)

35

45

40

55

50

60

65

-20 -12-16 -8 -4 0

SIGNAL-TO-NOISE + DISTORTION

vs. ANALOG INPUT POWER (f

IN

= 20.09MHz)

MAX1182 toc15

ANALOG INPUT POWER (dBFS)

SINAD (dB)

-20 -12-16 -8 -4 0

TOTAL HARMONIC DISTORTION

vs. ANALOG INPUT POWER (f

IN

= 20.09MHz)

MAX1182 toc16

ANALOG INPUT POWER (dBFS)

THD (dB)

-90

-85

-65

-70

-75

-80

-60

-50

-55

-20 -12-16 -8 -4 0

SPURIOUS-FREE DYNAMIC RANGE

vs. ANALOG INPUT POWER (f

IN

= 20.09MHz)

MAX1182 toc17

ANALOG INPUT POWER (dBFS)

SFDR (dB)

50

55

75

70

65

60

85

80

90

-1.00

-0.50

-0.75

0.50

0.25

0

-0.25

1.00

0.75

0 256 384128 512 640 768 896 1024

INTEGRAL NONLINEARITY

(BEST-ENDPOINT FIT)

MAX1182 toc18

DIGITAL OUTPUT CODE

INL (LSB)

Typical Operating Characteristics (continued)

(VDD= 3V, OVDD= 2.5V, internal reference, differential input at -0.5dBFS, f

CLK

= 65MHz, CL≈ 10pF, TA= +25°C, unless otherwise

noted.)