MAXIM MAX1180 Technical data

General Description

The MAX1180 is a 3.3V, dual 10-bit, analog-to-digital
converter (ADC) featuring fully-differential wideband
track-and-hold (T/H) inputs, driving two pipelined, nine­stage ADCs. The MAX1180 is optimized for low-power,
high-dynamic performance applications in imaging,
instrumentation, and digital communication applica­tions. The MAX1180 operates from a single 2.7V to 3.6V
supply, consuming only 413mW, while delivering a typi­cal signal-to-noise ratio (SNR) of 58.5dB at an input fre­quency of 20MHz and a sampling rate of 105Msps. The
T/H driven input stages incorporate 400MHz (-3dB)
input amplifiers. The converters may also be operated
with single-ended inputs. In addition to low operating
power, the MAX1180 features a 2.8mA sleep mode, as
well as a 1µA power-down mode to conserve power
during idle periods.

An internal 2.048V precision bandgap reference sets
the full-scale range of the ADC. A flexible reference
structure allows the use of the internal or external
reference, if desired for applications requiring
increased accuracy or a different input voltage range.

The MAX1180 features parallel, CMOS-compatible
three-state outputs. The digital output format is set to
two’s complement or straight offset binary through a
single control pin. The device provides for a separate
output power supply of 1.7V to 3.6V for flexible interfac­ing. The MAX1180 is available in a 7mm ✕7mm, 48-pin
TQFP package, and is specified for the extended
industrial (-40°C to +85°C) temperature range.

Pin-compatible higher and lower speed versions of the
MAX1180 are also available. Please refer to the
MAX1181 data sheet for 80Msps, the MAX1182 data
sheet for 65Msps, the MAX1183 data sheet for 40Msps,
and the MAX1184 data sheet for 20Msps. In addition to
these speed grades, this family includes a 20Msps mul­tiplexed output version (MAX1185), for which digital
data is presented time-interleaved on a single, parallel
10-bit output port.

Applications

High Resolution Imaging

I/Q Channel Digitization

Multichannel IF Undersampling

Instrumentation

Video Application

Features

♦ Single 3.3V Operation

♦ Excellent Dynamic Performance

58.5dB SNR at fIN= 20MHz
72dB SFDR at fIN= 20MHz

♦ SNR Flat within 1dB for fIN= 20MHz to 100MHz

♦ Low Power

125mA (Normal Operation)

2.8mA (Sleep Mode)
1µA (Shutdown Mode)

♦ 0.02dB Gain and 0.25° Phase Matching (typ)

♦ Wide ±1V

P-P

Differential Analog Input Voltage

Range

♦ 400MHz, -3dB Input Bandwidth

♦ On-Chip 2.048V Precision Bandgap Reference

♦ User-Selectable Output Format—Two’s

Complement or Offset Binary

♦ 48-Pin TQFP Package with Exposed Pad for

Improved Thermal Dissipation

MAX1180

Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC

with Internal Reference and Parallel Outputs

________________________________________________________________ Maxim Integrated Products 1

D1A
D0A
OGND
OV

DD

OV

DD

OGND
D0B
D1B
D2B
D3B
D4B
D5B

COM

V

DD

GND
INA+
INA-

V

DD

GND
INB­INB+
GND

V

DD

CLK

1

2

3

4

5

6

7

8

9

10

11

12

36

35

34

33

32

31

30

29

28

27

26

25

48 TQFP-EP

MAX1180

GND

V

DD

GND

V

DD

T/B

SLEEP

PD

OE

D9B

D8B

D7B

D6B

1314151617181920212223

24

4847464544434241403938

37

REFN

REFP

REFIN

REFOUT

D9A

D8A

D7A

D6A

D5A

D4A

D3A

D2A

EP

NOTE: THE PIN 1 INDICATOR FOR LEAD-FREE PACKAGES IS REPLACED
BY A "+" SIGN.

Pin Configuration

Ordering Information

19-2097; Rev 1; 2/07

EVALUATION KIT

AVAILABLE

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

PART TEMP RANGE PIN-PACKAGE

MAX1180ECM -40°C to +85°C 48 TQFP-EP*

MAX1180ECM+ -40°C to +85°C 48 TQFP-EP*

Functional Diagram appears at end of data sheet.

+Denotes a lead-free and RoHS-compliant package.

*EP = Exposed paddle.

MAX1180

Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= 3.3V, OVDD= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential with respect to COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 105.263MHz, TA= T

MIN

to

T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VDD, OVDDto GND ...............................................-0.3V to +3.6V

OGND to GND.......................................................-0.3V to +0.3V

INA+, INA-, INB+, INB- to GND ...............................-0.3V to V

DD

REFIN, REFOUT, REFP, REFN, CLK,

COM to GND ............................................-0.3V to (V

DD

+ 0.3V)

OE, PD, SLEEP, T/B, D9A–D0A,

D9B–D0B to OGND ................................-0.3V to (OV

DD

+ 0.3V)

Continuous Power Dissipation (T

A

= +70°C)

48-Pin TQFP-EP (derate 30.4mW/°C above +70°C) ...2430mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-60°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER

CONDITIONS

UNITS

DC ACCURACY

Resolution 10 Bits

Integral Nonlinearity INL fIN = 7.47MHz

LSB

Differential Nonlinearity DNL

LSB

Offset Error

% FS

Gain Error 0 ±2

% FS

ANALOG INPUT

Differential Input Voltage Range V

DIFF

Differential or single-ended inputs

V

Common-Mode Input Voltage
Range

V

CM

V

DD

/

V

Input Resistance R

IN

Switched capacitor load 20 kΩ

Input Capacitance C

IN

5pF

CONVERSION RATE

Maximum Clock Frequency f

CLK

MHz

Data Latency 5

Clock

Cycles

DYNAMIC CHARACTERISTICS

f

INA or B

= 7.47MHz, TA = +25°C59

f

INA or B

= 20MHz, TA = +25°C55

Signal-to-Noise Ratio (Note 3) SNR

f

INA or B

= 50.078MHz 58

dB

f

INA or B

= 7.47MHz, TA = +25°C

f

INA or B

= 20MHz, TA = +25°C

Signal-to-Noise and Distortion
(Note 3)

f

INA or B

= 50.078MHz

dB

f

INA or B

= 7.47MHz, TA = +25°C72

f

INA or B

= 20MHz, TA = +25°C6072

Spurious-Free Dynamic
Range (Note 3)

SFDR

f

INA or B

= 50.078MHz 70

dBc

f

INA or B

= 7.47MHz, TA = +25°C -71

f

INA or B

= 20MHz, TA = +25°C -70 -59

Total Harmonic Distortion

(First Four Harmonics) (Note 3)

THD

f

INA or B

= 50.078MHz -69

dBc

SYMBOL

fIN = 7.47MHz, no missing codes guaranteed -1.0 ±0.4 +1.5

MIN TYP MAX

±0.75 ±2.5

-1.8 +1.8

SINAD

±1.0

2 ± 0.5

105

54.7 58.1

58.5

58.2

57.6

MAX1180

Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC

with Internal Reference and Parallel Outputs

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential with respect to COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 105.263MHz, TA= T

MIN

to

T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)

PARAMETER

CONDITIONS

UNITS

f

INA or B

= 7.47MHz -75

f

INA or B

= 20MHz -75

Third-Harmonic Distortion
(Note 3)

HD3

f

INA or B

= 50.078MHz -73

dBc

Intermodulation Distortion IMD

f

INA or B

= 38.055MHz at -6.5dBFS

f

INA or B

= 42.926MHz at -6.5dBFS

(Note 4)

-74 dBc

Small-Signal Bandwidth Input at -20dBFS, differential inputs 500 MHz

Full-Power Bandwidth

Input at -0.5dBFS, differential inputs 400 MHz

Aperture Delay t

AD

1ns

Aperture Jitter t

AJ

2

ps

RMS

Overdrive Recovery Time For 1.5 ✕ full-scale input 2 ns

Differential Gain ±1%

Differential Phase

degrees

Output Noise INA+ = INA- = INB+ = INB- = COM 0.2

LSB

RMS

INTERNAL REFERENCE

Reference Output Voltage

V

Reference Temperature
Coefficient

60

ppm/°C

Load Regulation

mV/mA

BUFFERED EXTERNAL REFERENCE (V

REFIN

= 2.048V)

REFIN Input Voltage

V

Positive Reference Output
Voltage

V

Negative Reference Output
Voltage

V

Differential Reference Output
Voltage Range

∆V

REF

= V

REFP

- V

REFN

V

REFIN Resistance

MΩ

Maximum REFP, COM Source
Current

5mA

Maximum REFP, COM Sink
Current

I

SINK

µA

Maximum REFN Source Current

250 µA

Maximum REFN Sink Current I

SINK

-5 mA

SYMBOL

FPBW

REFOUT

TC

REF

V

REFIN

V

REFP

V

REFN

MIN TYP MAX

±0.25

2.048

±3%

1.25

2.048

2.162

1.138

∆V

REF

R

REFIN

I

SOURCE

I

SOURCE

0.95 1.024 1.10

> 50

-250

MAX1180

Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs

4 _______________________________________________________________________________________

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

UNBUFFERED EXTERNAL REFERENCE (V

REFIN

= AGND, reference voltage applied to REFP, REFN, and COM )

REFP, REFN Input Resistance

R

REFP,

Measured between REFP and COM and
REFN and COM

4kΩ

Differential Reference Input
Voltage Range

∆V

REF

= V

REFP

- V

REFN

1.024
V

COM Input Voltage Range V

COM

V

DD

/ 2

V

REFP Input Voltage

V

COM

+

∆V

REF

/ 2

V

REFN Input Voltage

V

COM

-

∆V

REF

/ 2

V

DIGITAL INPUTS (CLK, PD, OE, SLEEP, T/B)

CLK

0.8 x

Input High Threshold V

IH

PD, OE, SLEEP, T/B

0.8 x

V

CLK

0.2 x

Input Low Threshold V

IL

PD, OE, SLEEP, T/B

0.2 x

V

Input Hysteresis

0.1 V

I

IH

VIH = OV

DD

or V

DD

(CLK) ±5

Input Leakage

I

IL

VIL = 0 ±5

µA

Input Capacitance C

IN

5pF

DIGITAL OUTPUTS (D9A–D0A, D9B–D0B)

Output-Voltage Low V

OL

I

SINK

= -200µA 0.2 V

Output-Voltage High V

OH

I

SOURCE

= 200µA

OV

DD

V

Three-State Leakage Current I

LEAK

OE = OV

DD

µA

Three-State Output Capacitance

C

OUT

OE = OV

DD

5pF

POWER REQUIREMENTS

Analog Supply Voltage Range V

DD

2.7 3.3 3.6 V

Output Supply Voltage Range OV

DD

1.7 2.5 3.6 V

Operating, f

INA or B

= 20MHz at -0.5dBFS

Sleep mode 2.8

mA

Analog Supply Current I

VDD

Shutdown, clock idle, PD = OE = OV

DD

115µA

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential with respect to COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 105.263MHz, TA= T

MIN

to

T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)

R

REFN

∆V

REF

V

REFP

V

REFN

V

HYST

V

DD

OV

DD

±10%

±10%

V

DD

OV

DD

- 0.2

±10

125 156

MAX1180

Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC

with Internal Reference and Parallel Outputs

_______________________________________________________________________________________ 5

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

-0.5dBFS

15 mA

Sleep mode

Output Supply Current

Shutdown, clock idle, PD = OE = OV

DD

210

µA

Operating, f

INA or B

= 20MHz at -0.5dBFS

mW

Sleep mode 9.2Power Dissipation
Shutdown, clock idle, PD = OE = OV

DD

350

µW

Offset

mV/V

Power-Supply Rejection Ratio PSRR

Gain

%/V

TIMING CHARACTERISTICS

CLK Rise to Output Data Valid t

DO

Figure 3 (Note 5) 5 8 ns

Output Enable Time

Figure 4 10 ns

Output Disable Time

Figure 4

1.5 ns

CLK Pulse-Width High t

CH

Figure 3, clock period: 9.5ns

4.75
ns

CLK Pulse-Width Low t

CL

Figure 3, clock period: 9.5ns

4.75
ns

Wakeup from sleep mode

Wake-Up Time (Note 6)

Wakeup from shutdown

1.5

µs

CHANNEL-TO-CHANNEL MATCHING

Crosstalk f

INA or B

= 20MHz at -0.5dBFS

-70 dB

Gain Matching f

INA or B

= 20MHz at -0.5dBFS

dB

Phase Matching f

INA or B

= 20MHz at -0.5dBFS

degrees

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential with respect to COM), CL= 10pF at digital outputs (Note 1), f

CLK

= 105.263MHz, TA= T

MIN

to

T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)

Note 1: Equivalent dynamic performance is obtainable over full OV

DD

range with reduced CL.

Note 2: Specifications at ≥ +25°C are guaranteed by production test and < +25°C are guaranteed by design and characterization.
Note 3: SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dBFS, referenced to a 1.024V full-scale

input voltage range.

Note 4: Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is

6dB or better, if referenced to the two-tone envelope.

Note 5: Digital outputs settle to V

IH

, VIL. Parameter guaranteed by design.

Note 6: With REFIN driven externally, REFP, COM, and REFN are left floating while powered down.

I

OVDD

PDISS

t

ENABLE

t

DISABLE

t

WAKE

Operating, CL = 15pF , f

INA or B

= 20MHz at

100

413 511

±0.2

±0.1

±1.5

±1.5

0.18

0.02 ±0.2

0.25

MAX1180

Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs

6 _______________________________________________________________________________________

Typical Operating Characteristics

(VDD= 3.3V, OVDD= 2.5V, internal reference, differential input at -0.5dBFS, f

CLK

= 105.0006MHz, CL≈ 10pF. TA= +25°C, unless

otherwise noted.)

-100

-70

-80

-90

-60

-50

-40

-30

-20

-10

0

02010 30 40 50 60

FFT PLOT CHA (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1180 toc01

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHA

f

INA

= 6.2421MHz

f

INB

= 7.52384MHz

f

CLK

= 105.0006MHz

A

INA

= -0.52dBFS

-100

-70

-80

-90

-60

-50

-40

-30

-20

-10

0

02010 30 40 50 60

FFT PLOT CHB (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1180 toc02

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHB

f

INA

= 6.2421MHz

f

INB

= 7.52384MHz

f

CLK

= 105.0006MHz

A

INB

= -0.48dBFS

-100

-70

-80

-90

-60

-50

-40

-30

-20

-10

0

02010 30 40 50 60

FFT PLOT CHA (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1180 toc03

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHA

f

INA

= 20.0849MHz

f

INB

= 25.0068MHz

f

CLK

= 105.0006MHz

A

INA

= -0.54dBFS

-100

-70

-80

-90

-60

-50

-40

-30

-20

-10

0

02010 30 40 50 60

FFT PLOT CHB (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1180 toc04

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHB

f

INA

= 20.0849MHz

f

INB

= 25.0068MHz

f

CLK

= 105.0006MHz

A

INA

= -0.54dBFS

-100

-70

-80

-90

-60

-50

-40

-30

-20

-10

0

02010 30 40 50 60

FFT PLOT CHA (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1180 toc05

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHA

f

INA

= 52.2326MHz

f

INB

= 57.0505MHz

f

CLK

= 105.0006MHz

A

INA

= -0.47dBFS

-100

-70

-80

-90

-60

-50

-40

-30

-20

-10

0

02010 30 40 50 60

FFT PLOT CHB (8192-POINT RECORD,

DIFFERENTIAL INPUT)

MAX1180 toc06

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

CHB

f

INA

= 52.2326MHz

f

INB

= 57.0504MHz

f

CLK

= 105.0006MHz

A

INB

= -0.47dBFS

-100

-70

-80

-90

-60

-50

-40

-30

-20

-10

0

02010 30 40 50 60

TWO-TONE IMD PLOT (8192-POINT

RECORD, DIFFERENTIAL INPUT)

MAX1180 toc07

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB)

f

IN1

f

INA

= 38.0552MHz

f

INB

= 41.9259MHz

f

CLK

= 105.0006MHz

A

IN1

= A

IN2

= -6.5dBFS

f

IN2

IM3

IM2

IM3

61

55

010203040 6070809050 100

SIGNAL-TO-NOISE RATIO

vs. ANALOG INPUT FREQUENCY

56

MAX1180 toc08

ANALOG INPUT FREQUENCY (MHz)

SNR (dB)

57

58

59

60

DIFFERENTIAL INPUT CONFIGURATION

CHA

CHB

62

54

020406080100

SIGNAL-TO-NOISE AND DISTORTION

vs. ANALOG INPUT FREQUENCY

56

MAX1180 toc09

ANALOG INPUT FREQUENCY (MHz)

SINAD (dB)

58

60

DIFFERENTIAL INPUT CONFIGURATION

CHA

CHB

MAX1180

Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC

with Internal Reference and Parallel Outputs

_______________________________________________________________________________________ 7

Typical Operating Characteristics (continued)

(VDD= 3.3V, OVDD= 2.5V, internal reference, differential input at -0.5dBFS, f

CLK

= 105.0006MHz, CL≈ 10pF. TA= +25°C, unless

otherwise noted.)

-65

-80
020406080100

TOTAL HARMONIC DISTORTION

vs. ANALOG INPUT FREQUENCY

-77

MAX1180 toc10

ANALOG INPUT FREQUENCY (MHz)

THD (dBc)

-74

-71

-68

DIFFERENTIAL INPUT CONFIGURATION

CHA

CHB

87

63

020406080100

SPURIOUS-FREE DYNAMIC RANGE

vs. ANALOG INPUT FREQUENCY

67

MAX1180 toc11

ANALOG INPUT FREQUENCY (MHz)

SFDR (dBc)

71

75

79

83

DIFFERENTIAL INPUT CONFIGURATION

CHB

CHA

6

-8
1 100 1000

FULL-POWER INPUT BANDWIDTH vs.

ANALOG INPUT FREQUENCY, SINGLE-ENDED

-4

-6

-2

0

2

4

MAX1180 toc12

ANALOG INPUT FREQUENCY (MHz)

GAIN (dB)

10

6

-8
1 100 1000

SMALL-SIGNAL INPUT BANDWIDTH vs.

ANALOG INPUT FREQUENCY, SINGLE-ENDED

-4

-6

-2

0

2

4

MAX1180 toc13

ANALOG INPUT FREQUENCY (MHz)

GAIN (dB)

10

VIN = 100mVp-p

-12-16-20 -4-8 0

SIGNAL-TO-NOISE RATIO vs.

ANALOG INPUT POWER (f

IN

= 20.084947MHz)

MAX1180 toc14

ANALOG INPUT POWER (dBFS)

SNR (dB)

40

45

50

35

60

65

55

-12-16-20 -4-8 0

SIGNAL-TO-NOISE AND DISTORTION vs.

ANALOG INPUT POWER (f

IN

= 20.084947MHz)

MAX1180 toc15

ANALOG INPUT POWER (dBFS)

SINAD (dB)

40

45

50

35

60

65

55

-16-20 -4-8-12 0

TOTAL HARMONIC DISTORTION vs.

ANALOG INPUT POWER (f

IN

= 20.0849474MHz)

MAX1180 toc16

ANALOG INPUT POWER (dBFS)

THD (dBc)

-75

-70

-80

-60

-55

-65

-20 -16 -12 -8 -4 0

SPURIOUS-FREE DYNAMIC RANGE vs.

ANALOG INPUT POWER (f

IN

= 20.0849474MHz)

MAX1180 toc17

ANALOG INPUT POWER (dBFS)

SFDR (dBc)

60

80

76

72

68

64

-1.0

-0.5

0

0.5

1.0

0 256 512 768128 384 640 896 1024

INTEGRAL NONLINEARITY

(BEST ENDPOINT FIT)

MAX1180 toc18

DIGITAL OUTPUT CODE

INL (LSB)