MAXIM MAX1146 Technical data

查询MAX1132EVKIT供应商

19-3488; Rev 1; 1/05

提供评估板

_________________________________

低功耗、14位、多通道、模数转换器

MAX1149
MAX1146/MAX1148

MAX1147/MAX1149

有模拟输入均可通过软件设置为单极性/双极性和单端/差
分模式。

其4线串口可直接连接
件，无需外部逻辑接口。利用串行触发输出
方便实现与数字信号处理器的连接。
采用内部时钟或外部串行时钟实现逐次逼近型模数转换。

MAX1146/MAX1148
MAX1149

1.5V到V

MAX1146–MAX1149

式。采用软关断模式可以使器件在转换之间关断。关断
后，访问串口将自动启动器件。快速的启动时间允许在
所有转换之间关断。采用快速启动，电源电流可降至低
于

120µA

MAX1146–MAX1149

，内置采样/保持

采用

采用

内部含一个

内部含一个

的外部基准。

DD

。

提供20引脚的

(T/H)

+4.75V至+5.25V

+2.7V至+3.6V

SPI™/QSPI™/MICROWIRE

+2.500V

提供一个硬关断和两个软关断模

(ADC) MAX1146–

、电压基准和时钟。

单电源供电。所

MAX1146–MAX1149

+4.096V

基准，而

基准。所有器件均可使用

TSSOP

封装。

概述

单电源供电，

™ 器

(SSTRB)

MAX1147/

可

多通道、真差分、串行、

位

14

_________________________________

路单端或4路差分输入

♦

8

路单端或2路差分输入

♦

4

内部复用器和

♦

单电源供电

♦

4.75V至5.25V

2.7V至3.6V (MAX1147/MAX1149)

内部基准

♦

+4.096V (MAX1146/MAX1148)
+2.500V (MAX1147/MAX1149)

♦

116ksps

低功耗

♦

1.1mA (116ksps)
120µA (10ksps)
12µA (1ksps)
300nA (

♦

SPI/QSPI/MICROWIRE

引脚

♦

20

T/H

电源供电

采样速率

关断模式

TSSOP

(MAX1148/MAX1149)

(MAX1146/MAX1147)

(MAX1146/MAX1148)

)

兼容

ADC

MAX1146–MAX1149

特性

_________________________________

便携式数据记录仪

数据采集

医疗仪器

电池供电仪表

过程控制

_______________________________________________________________

PART

MAX1146BCUP 0°C to +70°C 20 TSSOP ±2 4 +4.096

MAX1146BEUP -40°C to +85°C 20 TSSOP ±2 4 +4.096

MAX1147BCUP 0°C to +70°C 20 TSSOP ±2 4 +2.500

MAX1147BEUP -40°C to +85°C 20 TSSOP ±2 4 +2.500

MAX1148BCUP 0°C to +70°C 20 TSSOP ±2 8 +4.096

MAX1148BEUP -40°C to +85°C 20 TSSOP ±2 8 +4.096

MAX1149BCUP 0°C to +70°C 20 TSSOP ±2 8 +2.500

MAX1149BEUP -40°C to +85°C 20 TSSOP ±2 8 +2.500

TEMP

RANGE

应用

PIN­PACKAGE

引脚配置位于数据资料末尾。

SPI/QSPI是Motorola, Inc.
MICROWIRE是National Semiconductor Corp.

的商标。

定购信息/选购指南

INL

(LSB)

INPUT

CHANNELS

的商标。

INTERNAL

REFERENCE (V)

________________________________________________________________ Maxim Integrated Products 1

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Maxim

不对翻译中存在的差异或由此产生的错误负责。请注意译文中可能存在文字组织或

Maxim

Maxim

Maxim

提供的英文版资料。

的主页：

www.maxim-ic.com.cn

。

多通道、真差分、串行、

位

14

ABSOLUTE MAXIMUM RATINGS

VDDto AGND, DGND............................................-0.3V to +6.0V

AGND to DGND.....................................................-0.3V to +0.3V

CH0–CH7, COM to AGND..........................-0.3V to (V

REF, REFADJ to AGND ..............................-0.3V to (V

Digital Inputs to DGND...............................-0.3V to (V

Digital Outputs to DGND............................-0.3V to (V

Digital Output Sink Current .................................................25mA

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

(VDD= 5V (MAX1146/MAX1148), VDD= 3.3V (MAX1147/MAX1149), SHDN = VDD, V
duty cycle), 18 clocks/conversion (116ksps), V
MAX1148), external 2.500V reference at REF (MAX1147/MAX1149), T

= +25°C.)

T

A

MAX1146–MAX1149

DC ACCURACY (Note 1)

Resolution 14 Bits

Relative Accuracy (Note 2) INL ±0.7 ±2 LSB

Differential Nonlinearity DNL -1.0 ±0.5 +1.5 LSB

Offset Error ±10 LSB

Offset Temperature Coefficient 0.3 ppm/°C

Gain Error (Note 3) ±20 LSB

Gain Temperature Coefficient ±0.8 ppm/°C

Channel-to-Channel Offset
Matching

Channel-to-Channel Gain
Matching

DYNAMIC SPECIFICATIONS (1kHz sine-wave input, 2.5V

Signal-to-Noise Plus Distortion
Ratio

Total Harmonic Distortion THD Up to the 5th harmonic -96 -88 dB

Spurious-Free Dynamic Range SFDR 84 98 dB

Channel-to-Channel Crosstalk (Note 4) -85 dB

Small-Signal Bandwidth SSBW -3dB point 3.0 MHz

Full-Power Bandwidth FPBW SINAD > 68dB 2.0 MHz

CONVERSION RATE

Conversion Time (Note 5) t

ADC

Continuous Power Dissipation (T

+ 0.3V)

DD

+ 0.3V)

DD

+ 0.3V)

DD

+ 0.3V)

DD

REFADJ

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SINAD 77 81 dB

CONV

External clock, 2.1MHz 15 SCLK cycles 7.2

Internal clock 6 8

= VDD, C

P-P

20 TSSOP (derate 10.9mW/°C above +70°C) .............879mW

Operating Temperature Ranges

MAX114_ BC_ _ ..................................................0°C to +70°C

MAX114_ BE_ _ ...............................................-40°C to +85°C

Storage Temperature Range .............................-60°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

= 0, f

= 2.2µF, external +4.096V reference at REF (MAX1146/

REF

= T

A

MIN

, full-scale analog input, 116ksps, 2.1MHz external clock)

COM

to T

, unless otherwise noted. Typical values are at

MAX

= +70°C)

A

= 2.1MHz, external clock (50%

SCLK

±1 LSB

±1 LSB

µs

2 _______________________________________________________________________________________

多通道、真差分、串行、

位

14

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 5V (MAX1146/MAX1148), VDD= 3.3V (MAX1147/MAX1149), SHDN = VDD, V
duty cycle), 18 clocks/conversion (116ksps), V
MAX1148), external 2.500V reference at REF (MAX1147/MAX1149), T

= +25°C.)

T

A

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Throughput Rate f

T/H Acquisition Time t

Aperture Delay t

Aperture Jitter t

Serial Clock Frequency f

Internal Clock Frequency 2.1 MHz

ANALOG INPUTS (CH0—CH7, COM)

Input Voltage Range, Single­Ended and Differential (Note 6)

Multiplexer Leakage Current On/off-leakage current, VCH_ = 0 to V

Input Capacitance 18 pF

INTERNAL REFERENCE (C

REF Output Voltage V

REF Short-Circuit Current I

V

Tempco (Note 7)

REF

Load Regulation 0 to 0.2mA output load (Note 8) 2.0 mV

Capacitive Bypass at REF 2

Capacitive Bypass at REFADJ 0.01 µF

REFADJ Output Voltage 1.250 V

REFADJ Input Range ±18 mV

REFADJ Logic High

Reference Buffer Voltage Gain

REF

SAMPLE

ACQ

AD

AJ

SCLK

= 2.2 F, C

REF

REFSC

REFADJ

Internal clock mode,
f

SCLK

External clock mode,
f

SCLK

External clock mode 0.1 2.1

Internal clock mode 0 2.1

Unipolar, COM = 0 V

Bipolar, COM = V

REFADJ

MAX1147/MAX1149, TA = +25°C 2.480 2.500 2.520

MAX1146/MAX1148, TA = +25°C 4.076 4.096 4.116

REF = DGND 20 mA

MAX114_ BC _ _ ±30 ±50

MAX114_ BE _ _ ±40 ±60

Pull REFADJ high to disable the internal
bandgap reference and reference buffer

MAX1147/MAX1149 2.000

MAX1146/MAX1148 3.277

= VDD, C

= 2.1MHz

= 2.1MHz

= 0.01 F)

= 2.2µF, external +4.096V reference at REF (MAX1146/

REF

= T

A

REF

to T

MIN

18 clocks/conversion 60.3

24 clocks/conversion 51.5

18 clocks/conversion 116.66

24 clocks/conversion 87.50

/ 2, single-ended ±V

= 0, f

COM

, unless otherwise noted. Typical values are at

MAX

DD

= 2.1MHz, external clock (50%

SCLK

1.4 µs

20 ns

<50 ps

0

±0.01 ±1 µA

-

V

DD

0.25V

REF

REF

ADC

ksps

MHz

/ 2

ppm/°C

MAX1146–MAX1149

V

V

µF

V

V/V

_______________________________________________________________________________________ 3

多通道、真差分、串行、

位

14

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 5V (MAX1146/MAX1148), VDD= 3.3V (MAX1147/MAX1149), SHDN = VDD, V
duty cycle), 18 clocks/conversion (116ksps), V
MAX1148), external 2.500V reference at REF (MAX1147/MAX1149), T

= +25°C.)

T

A

EXTERNAL REFERENCE AT REF

REF Input Voltage Range V

REF Input Current I

REF Input Resistance 68 k

DIGITAL INPUTS (DIN, SCLK, CS, SHDN)

Input High Voltage V

MAX1146–MAX1149

Input Low Voltage V

Input Hysteresis V

Input Leakage I

Input Capacitance C

DIGITAL OUTPUT (DOUT, SSTRB)

Output-Voltage Low V

Output-Voltage High V

Tri-State Leakage Current I

Tri-State Output Capacitance C

POWER REQUIREMENTS

Positive Supply Voltage V

Supply Current (Note 8) I

Shutdown Supply Current
(Note 8)

Power-Supply Rejection (Note 9) PSR External reference ±0.2 mV

ADC

= 0, f

REFADJ

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

REF

REF

HYST

IN

OL

OH

OUT

DD

DD

Shutdown 0.01 10

V

IH

V

IL

IN

I

SINK

I

SOURCE

CS = V

L

CS = V

MAX1147/MAX1149 2.7 3.6

MAX1146/MAX1148 4.75 5.25

Normal
operation, full­scale input

Fast power-down 230

Full power-down 0.3
SHDN = DGND 0.3 10

= VDD, C

< 3.6V 2.0

DD

> 3.6V 3.0

DD

= 2mA 0.4 V

= 2mA VDD - 0.5 V

DD

DD

= 2.2µF, external +4.096V reference at REF (MAX1146/

REF

= T

A

MIN

External
reference

Internal reference at
116ksps

COM

to T

, unless otherwise noted. Typical values are at

MAX

116ksps 1.1 1.5
10ksps 0.12
1ksps 0.012

= 2.1MHz, external clock (50%

SCLK

V

1.5

325

325 450

0.2 V

10 pF

10 pF

1.9 2.4 mA

230

DD

50mV

0.8 V

±1 µA

±10 µA

+

V

µA

V

V

mA

µA

4 _______________________________________________________________________________________

多通道、真差分、串行、

位

14

TIMING CHARACTERISTICS

(VDD= 4.75V to 5.25V (MAX1146/MAX1148), VDD= 2.7V to 3.6V (MAX1147/MAX1149), SHDN = VDD, V
external clock (50% duty cycle), 18 clocks/conversion (116ksps), V
for the MAX1146/MAX1148, external 2.500V reference at REF for the MAX1147/MAX1149, T
Typical values are at T

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DIN to SCLK Setup Time t

DIN to SCLK Hold Time t

SCLK Fall to Output Data Valid t

CS Fall to DOUT Enable t
CS Rise to DOUT Disable t

SHDN Rise CS Fall to SCLK Rise

Time

SHDN Rise CS Fall to SCLK Rise
Hold Time

SCLK Clock Frequency f

SCLK Pulse-Width High t

SCLK Pulse-Width Low t

CS Fall to SSTRB Output Enable t
CS Rise to SSTRB Output Disable t

SSTRB Rise to SCLK Rise t

SCLK Fall to SSTRB Edge t
CS Pulse Width t

Note 1: Tested at VDD= 3.0V (MAX1147/MAX1149) or 5.0V(MAX1146/MAX1148); V
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has

been calibrated.

Note 3: Offset nulled. Measured with external reference.
Note 4: “On” channel grounded; full-scale 1kHz sine wave applied to all “off” channels.
Note 5: Conversion time defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle. (See

Figures 8–11.)

Note 6: The common-mode range for the analog inputs is from AGND to V
Note 7: Digital inputs equal V
Note 8: External load should not change during conversion for specified accuracy.
Note 9: Measured as (V

MAX1146/MAX1148. V

= +25°C.) (Figures 1, 2, and 3)

A

DS

DH

DOV

DOE

DOD

t

CSS

t

CSH

SCLK

CH

CL

STE

STD

SCK

SCST

CSW

or DGND.

DD

x 3.6V) - (V

FS

DD

x 2.7V) for the MAX1147/MAX1149 and (V

FS

= 3.6V to 2.7V for MAX1147/MAX1149 and VDD= 5.25V to 4.75V for the MAX1146/MAX1148.

C

= 50pF 10 80 ns

LOAD

C

= 50pF 120 ns

LOAD

C

= 50pF 120 ns

LOAD

External clock mode 0.1 2.1

Internal clock mode 0 2.1

Internal clock mode 100 ns

Internal clock mode 100 ns

External clock mode only 120 ns

External clock mode only 120 ns

Internal clock mode only 0 ns

REFADJ

= VDD, C

.

DD

= 2.2µF, external +4.096V reference at REF

REF

COM

FS

= T

A

= 0; unipolar single-ended input mode.

x 5.25V) - (V

to T

MIN

50 ns

0ns

50 ns

50 ns

100 ns

x 4.75V) for the

FS

= 0, f

COM

, unless otherwise noted.

MAX

ADC

= 2.1MHz,

SCLK

MHz

80 ns

MAX1146–MAX1149

_______________________________________________________________________________________ 5

多通道、真差分、串行、

位

14

ADC

V

DD

V

DD

DOUT

a) HIGH-Z TO V

图

测试使能时间的负载电路

1.

MAX1146–MAX1149

(EXTERNAL CLOCK MODE)

(INTERNAL CLOCK MODE)

6kΩ

DGND

OH

CS

SCLK

DIN

DOUT

SSTRB

SSTRB

AND VOL TO V

t

CSH

t

DOE

HIGH-Z

t

STE

HIGH-Z

6kΩ

DOUT

t

CH

SGL/DIF UNI/BIP

C

LOAD

50pF

DGND

OL

t

t

DH

t

ACQ

t

SCST

SCK

C

LOAD

50pF

DGND

OH

b) HIGH-Z TO VOL AND VOH TO V

t

CSS

t

CL

189

1

f

SCLK

t

DS

START SEL2 SEL1 SEL0 PD1 PD0

DOUT

6kΩ

DGND

a) V

OH

图

测试禁止时间的负载电路

2.

t

DOV

D13 D12 D11 D10

t

SCST

6kΩ

DOUT

C

LOAD

50pF

DGND

C
50pF

DGND

TO HIGH-Z b) VOL TO HIGH-Z

t

CSW

24

t

t

DOD

HIGH-Z

STD

HIGH-Z

D2 D1 D0

LOAD

图

详细工作时序

3.

6 _______________________________________________________________________________________

多通道、真差分、串行、

SHUTDOWN SUPPLY CURRENT

vs. SUPPLY VOLTAGE (MAX1146/MAX1148)

MAX1146 toc06

SUPPLY VOLTAGE (V)

SHUTDOWN SUPPLY CURRENT (µA)

5.155.054.954.85

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0.45

0

4.75 5.25

14

___________________________________________________________________

(VDD= +5.0V (MAX1146/MAX1148), VDD= +3.3V (MAX1147/MAX1149), SHDN = VDD, V
(50% duty cycle), 18 clocks/conversion (116ksps), V
nal +2.500V reference at REF (MAX1147/MAX1149), C

INL vs. OUTPUT CODE

MAX1146 toc01

1.5

1.0

0.5

0

DNL (LSB)

-0.5

-1.0

-1.5

1.5

1.0

0.5

0

INL (LSB)

-0.5

-1.0

-1.5
0 16384

OUTPUT CODE

1228881924096

SUPPLY CURRENT vs. SUPPLY VOLTAGE

2.0

(MAX1146/MAX1148)

1.8

1.6

1.4

1.2

1.0

0.8

0.6

SUPPLY CURRENT (mA)

0.4

0.2

0

INTERNAL REFERENCE

EXTERNAL REFERENCE

4.75 5.25
SUPPLY VOLTAGE (V)

MAX1146 toc04

5.205.155.05 5.104.85 4.90 4.95 5.004.80

vs. SUPPLY VOLTAGE (MAX1147/MAX1149)

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

SHUTDOWN SUPPLY CURRENT (µA)

0.2

0

2.7 3.6

= VDD, external +4.096V reference at REF (MAX1146/MAX1148), exter-

REFADJ

REF

= 2.2µF, C

= 50pF, TA= +25°C, unless otherwise noted.)

LOAD

DNL vs. OUTPUT CODE

0 16384

OUTPUT CODE

1228881924096

SHUTDOWN SUPPLY CURRENT

3.53.43.2 3.32.9 3.0 3.12.8

SUPPLY VOLTAGE (V)

= 0, f

COM

2.0

1.8

MAX1146 toc02

1.6

1.4

1.2

1.0

0.8

0.6

SUPPLY CURRENT (mA)

0.4

0.2

MAX1146 toc05

= 2.1MHz, external clock

SCLK

SUPPLY CURRENT vs. SUPPLY VOLTAGE

(MAX1147/MAX1149)

INTERNAL REFERENCE

EXTERNAL REFERENCE

0

2.7 3.6
SUPPLY VOLTAGE (V)

位

ADC

典型工作特性

3.33.0

MAX1146–MAX1149

MAX1146 toc03

SUPPLY CURRENT

vs. CONVERSION RATE

1200

1000

800

600

400

SUPPLY CURRENT (µA)

200

FAST POWER-DOWN

0

0.01 1000
CONVERSION RATE (ksps)

SHUTDOWN SUPPLY CURRENT

vs. TEMPERATURE

MAX1146/MAX1148

MAX1147/MAX1149

603510-15

TEMPERATURE (°C)

FULL

POWER-DOWN

1001010.1

2.5

MAX1146 toc07

2.0

1.5

1.0

SUPPLY CURRENT (mA)

0.5

0

SUPPLY CURRENT vs. TEMPERATURE

MAX1146/MAX1148 INTERNAL REFERENCE

MAX1147/MAX1149 INTERNAL REFERENCE

MAX1146/MAX1148 EXTERNAL REFERENCE

MAX1147/MAX1149 EXTERNAL REFERENCE

-40 85
TEMPERATURE (°C)

603510-15

MAX1146 toc08

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

SHUTDOWN SUPPLY CURRENT (µA)

0.5

0

-40 85

_______________________________________________________________________________________ 7

MAX1146 toc09

多通道、真差分、串行、

E

位

14

ADC

_______________________________________________________________

(VDD= +5.0V (MAX1146/MAX1148), VDD= +3.3V (MAX1147/MAX1149), SHDN = VDD, V
(50% duty cycle), 18 clocks/conversion (116ksps), V
nal +2.500V reference at REF (MAX1147/MAX1149), C

REFERENCE VOLTAGE vs. SUPPLY VOLTAG

(MAX1146/MAX1148)

4.0980

4.0975

4.0970

4.0965

4.0960

4.0955

REFERENCE VOLTAGE (V)

4.0950

MAX1146–MAX1149

4.0945

4.0940

4.75 5.25

5.155.054.85 4.95

SUPPLY VOLTAGE (V)

MAX1146 toc10

REFERENCE VOLTAGE vs. SUPPLY VOLTAGE

2.5020

2.5015

2.5010

2.5005

2.5000

2.4995

REFERENCE VOLTAGE (V)

2.4990

2.4985

2.4980

2.7 3.6

= VDD, external +4.096V reference at REF (MAX1146/MAX1148), exter-

REFADJ

= 2.2µF, C

REF

= 50pF, TA= +25°C, unless otherwise noted.)

LOAD

(MAX1147/MAX1149)

3.33.0

SUPPLY VOLTAGE (V)

REFERENCE VOLTAGE vs. TEMPERATURE

(MAX1147/MAX1149)

2.503

2.502

2.501

2.500

2.499

REFERENCE VOLTAGE (V)

2.498

MAX1146 toc13

REFERENCE BUFFER POWER-UP DELAY

2500

2000

1500

DELAY (µs)

1000

500

= 0, f

COM

4.100

4.099

MAX1146 toc11

4.098

4.097

4.096

4.095

4.094

4.093

REFERENCE VOLTAGE (V)

4.092

4.091

4.090

vs. TIME IN SHUTDOWN

C

= 4.7µF

REF

= 0.01µF

C

REFADJ

典型工作特性(续

= 2.1MHz, external clock

SCLK

REFERENCE VOLTAGE vs. TEMPERATURE

-40 85

(MAX1146/MAX1148)

603510-15

TEMPERATURE (°C)

MAX1146 toc14

)

MAX1146 toc12

2.497

-40 85
TEMPERATURE (°C)

603510-15

0

0.001 10
TIME IN SHUTDOWN (s)

10.10.01

EFFECTIVE NUMBER OF BITS

20
10

0

-10

-20

-30

-40

-50

-60

AMPLITUDE (dB)

-70

-80

-90

-100

-110

-120
0

FFT PLOT

fIN = 1kHz
f

SAMPLE

V

DD

FREQUENCY (Hz)

= 116ksps

= 5V/3V

13.0

12.9

MAX1146 toc15

50004000300020001000

12.8

12.7

12.6

12.5

12.4

12.3

EFFECTIVE NUMBER OF BITS

12.2

12.1

12.0
155

vs. FREQUENCY

FREQUENCY (kHz)

8 _______________________________________________________________________________________

MAX1146 toc16

4637281910