Maxim MAX1110C-D, MAX1111MJE, MAX1111EPE, MAX1111CEE, MAX1110MJP Datasheet

General Description

The MAX1110/MAX1111 are low-power, 8-bit, 8-chan­nel analog-to-digital converters (ADCs) that feature an
internal track/hold, voltage reference, clock, and serial
interface. They operate from a single +2.7V to +5.5V
supply and consume only 85µA while sampling at rates
up to 50ksps. The MAX1110’s 8 analog inputs and the
MAX1111’s 4 analog inputs are software-configurable,
allowing unipolar/bipolar and single-ended/differential
operation.

Successive-approximation conversions are performed
using either the internal clock or an external serial-inter­face clock. The full-scale analog input range is deter­mined by the 2.048V internal reference, or by an
externally applied reference ranging from 1V to VDD.
The 4-wire serial interface is compatible with the SPI™,
QSPI™, and MICROWIRE™ serial-interface standards.
A serial-strobe output provides the end-of-conversion
signal for interrupt-driven processors.

The MAX1110/MAX1111 have a software-program­mable, 2µA automatic power-down mode to minimize
power consumption. Using power-down, the supply
current is reduced to 6µA at 1ksps, and only 52µA at
10ksps. Power-down can also be controlled using the
SHDN input pin. Accessing the serial interface automat­ically powers up the device.

The MAX1110 is available in 20-pin SSOP and DIP
packages. The MAX1111 is available in small 16-pin
QSOP and DIP packages.

________________________Applications

Portable Data Logging
Hand-Held Measurement Devices
Medical Instruments
System Diagnostics
Solar-Powered Remote Systems
4–20mA-Powered Remote

Data-Acquisition Systems

____________________________Features

♦ +2.7V to +5.5V Single Supply
♦ Low Power: 85µA at 50ksps

6µA at 1ksps

♦ 8-Channel Single-Ended or 4-Channel Differential

Inputs (MAX1110)

♦ 4-Channel Single-Ended or 2-Channel Differential

Inputs (MAX1111)

♦ Internal Track/Hold; 50kHz Sampling Rate
♦ Internal 2.048V Reference
♦ SPI/QSPI/MICROWIRE-Compatible Serial Interface
♦ Software-Configurable Unipolar or Bipolar Inputs
♦ Total Unadjusted Error: ±1LSB max

±0.3LSB typ

MAX1110/MAX1111

+2.7V, Low-Power, Multichannel,

Serial 8-Bit ADCs

________________________________________________________________

Maxim Integrated Products

1

INPUT
SHIFT

REGISTER

CONTROL

LOGIC

INT

CLOCK

OUTPUT

SHIFT

REGISTER

+2.048V

REFERENCE

T/H

ANALOG

INPUT

MUX

8-BIT

SAR ADC

IN

DOUT
SSTRB

V

DD

DGND
AGND

SCLK

DIN

CH0
CH1

CH3

CH2

CH7*

CH6*

CH5*

CH4*

COM

REFOUT

*MAX1110 ONLY

REFIN

OUT

REF

CLOCK

MAX1110
MAX1111

CS

SHDN

________________Functional Diagram

19-1194; Rev 2; 10/98

PART

MAX1110CPP

MAX1110CAP 0°C to +70°C

0°C to +70°C

TEMP. RANGE PIN-PACKAGE

20 Plastic DIP
20 SSOP

EVALUATION KIT

AVAILABLE

Ordering Information

Ordering Information continued at end of data sheet.

*

Dice are specified at TA= +25°C, DC parameters only.

Pin Configurations appear at end of data sheet.

For free samples & the latest literature: http://www.maxim-ic.com, or phone [phone]
For small orders, phone [phone].

SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.

MAX1110C/D 0°C to +70°C Dice*

MAX1110/MAX1111

+2.7V, Low-Power, Multichannel,
Serial 8-Bit ADCs

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VDDto AGND..............................................................-0.3V to 6V

AGND to DGND.......................................................-0.3V to 0.3V

CH0–CH7, COM, REFIN,

REFOUT to AGND......................................-0.3V to (V

DD

+ 0.3V)

Digital Inputs to DGND...............................................-0.3V to 6V

Digital Outputs to DGND............................-0.3V to (V

DD

+ 0.3V)
Continuous Power Dissipation (T

A

= +70°C)

16 Plastic DIP (derate 10.53mW/°C above +70°C) ......842mW

16 QSOP (derate 8.30mW/°C above +70°C)................667mW

16 CERDIP (derate 10.00mW/°C above +70°C) ..........800mW

20 Plastic DIP (derate 11.11mW/°C above +70°C) ......889mW

20 SSOP (derate 8.00mW/°C above +70°C) ................640mW

20 CERDIP (derate 11.11mW/°C above +70°C) ..........889mW

Operating Temperature Ranges

MAX1110C_P/MAX1111C_E................................0°C to +70°C

MAX1110E_P/MAX1111E_E .............................-40°C to +85°C

MAX1110MJP/MAX1111MJE..........................-55°C to +125°C

Storage Temperature Range.............................-65°C to +150°C

Lead Temperature (soldering, 10sec).............................+300°C

ELECTRICAL CHARACTERISTICS

(VDD= +2.7V to +5.5V; unipolar input mode; COM = 0V; f

SCLK

= 500kHz, external clock (50% duty cycle); 10 clocks/conversion

cycle (50ksps); 1µF capacitor at REFOUT; T

A

= T

MIN

to T

MAX

; unless otherwise noted.)

-3dB rolloff MHz1.5Small-Signal Bandwidth
kHz800

V

CH_

= 2.048Vp-p, 25kHz (Note 4)

External reference, 2.048V

VDD= 2.7V to 3.6V

VDD= 2.7V to 3.6V

No missing codes over temperature

±0.35 ±1

CONDITIONS

Full-Power Bandwidth

±1Internal or external reference LSBGain Error (Note 3)

dB-75Channel-to-Channel Crosstalk

dB68SFDRSpurious-Free Dynamic Range

dB-70THD

Total Harmonic Distortion
(up to the 5th harmonic)

±0.15 ±0.5

LSB±0.1

Channel-to-Channel
Offset Matching

ppm/°C±0.8Gain Temperature Coefficient

LSB±1DNLDifferential Nonlinearity

UNITSMIN TYP MAXSYMBOLPARAMETER

LSB±0.3 ±1TUETotal Unadjusted Error

Bits8Resolution

dB49SINAD

Signal-to-Noise
and Distortion Ratio

VDD= 5.5V (Note 2)

LSB

±0.2

INLRelative Accuracy (Note 1)

VDD= 5.5V (Note 2)

LSB

±0.5

Offset Error

DC ACCURACY

DYNAMIC SPECIFICATIONS (10.034kHz sine-wave input, 2.048Vp-p, 50ksps, 500kHz external clock)

V

MAX1110/MAX1111

+2.7V, Low-Power, Multichannel,

Serial 8-Bit ADCs

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= +2.7V to +5.5V; unipolar input mode; COM = 0V; f

SCLK

= 500kHz, external clock (50% duty cycle); 10 clocks/conversion

cycle (50ksps); 1µF capacitor at REFOUT; T

A

= T

MIN

to T

MAX

; unless otherwise noted.)

On/off-leakage current, V

CH_

= 0V or V

DD

Used for data transfer only

(Note 6)

External clock, 2MHz

CONDITIONS

ppm/°C±50

mA3.5REFOUT Short-Circuit Current

pF18Input Capacitance

µA±0.01 ±1Multiplexer Leakage Current

1

2

50 500

kHz400Internal Clock Frequency

0mA to 0.5mA output load mV2.5Load Regulation (Note 8)

ns10Aperture Delay

µs1t

ACQ

Track/Hold Acquisition Time

UNITSMIN TYP MAXSYMBOLPARAMETER

ps

V

1

V

DD

+

50mV

Input Voltage Range

(Note 9) µA120Input Current

<50Aperture Jitter

External clock, 500kHz, 10 clocks/conversion 20

Internal clock

µs

25 55

t

CONV

Conversion Time (Note 5)

Bipolar input, COM = V

REFIN

/ 2

Unipolar input, COM = 0V

COM ±

V

REFIN

/ 2

V

0V

REFIN

Input Voltage Range, Single­Ended and Differential (Note 7)

V1.968 2.048 2.128REFOUT Voltage

External Clock-Frequency Range

MHz

kHz

Capacitive Bypass at REFOUT µF

REFOUT Temperature Coefficient

V2.7 5.5V

DD

Supply Voltage

85 250

I

DD

Supply Current (Note 2)

VDD= 2.7V to 3.6V
Full-scale input
C

LOAD

= 10pF

VDD= 2.7V to 3.6V; external reference,

2.048V; full-scale input

mV±0.4 ±4PSR

Power-Supply Rejection
(Note 10)

Operating mode

2

µA

Power-down

3.2 10

Software
SHDN at DGND

Operating mode 120 250

VDD= 5.5V
Full-scale input
C

LOAD

= 10pF

Reference disabled

Reference disabled

45

80

CONVERSION RATE

ANALOG INPUT

INTERNAL REFERENCE

EXTERNAL REFERENCE AT REFIN

POWER REQUIREMENTS

MAX1110/MAX1111

+2.7V, Low-Power, Multichannel,
Serial 8-Bit ADCs

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= +2.7V to +5.5V; unipolar input mode; COM = 0V; f

SCLK

= 500kHz, external clock (50% duty cycle); 10 clocks/conversion

cycle (50ksps); 1µF capacitor at REFOUT; T

A

= T

MIN

to T

MAX

; unless otherwise noted.)

CS = VDD(Note 6)

CS = V

DD

I

SOURCE

= 0.5mA

I

SINK

= 5mA

SHDN = open

SHDN = 0V or V

DD

(Note 6)

Digital inputs = 0V or V

DD

SHDN = open

CONDITIONS

pF15C

OUT

Three-State Output Capacitance

µA±0.01 ±10I

L

Three-State Leakage Current

VVDD- 0.5V

OH

Output High Voltage

V

0.4

V

OL

Output Low Voltage

nA±100

SHDN Maximum Allowed Leakage
for Mid-Input

VV

DD

/ 2V

FLT

SHDN Voltage, Floating

µA±4

SHDN Input Current

VV

DD

- 0.4V

SH

SHDN Input High Voltage

V0.8V

IL

DIN, SCLK, CS Input Low Voltage

V1.1 VDD- 1.1

I

SINK

= 16mA

V

SM

0.8

pF15C

IN

DIN, SCLK, CS Input Capacitance

µA±1I

IN

DIN, SCLK, CS Input Leakage

SHDN Input Mid-Voltage

V0.2V

HYST

DIN, SCLK, CS Input Hysteresis

UNITSMIN TYP MAXSYMBOLPARAMETER

V0.4V

SL

SHDN Input Low Voltage

VDD≤ 3.6V
VDD> 3.6V

V

2

V

IH

DIN, SCLK, CS Input High Voltage

3

DIGITAL INPUTS: DIN, SCLK, CS

DIGITAL OUTPUTS: DOUT, SSTRB

SHDN INPUT

MAX1110/MAX1111

+2.7V, Low-Power, Multichannel,

Serial 8-Bit ADCs

_______________________________________________________________________________________ 5

ns100t

CSS

Figure 1, external clock mode only,
C

LOAD

= 100pF

ns

CS to SCLK Rise Setup

240

Figure 1, C

LOAD

= 100pF ns

20 200

ns0t

CSH

CONDITIONS

CS to SCLK Rise Hold

240t

DV

CS Fall to Output Enable

Figure 2, C

LOAD

= 100pF ns240t

TR

CS Rise to Output Disable

t

SDV

CS Fall to SSTRB Output Enable
(Note 6)

Figure 2, external clock mode only,
C

LOAD

= 100pF

ns240t

STR

CS Rise to SSTRB Output
Disable (Note 6)

Figure 11, internal clock mode only ns0t

SCK

SSTRB Rise to SCLK Rise
(Note 6)

ns200t

CH

SCLK Pulse Width High

ns200t

CL

SCLK Pulse Width Low

C

LOAD

= 100pF ns240t

SSTRB

SCLK Fall to SSTRB

ns0t

DH

DIN to SCLK Hold

µs1t

ACQ

Track/Hold Acquisition Time

ns100t

DS

DIN to SCLK Setup

UNITSMIN TYP MAXSYMBOLPARAMETER

TIMING CHARACTERISTICS (Figures 8 and 9)

(VDD= +2.7V to +5.5V, TA= T

MIN

to T

MAX

, unless otherwise noted.)

Note 1: Relative accuracy is the analog value’s deviation (at any code) from its theoretical value after the full-scale range is calibrated.
Note 2: See

Typical Operating Characteristics.

Note 3: V

REFIN

= 2.048V, offset nulled.

Note 4: On-channel grounded; sine wave applied to all off-channels.
Note 5: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 6: Guaranteed by design. Not subject to production testing.
Note 7: Common-mode range for the analog inputs is from AGND to V

DD

.

Note 8: External load should not change during the conversion for specified accuracy.
Note 9: External reference at 2.048V, full-scale input, 500kHz external clock.
Note 10: Measured as

| V

FS

(2.7V) - VFS(3.6V) |.

Note 11: 1µF at REFOUT; internal reference settling to 0.5LSB.

ns

20 240

t

DO

SCLK Fall to Output Data Valid

Figure 1,
C

LOAD

= 100pF

MAX111_C/E
MAX111_M

External reference 20
Internal reference (Note 11)

µs

12

t

WAKE

Wake-Up Time

ms

MAX1110/MAX1111

+2.7V, Low-Power, Multichannel,
Serial 8-Bit ADCs

6 _______________________________________________________________________________________

__________________________________________Typical Operating Characteristics

(VDD= +2.7V; f

SCLK

= 500kHz; external clock (50% duty cycle); RL= ∞; TA = +25°C, unless otherwise noted.)

400

100

2.5 6.0

SUPPLY CURRENT vs. SUPPLY VOLTAGE

150

350

MAX1110-01

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (µA)

3.0

3.5 4.0 4.5 5.0 5.5

300

250

200

OUTPUT CODE = 10101010

C

LOAD

= 60pF

C

LOAD

= 30pF

160

60

-60 140

SUPPLY CURRENT vs. TEMPERATURE

80

140

MAX1110-02

TEMPERATURE (°C)

SUPPLY CURRENT (µA)

-20 20 60 100

120

100

OUTPUT CODE = FULL SCALE
C

LOAD

= 10pF

VDD = 5.5V

VDD = 3.6V

5.0

2.0

-60 140

SHUTDOWN SUPPLY CURRENT

vs. TEMPERATURE

2.5

4.5

MAX1110-03

TEMPERATURE (°C)

SHUTDOWN SUPPLY CURRENT (µA)

-20 20 60 100

4.0

3.5

3.0

SHDN = DGND

0.8

0

2.5 6.0

OFFSET ERROR vs. SUPPLY VOLTAGE

0.1

0.7

0.6

MAX1110-04

SUPPLY VOLTAGE (V)

OFFSET ERROR (LSB)

3.0 3.5 4.0 4.5 5.0 5.5

0.5

0.4

0.3

0.2

0.5

0

2.5 6.0

INTEGRAL NONLINEARITY vs.

SUPPLY VOLTAGE

0.1

0.4

MAX1110-05

SUPPLY VOLTAGE (V)

INL (LSB)

3.0 3.5 4.0 4.5 5.0 5.5

0.3

0.2

0.3

-0.3
0 256

DIFFERENTIAL NONLINEARITY

vs. CODE

-0.2

0.2

0.1

MAX1110-06

DIGITAL CODE

DNL (LSB)

64 128 192

0

-0.1

0.6

0

-60 140

OFFSET ERROR vs. TEMPERATURE

0.1

0.2

0.5

MAX1110-07

TEMPERATURE (°C)

OFFSET ERROR (LSB)

-20 20 60

100

0.4

0.3

0.20

-0.20
0 256

INTEGRAL NONLINEARITY

vs. CODE

-0.10

-0.15

0.15

0.10

0.05

MAX1110-08

DIGITAL CODE

INL (LSB)

64 128 192

0

-0.05

20

-100
025

FFT PLOT

-80

-20

0

MAX1110-09

FREQUENCY (kHz)

AMPLITUDE (dB)

5 101520

-60

-40

f

CH_

= 10.034kHz, 2Vp-p

f

SAMPLE

= 50ksps