MAXIM MAX1069 Technical data

MAX1069

58.6ksps, 14-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP

________________________________________________________________ Maxim Integrated Products 1

19-2652; Rev 0; 10/02

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

General Description

The MAX1069 is a low-power, 14-bit successive­approximation analog-to-digital converter (ADC). The
device features automatic power-down, an on-chip
4MHz clock, a +4.096V internal reference, and an
I2C™-compatible 2-wire serial interface capable of both
fast and high-speed modes.

The MAX1069 operates from a single supply and con­sumes 5mW at the maximum conversion rate of

58.6ksps. AutoShutdown™ powers down the device
between conversions, reducing supply current to less
than 50µA at a 1ksps throughput rate. The option of a
separate digital supply voltage allows direct interfacing
with +2.7V to +5.5V digital logic.

The MAX1069 performs a unipolar conversion on its
single analog input using its internal 4MHz clock. The
full-scale analog input range is determined by the inter­nal reference or by an externally applied reference volt­age ranging from 1V to AV

DD

.

The four address select inputs (ADD0–ADD3) allow up
to sixteen MAX1069 devices on the same bus.

The MAX1069 is packaged in a 14-pin TSSOP and
offers both commercial and extended temperature
ranges. Refer to the MAX1169 for a 16-bit device in a
pin-compatible package.

Applications

Hand-Held Portable Applications

Medical Instruments

Battery-Powered Test Equipment

Solar-Powered Remote Systems

Receive Signal Strength Indicators

System Supervision

Features

♦ High-Speed I2C-Compatible Serial Interface

400kHz Fast Mode

1.7MHz High-Speed Mode

♦ +4.75V to +5.25V Single Supply

♦ +2.7V to +5.5V Adjustable Logic Level

♦ Internal +4.096V Reference

♦ External Reference: 1V to AV

DD

♦ Internal 4MHz Conversion Clock

♦ 58.6ksps Sampling Rate

♦ AutoShutdown Between Conversions

♦ Low Power

5.0mW at 58.6ksps

4.2mW at 50ksps

2.0mW at 10ksps

0.23mW at 1ksps
3µW in Shutdown

♦ Small 14-Pin TSSOP Package

Ordering Information

(

)

Pin Configuration

I2C is a trademark of Philips Corp.
AutoShutdown is a trademark of Maxim Integrated Products, Inc.

*Future product—contact factory for availability.

查询MAX1069供应商

PART TEMP RANGE

MAX1069ACUD 0°C to +70°C 14 TSSOP ±1

MAX1069BCUD 0°C to +70°C 14 TSSOP ±2

MAX1069CCUD 0°C to +70°C 14 TSSOP ±3

MAX1069AEUD* -40°C to +85°C 14 TSSOP ±1

MAX1069BEUD* -40°C to +85°C 14 TSSOP ±2

MAX1069CEUD* -40°C to +85°C 14 TSSOP ±3

PIN­PACKAGE

INL

LSB

TOP VIEW

DGND

SCL

SDA

ADD1

ADD0

DV

1

2

3

4

5

6

7

DD

ADD3

14

REF

13

REFADJ

12

AGNDSADD2

MAX1069

TSSOP

11

10

AIN

9

AGND

8

AV

DD

MAX1069

58.6ksps, 14-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

AV

DD

to AGND .........................................................-0.3V to +6V

DV

DD

to DGND.........................................................-0.3V to +6V

AGND to DGND.....................................................-0.3V to +0.3V

AGNDS to AGND...................................................-0.3V to +0.3V

AIN, REF, REFADJ to AGND....................-0.3V to (AV

DD

+ 0.3V)

SCL, SDA, ADD_ to DGND.......................................-0.3V to +6V

Maximum Current into Any Pin............................................50mA

Continuous Power Dissipation (T

A

= +70°C)

14-Pin TSSOP (derate 9.1mW/°C above +70°C) .........727mW

Operating Temperature Ranges:

MAX1069_CUD ..................................................0°C to +70°C

MAX1069_EUD ................................................-40°C to +85°C

Storage Temperature Range .............................-65°C to +150°C

Junction Temperature......................................................+150°C

Lead Temperature (soldering, 10s) .................................+300°C

ELECTRICAL CHARACTERISTICS

(AVDD= +4.75V to +5.25V, DVDD= +2.7V to +5.5V, f

SCL

= 1.7MHz (33% duty cycle), f

SAMPLE

= 58.6ksps, V

REF

= +4.096V, external ref-

erence applied to REF, REFADJ = AV

DD

, C

REF

= 10µF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.)

DC ACCURACY (Note 1)

Resolution 14 Bits

Relative Accuracy
(Note 2)

Offset Error 25mV

Offset-Error Temperature
Coefficient

Gain Error (Note 3) ±0.25 ±0.5 %FSR
Gain Temperature Coefficient 0.1 ppm/°C

DYNAMIC PERFORMANCE (f

Signal-to-Noise Plus Distortion SINAD 81 84 dB

Total Harmonic Distortion THD Up to the 5th harmonic -99 -86 dB

Spurious-Free Dynamic Range SFDR 87 102 dB

Signal-to-Noise Ratio SNR 82 84 dB

Full-Power Bandwidth FPBW -3dB point 4 MHz

Full-Linear Bandwidth SINAD > 81dB 20 kHz

CONVERSION RATE (Figure 11)

Conversion Time
(SCL Stretched Low)

Throughput Rate (Note 4) f

Internal Clock Frequency f

Track/Hold Acquisition Time t

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

INL

IN(sine wave)

t

CONV

SAMPLE

CLK

ACQ

= 1kHz, VIN = V

MAX1069A ±1

MAX1069B ±2

MAX1069C ±3

MAX1069A, no missing codes ±1

MAX1069B, no missing codes ±1Differential Nonlinearity DNL

MAX1069C, no missing codes ±1

Fast mode 7.1 7.5

High-speed mode 5.8 6

Fast mode 19

High-speed mode 58.6

(Note 5) 1100 ns

REF(P-P)

, f

SAMPLE

= 58.6ksps)

1.0 ppm/°C

4 MHz

LSB

LSB

µs

ksps

MAX1069

58.6ksps, 14-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(AVDD= +4.75V to +5.25V, DVDD= +2.7V to +5.5V, f

SCL

= 1.7MHz (33% duty cycle), f

SAMPLE

= 58.6ksps, V

REF

= +4.096V, external ref-

erence applied to REF, REFADJ = AV

DD

, C

REF

= 10µF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.)

Aperture Delay
(Figure 11c) (Note 6)

Aperture Jitter
(Figure 11c)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

t

AD

t

AJ

ANALOG INPUT (AIN)

Input Voltage Range V

AIN

Input Leakage Current

Input Capacitance C

IN

INTERNAL REFERENCE (Bypass REFADJ with 0.1µF to AGND and REF with 10µF to AGND)

REF Output Voltage V

Reference Temperature
Coefficient

Reference Short-Circuit Current I

REF

TC

REF

REFSC

REFADJ Output Voltage 4.056 4.096 4.000 V

REFADJ Input Range For small adjustments, from 4.096V ±60 mV

EXTERNAL REFERENCE (REFADJ = AVDD)

REFADJ Buffer Disable Voltage

REFADJ Buffer Enable Voltage AV

Reference Input Voltage Range

REF Input Current I

REF

DIGITAL INPUTS/OUTPUTS (SCL, SDA)

Input High Voltage V

Input Low Voltage V

Input Hysteresis V

Input Current I

Input Capacitance C

Output Low Voltage V

IH

IL

HYST

IN

IN

OL

ADDRESS SELECT INPUTS (ADD3, ADD2, ADD1, ADD0)
Input High Voltage 0.7 × DV
Input Low Voltage 0.3 × DV
Input Hysteresis 0.1 × DV

Input Current ±10 µA

Input Capacitance 15 pF

Fast mode 50

High-speed mode 30

Fast mode 100

High-speed mode 100

0V

On/off-leakage current, V
no clock, f

SCL

= 0

= 0V or AVDD,

AIN

±0.01 ±10 µA

35 pF

4.056 4.096 4.136 V

TA = 0°C to +70°C ±20

TA = -40°C to +85°C ±35

10 4.136 mA

Pull REFADJ high to disable the internal
bandgap reference and reference buffer

AVDD - 0.1 V

DD

(Note 7) 1.0 AV

V

= +4.096V, VIN = V

REF

f

IN(sine wave)

V

REF

= 1kHz, f

= +4.096V, shutdown 0.1

REF(P-P)

SAMPLE

= 62.1ksps

0.7 × DV

27

DD

0.3 × DV

0.1 × DV

DD

±10 µA

15 pF

I

= 3mA 0.4 V

SINK

DD

DD

REF

ppm/°C

- 0.4 V

DD

DD

DD

ns

ps

V

V

µA

V

V

V

V

V

V

MAX1069

58.6ksps, 14-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(AVDD= +4.75V to +5.25V, DVDD= +2.7V to +5.5V, f

SCL

= 1.7MHz (33% duty cycle), f

SAMPLE

= 58.6ksps, V

REF

= +4.096V, external ref-

erence applied to REF, REFADJ = AV

DD

, C

REF

= 10µF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.)

PARAMETER SYM B O L CONDITIONS MIN TYP MAX UNITS

POWER REQUIREMENTS (AVDD, AGND, DVDD, DGND)

Analog Supply Voltage AV

Digital Supply Voltage DV

DD

DD

Analog Supply Current I

Digital Supply Current I

Power-Supply Rejection Ratio

TIMING CHARACTERISTICS FOR 2-WIRE FAST MODE (Figure 1a and Figure 2)

Serial Clock Frequency f

Bus Free Time Between a STOP
and a START Condition

Hold Time for Start Condition t

Low Period of the SCL Clock t

High Period of the SCL Clock t

Setup Time for a Repeated
START Condition (Sr)

Data Hold Time t

Data Setup Time t

Rise Time of Both SDA and SCL
Signals, Receiving

Fall Time of SDA Transmitting t

Setup Time for STOP Condition t

C ap aci ti ve Load for E ach Bus Li ne C

Pulse Width of Spike Suppressed t

AVDD

DVDD

PSRR AV

SCL

t

BUF

HD,STA

LOW

HIGH

t

SU,STA

HD,DAT

SU,DAT

t

R

F

SU,STO

B

SP

Inter nal r efer ence
( p ow er ed d ow n
b etw een conver si ons,
R/W = 0)

Internal reference
(always on, R/W = 1)

f

SAMPLE

f

SAMPLE

f

SAMPLE

Shutdown 0.4 5.0

f

SAMPLE

f

SAMPLE

f

SAMPLE

= 58.6ksps 1.8 2.5

= 10ksps 0.7

= 1ksps 40

= 58.6ksps 1.8 2.5

= 10ksps 1.4

= 1ksps 1.1 mA

Shutdown 0.4 5 µA

f

= 58.6ksps 0.90 1.8

SAMPLE

f

= 10ksps 0.36

External reference
(REFADJ = AV

DD

SAMPLE

)

f

= 1ksps 40

SAMPLE

Shutdown 0.4 5

f

f

f

= 58.6ksps 260 400

SAMPLE

= 10ksps 65

SAMPLE

= 1ksps 6

SAMPLE

Shutdown 0.2 5

= 5V ±5%, full-scale input (Note 8) 2 6 LSB/V

DD

(Note 9) 0 900 ns

(Note 10)

(Note 10)

4.75 5.25 V

2.7 5.5 V

400 kHz

1.3 µs

0.6 µs

1.3 µs

0.6 µs

0.6 µs

100 ns

20 +

0.1C

20 +

0.1C

B

B

300 ns

300 ns

0.6 µs

400 pF

mA

µA

mA

mA

µA

µA

50 ns

MAX1069

58.6ksps, 14-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP

_______________________________________________________________________________________ 5

Note 1: DC accuracy is tested at AVDD= +5.0V and DVDD= +3.0V. Performance at power-supply tolerance limits is guaranteed

by power-supply rejection test.

Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and

offset have been calibrated.

Note 3: Offset nullified.
Note 4: One sample is achieved every 18 clocks in continuous conversion mode.

Note 5: The track/hold acquisition time is two SCL cycles as illustrated in Figure 11.

Note 6: A filter on SDA and SCL delays the sampling instant and suppresses noise spikes less than 10ns in high-speed mode and

50ns in fast mode.

Note 7: ADC performance is limited by the converter’s noise floor, typically 480µV

P-P

.

Note 8:

ELECTRICAL CHARACTERISTICS (continued)

(AVDD= +4.75V to +5.25V, DVDD= +2.7V to +5.5V, f

SCL

= 1.7MHz (33% duty cycle), f

SAMPLE

= 58.6ksps, V

REF

= +4.096V, external ref-

erence applied to REF, REFADJ = AV

DD

, C

REF

= 10µF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.)

TIMING CHARACTERISTICS FOR 2-WIRE HIGH-SPEED MODE (Figure 1b and Figure 2)

Serial Clock Frequency f

Hold Time, (Repeated) Start
Condition

Low Period of the SCL Clock t

High Period of the SCL Clock t

Setup Time for a Repeated
START Condition

Data Hold Time t

Data Setup Time t

Rise Time of SCL Signal
(Current Source Enabled)

Rise Time of SCL Signal After
Acknowledge Bit

Fall Time of SCL Signal

Rise Time of SDA Signal

Fall Time of SDA Signal

Setup Time for STOP Condition t

C ap aci ti ve Load for E ach Bus Li ne C

Pulse Width of Spike Suppressed t

PARAMETER SYM B O L CONDITIONS MIN TYP MAX UNITS

t

HD,STA

t

HD,DAT

SU,DAT

SU,STO

SCLH

LOW

HIGH

SU,STA

t

RCL

t

RCL1

t

FCL

t

RDA

t

FDA

B

SP

(Note 11) 1.7 MHz

(Note 9) 0 150 ns

(Note 10) 10 80 ns

(Note 10) 20 160 ns

(Note 10) 20 80 ns

(Note 10) 20 160 ns

(Note 10) 20 160 ns

160 ns

320 ns

120 ns

160 ns

10 ns

160 ns

400 pF

10 ns

f

SAMPLE

t2

ACQ

PSRR



1 clocks

8

=+






=×

1



f



SCL

V (5.25V) - V (4.75V)

[]

FS FS

=

f

SCL






5.25V - 4.75V

-1



t

C

ONV




N

2

×

V

REF

where N is the number of bits ( ).14

MAX1069

58.6ksps, 14-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP

6 _______________________________________________________________________________________

Note 9: A master device must provide a data hold time for SDA (referred to VILof SCL) in order to bridge the undefined region of

SCL’s falling edge (see Figure 1).

Note 10: C

B

= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 ✕DVDDand 0.7 ✕DVDD.

Note 11: f

SCL

must meet the minimum clock low time plus the rise/fall times.

ELECTRICAL CHARACTERISTICS (continued)

(AVDD= +4.75V to +5.25V, DVDD= +2.7V to +5.5V, f

SCL

= 1.7MHz (33% duty cycle), f

SAMPLE

= 58.6ksps, V

REF

= +4.096V, external ref-

erence applied to REF, REFADJ = AV

DD

, C

REF

= 10µF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C.)

Figure 1. I2C Serial Interface Timing

Figure 2. Load Circuit

2

A. F/S-MODE I

SDA

SCL

B. HS-MODE I

SDA

C SERIAL INTERFACE TIMING

t

SU,DAT

t

LOW

t

t

HD,STA

S Sr A

2

C SERIAL INTERFACE TIMING

t

SU,DAT

t

LOW

HIGH

t

R

t

HD,DAT

t

F

t

HD,DAT

t

SU,STA

t

SU,STA

t

HD,STA

t

HD,STA

t

SU,STO

t

RDA

t

SU,STO

t

R

PS

t

F

t

BUF

t

BUF

t

FDA

SCL

t

HD,STA

t

RCL

S Sr A

PARAMETERS ARE MEASURED FROM 30% TO 70%.

t

HIGH

V

DD

DIGITAL

I/O

IOL = 3mA

I

= 0mA

OH

t

FCL

400pF

t

RCL1

P

HS-MODE

V

OUT

S

F/S-MODE