Maxim MAX1007EAG, MAX1007CAG Datasheet

________________General Description

The MAX1007 is a multifunctional integrated circuit
designed for high-performance mobile radios. It
includes one 8-bit analog-to-digital converter (ADC),
and two 7-bit and two 6-bit digital-to-analog converters
(DACs) for functions including radio-frequency (RF)
power sensing and antenna-diversity selection.

The ADC provides for power sense, receive-signal
strength intensity (RSSI) measurements and system
supervision. In the power-sense mode, the ADC con­verts the power-sensing circuitry signal (representing
either the transmitted (Tx) or received (Rx) RF power)
into a digital code, ensuring optimum Tx power setting
and Rx signal analysis. An additional direct input to the
ADC provides for system-supervision measurements,
such as power-supply voltages, battery voltage, and
temperature.

Four DAC blocks typically control DC levels in radios.
As part of the Maxim PWT1900 chip set, the two 7-bit
DACs control the gain settings and the two 6-bit DACs
control the varactor diodes to tune a TCXO and bias a
GaAs amplifier. Each DAC register and output can be
updated independently, providing maximum flexibility.

For antenna diversity, a magnitude-comparison circuit
captures and compares two peak signals. A latched
logic-comparator output reveals which signal has the
largest magnitude. The MAX1007 also includes an on­board voltage reference for the ADC and DACs.

The MAX1007 offers a high level of signal integrity with
minimal power dissipation. Single-supply operation
ranges from +2.85V to +3.6V. To further save power, there
are two shutdown modes: standby and total shutdown.
Standby is a partial shutdown that keeps the bandgap
reference and the 2.4V reference generator active. Total
shutdown disables all circuit blocks except the serial
interface, reducing supply current to less than 1µA.

The MAX1007 is available in a 24-pin SSOP and is
specified for commercial and extended temperature
ranges.

________________________Applications

PWT1900
Wireless Communications:

Cellular Radios PMR/SMR
PCS Radios WLL

____________________________Features

♦ Multi-Input 8-Bit ADC
♦ Two 7-Bit DACs with Buffered Outputs
♦ Two 6-Bit DACs: Buffered/Unbuffered
♦ Power-Sense Conditioning Circuitry
♦ RSSI Measurement
♦ Antenna-Diversity Circuitry
♦ Internal Reference
♦ Serial-Logic Interface
♦ +2.85V to +3.6V Single-Supply Operation
♦ Two Shutdown Modes

MAX1007

Mobile-Radio Analog Controller

________________________________________________________________

Maxim Integrated Products

1

19-1180; Rev 0; 6/98

PART

MAX1007CAG
MAX1007EAG -40°C to +85°C

0°C to +70°C

TEMP. RANGE PIN-PACKAGE

24 SSOP
24 SSOP

Ordering Information

Pin Configuration appears at end of data sheet.

CS
SCLK
DIN

7

DOUT

SDAC

CH0

ADC

PEAK

DETECTOR

POWER

SENSE

RPS

RSSI

FPS1
FPS2

SDAC

XDAC

SDG

GDAC

KDAC

CH1

REFERENCE

PSBIAS

SERIAL

INTERFACE

PSDCTRL

PREAMBLE-SWITCHED DIVERSITY

POWER SENSE CIRCUITRY

PSDWDW

DUAL

T/H

VREF

XDAC

GDAC

KDAC

REF

PSOUT

BANT

ADC CTRL

PKWDW

6

6

7

D FLIP-FLOP

MAX1007

Functional Diagram

For free samples & the latest literature: http://www.maxim-ic.com, or phone [phone].
For small orders, phone [phone] ext. 3468.

MAX1007

Mobile-Radio Analog Controller

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(AVDD= DVDD= +2.85V to +3.6V, f

SCLK

= 1.152MHz, TA= T

MIN

to T

MAX

, unless otherwise noted.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

AVDDor DVDDto AGND or DGND...........................-0.3V to +6V

Digital Inputs to DGND.............................................-0.3V to +6V

Analog Inputs to AGND............................................-0.3V to +6V

REF to AGND............................................................-0.3V to +6V

AGND to DGND.................................................................± 0.3V

AV

DD

to DVDD....................................................................± 0.3V

Maximum Current into Any Pin............................................50mA

Continuous Power Dissipation (T

A

= +70°C)

SSOP (derate 8.0mW/°C above +70°C) ......................640mW

Operating Temperature Ranges

MAX1007CAG.....................................................0°C to +70°C

MAX1007EAG..................................................-40°C to +85°C

Storage Temperature Range.............................-65°C to +150°C

Lead Temperature (soldering, 10sec).............................+300°C

AVDD, DV

DD

RxEN = 1, TxEN = 1; AVDD= DVDD= 3V

RxEN = 1, TxEN = 0; AVDD= DVDD= 3V; PKWDW and
ADCCTRL as per state B on Figure 1

RxEN = 1, TxEN = 0; AVDD= DVDD= 3V;
PKWDW = ADCCTRL = DGND

RxEN = 1, TxEN = 0; AVDD= DVDD= 3V; PKWDW and
ADCCTRL as per state B on Figure 1. PSDWDW and PSD­CNTRL as per state D on Figure 2

RxEN = 0, TxEN = 1; AVDD= DVDD= 3V;
PKWDW = ADCCTRL = DGND

RxEN = 0, TxEN = 1; AVDD= DVDD= 3V;
PKWDW and ADCCTRL as per state B on Figure 1

RxEN = 1, TxEN = 0; AVDD= DVDD= 3V; PKWDW and
ADCCTRL as per state C on Figure 1

RxEN = 0, TxEN = 1; AVDD= DVDD= 3V;
PKWDW and ADCCTRL as per state C on Figure 1

CONDITIONS

mA1.24 3.5

Standby:

XDAC, GDAC, Ref, RefBuf Active

mA4.07 10.5

Receive Mode 4:

KDAC, XDAC, ADC, RSSI
Buffer, Ref, RefBuf, PSD
Circuit Active

mA11.2 31

Receive Mode 3:

KDAC, XDAC, ADC, Peak
Detector RSSI Buffer, Ref,
RefBuf Active

V2.85 3.0 3.6Supply Voltages

mA2.95

Receive Mode 2:

KDAC, XDAC, Peak Detector,
RSSI Buffer, Ref, RefBuf Active

mA1.24 3.5

Receive Mode 1:

KDAC, XDAC, Ref, RefBuf
Active

mA1.8 5.0

Transmit Mode 1:

All DACs, Ref, RefBuf Active

mA4.7

Transmit Mode 2:

All DACs, PGA, REF, Peak
Detector, PSBIAS, I

SOURCE

,

RefBuf Active

mA12.2 32

Transmit Mode 3:

All DACs, PGA, REF, Peak
Detector, PSBIAS, I

SOURCE

,

RefBuf, ADC Active

UNITSMIN TYP MAXPARAMETER

RxEN = 0, TxEN = 0; AVDD= DVDD= 3V;
ADCCTRL = PSDCTRL = PKWDW = PSDWDW = DGND;
SCLK not active, either high or low

µA1 10Total Shutdown

POWER-SUPPLY REQUIREMENTS

SUPPLY CURRENTS [I(AVDD) + I(DVDD)] (Note 1)

MAX1007

Mobile-Radio Analog Controller

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(AVDD= DVDD= +2.85V to +3.6V, f

SCLK

= 1.152MHz, TA= T

MIN

to T

MAX

, unless otherwise noted.)

(Note 2)

2 < code ≤ FS

2 < code ≤ FS

2 < code ≤ FS

CL= 30pF, RL= 40kΩ, settling to 5% of final value

RL= 40kΩ

2 < code ≤ FS

(Note 2)

2 < code ≤ FS

(Note 2)

CL= 30pF, RL= 40kΩ

No resistive load

2 < code ≤ FS

CONDITIONS

%FSR±10Gain Error

LSB±1Offset Error

LSB±1Integral Nonlinearity

LSB±1Differential Nonlinearity

Bits7Resolution

µs4Full-Scale Step Response Time

V2.1 2.42 2.75Full-Scale Output Swing

V/µs0.1Output Slew Rate

%FSR±10Gain Error

LSB±1Offset Error

LSB±1Integral Nonlinearity

LSB±1Differential Nonlinearity

Bits6Resolution

LSB±1Differential Nonlinearity

Bits6Resolution

kΩ30Output Resistance

LSB±1/2Integral Nonlinearity
LSB±1Offset Error

%FSR±10Gain Error

V2.1 2.42 2.75Full-Scale Output Swing

UNITSMIN TYP MAXPARAMETER

CL= 30pF, RL= 40kΩ, settling to 2% of final value

RL= 40kΩ

CL= 30pF, RL= 40kΩ

µs4Full-Scale Step Response Time

V2.1 2.42 2.75Full-Scale Output Swing

V/µs0.1Output Slew Rate

CL= 30pF, RL= 40kΩ, settling to within 2% of final value µs4Power-Up Time from Standby

With respect to V

REF

V

REF

= 1.028V (typ)

V

REF

= 1.028V (typ)

LSB±5Gain Error

LSB±2Offset Error

µs5.2Conversion Time

LSB±1Integral Nonlinearity

LSB±1Differential Nonlinearity

V0 V

REF

Input Signal Range

Bits8Resolution

µs1.74

ADC Power-Up Time from Standby

V1.028Reference Voltage

XDAC

GDAC

SDAC, KDAC

ADC

MAX1007

Mobile-Radio Analog Controller

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(AVDD= DVDD= +2.85V to +3.6V, f

SCLK

= 1.152MHz, TA= T

MIN

to T

MAX

, unless otherwise noted.)

V

IL

V

IH

SYMBOL

V0.3V

DD

Input Voltage Low

V0.7V

DD

Input Voltage High

V2.42Internal DAC Reference

µA200PS Bias Sink Current

V1.87PS Bias Voltage Output

V0.96 1.028 1.1Output Voltage

mV100 300Minimum Peak Level Detected

µs10 20Lowpass-Filter Time Constant

Ω200Pull-Down Input Resistance

µA50 100 180Current Source

-0.44

-6

VV

REF

Maximum Peak Level Detected

mV150Offset Voltage

V/V

-0.53

Power-Sense Amp Gain (PGA)

UNITSMIN TYP MAXPARAMETER

C

IN

R

IN

I

IN

pF10Inpt Capacitance

kΩ20Input Resistance

µA±1Input Current

t

8

t

7

t

6

t

5

t

4

t

3

t

2

t

1

ns100

CS High to DOUT Disable

ns200 434SCLK Pulse Width Low

ns200 434SCLK Pulse Width High

ns150SCLK High to DOUT Valid

ns100

CS Low to DOUT Valid

ns20

CS Low to SCLKHigh

ns0DIN to SCLK Hold

ns100DIN Valid to SCLK Setup

t

9

ns500

ADC Data Output Delay After
End of ADC Conversion
(Figure 4b)

V

OL

V

OH

V0.4Output Voltage Low

VVDD- 0.4Output Voltage High

CL= 20pF, RL= 100kΩ

RSin series with CL, CL= 1nF, 200Ω ≤ RS≤ 1kΩ

RPS, FPS1, FPS2 pulled to AGND when not
selected

Figure 3b

RSin series with CL, CL= 1nF, 200Ω ≤ RS≤ 1kΩ

Reflected transmit, classes 2, 3, 4

Reflected transmit, class 1

RPS, FPS1, FPS2 to ADC input
Forward transmit

CONDITIONS

CL= 20pF, RL= 100kΩ

Digital inputs

PSDCTRL, PSDWDW

Excluding PSDCTRL, PSDWDW

CL= 20pF

Digital Outputs (DOUT, BANT, SDG)

TIMING SPECIFICATIONS (Figure 4)

Digital Inputs (CS, SCLK, DIN, PKWDW, ADCCTRL, PSDWDW, PSDCTRL)

SERIAL-LOGIC INTERFACE

REFERENCE

TRANSMIT POWER SENSE

RSSI CIRCUIT