MAXIM MAX100 User Manual

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19-0282; Rev 0; 7/94

EVALUATION KIT

AVAILABLE

250Msps, 8-Bit ADC with Track/Hold

_______________General Description

The MAX100 ECL-compatible, 250Msps, 8-bit analog-to­digital converter (ADC) allows accurate digitizing of ana­log signals from DC to 125MHz (Nyquist frequency).
Designed with Maxim’s proprietary advanced bipolar
processes, the MAX100 contains a high-performance
track/hold (T/H) amplifier and a quantizer in a single
ceramic strip-line package.

The innovative design of the internal T/H assures an
exceptionally wide input bandwidth of 1.2GHz and aper­ture delay uncertainty of less than 2ps, resulting in a high

6.8 effective bits performance. Special comparator output
design and decoding circuitry reduce out-of-sequence
code errors. The probability of erroneous codes occurring
due to metastable states is reduced to less than 1 error
per 1015clock cycles. Unlike other ADCs, which can
have errors that result in false full-scale or zero-scale out­puts, the MAX100 keeps the magnitude to less than 1LSB.

The analog input is designed for either differential or single­ended use with a ±270mV range. Sense pins for the refer­ence input allow full-scale calibration of the input range or
facilitate ratiometric use. Midpoint tap for the reference
string is available for applications that need to modify the
output coding for a user-defined bilinear response. Use of
separate high-current and low-current ground pins pro­vides better noise immunity and highest device accuracy.

Dual output data paths provide several data output modes

____________________________Features

♦ 250Msps Conversion Rate
♦ 6.8 Effective Bits at 125MHz
♦ Less than ±1/2LSB INL
♦ 50Ω Differential or Single-Ended Inputs
♦ ±270mV Input Signal Range
♦ Reference Sense Inputs
♦ Ratiometric Reference Inputs
♦ Configurable Dual-Output Data Paths
♦ Latched, ECL-Compatible Outputs
♦ Low Error Rate, Less than 10

-15

Metastable States

♦ Selectable On-Chip 8:16 Demultiplexer
♦ 84-Pin Ceramic Flat Pack

________________________Applications

High-Speed Digital Instrumentation
High-Speed Signal Processing
Medical Systems
Radar/Sonar
High-Energy Physics
Communications

______________Ordering Information

for easy interfacing. These modes can be configured as
either one or two identical latched ECL outputs. An 8:16
demultiplexer mode that reduces the output data rates to
one-half the clock rate is also available.

For applications that require faster data rates, refer to

PART

MAX100CFR* 0°C to +70°C

*Contact factory for 84-Pin Ceramic Flat Pack without heatsink.

TEMP. RANGE PIN-PACKAGE

84 Ceramic Flat Pack (with heatsink)

Maxim’s MAX101, which allows conversion rates up to
500Msps.

_________________________________________________________Functional Diagram

MAX100

VA

VA

CT

CTS

FLASH CONVERTER

AIN+
AIN-

CLK
CLK

VA

RTVARTS

TRACK/

HOLD

________________________________________________________________

Call toll free 1-800-998-8800 for free literature.

VA

VA

RB

RBS

8 8

8

MODE

CONTROL

DIVMOD

A=B

Maxim Integrated Products

L
A
T
C
H
E

AData

S

(A0–A7)

B
U
F
F
E
R

L
A
T
C
H
E
S

DCLK
DCLK

BData
(B0–B7)

1

250Msps, 8-Bit ADC with Track/Hold

ABSOLUTE MAXIMUM RATINGS (Note 1)

Supply Voltages

.............................................................................0V to +7V

V

CC

...............................................................................-7V to 0V

V

EE

V

Analog Input Voltage.............................................................±2V

Digital Input Voltage.................................................-2.3V to +0V

Reference Voltage (VA

MAX100

............................................................................+12V

CC - VEE

).....................................-0.3V to +1.5V

RT

Reference Voltage (VA

Data Output Current ..........................................................-33mA

DCLK Output Current ........................................................-43mA

Operating Temperature Range...............................0°C to +70°C

Operating Junction Temperature (Note 2)............0°C to +125°C

Storage Temperature Range.............................-65°C to +150°C

Lead Temperature (soldering, 10sec).............................+250°C

Note 1: The digital control inputs are diode protected; however, permanent damage may occur on unconnected units under high-

energy electrostatic fields. Keep unused units in conductive foam or shunt the terminals together. Discharge the conduc­tive foam to the destination socket before insertion.

Note 2: Typical thermal resistance, junction-to-case R

12°C/W, providing 200 lineal ft/min airflow with heatsink. See

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

= 5°C/W and thermal resistance, junction to ambient (MAX100CA) R

θJC

Package Information.

ELECTRICAL CHARACTERISTICS

(VEE= -5.2V, VCC= +5V, RL= 50Ω to -2V, VART= 1.02V, VARB= -1.02V, T
otherwise noted.) (Note 3)

CONDITIONS

ACCURACY

AData, BData

INLIntegral Nonlinearity (Note 4)

AData, BData,

DNLDifferential Nonlinearity

no missing codes

DYNAMIC SPECIFICATIONS

f

= 250MHz,

CLK

ENOBEffective Bits

VIN= 95% full scale
(Note 5)

f

Maximum Conversion Rate
Analog Input Bandwidth
Aperture Width
Aperture Jitter

CLK

3dB

AW

AJ

= 50MHz, f

AIN

full scale (Note 6)
(Note 7)

Figure 5
Figure 5

= 250MHz, VIN= 95%

CLK

ANALOG INPUT

AIN+ to AIN-, Table 2,

Input Voltage Range
Input Offset Voltage

Least-Significant-Bit Size
Input Resistance

V

IN

TA= T
AIN+, AIN-, TA= T

IO

TA= T
AIN+ and AIN- with respect to GND

I

MIN

MIN

to T

to T

MAX

MAX

MIN

to T

Input Resistance
Temperature Coefficient

TA= +25°C
TA= T

MIN

TA= T

MIN

f

= 10MHz

AIN

f

= 50MHz

AIN

f

= 125MHz

AIN

Full scale
Zero scale

MAX

MIN

to T

to T

).....................................-1.5V to +0.3V

RB

to T

= 0°C to +70°C, TA= +25°C, unless

MAX

MAX

MAX

7.4

6.8

230 315

-305 -215

UNITSMIN TYP MAXSYMBOLPARAMETER

±0.5

±0.6
±0.75TA= +25°C
±0.85

θJA

Bits8Resolution

LSB

LSB

Bits7.1

Msps250f

GHz1.2BW

Ω/°C0.008

=

dB44.5SNRSignal-to-Noise Ratio

ps270t
ps2t

mV
mV-17 +32V

mV1.8 2.5LSB

Ω49 51R

2 _______________________________________________________________________________________

250Msps, 8-Bit ADC with Track/Hold

ELECTRICAL CHARACTERISTICS (continued)

(VEE= -5.2V, VCC= +5V, RL= 50Ω to -2V, VART= 1.02V, VARB= -1.02V, T
otherwise noted.) (Note 3)

CONDITIONS

REFERENCE INPUT

Reference String Resistance
Reference String Resistance

Temperature Coefficient

LOGIC INPUTS

Digital Input Low Voltage
(Note 8)

Digital Input High Voltage
(Note 8)

Digital Input Low Current

Digital Input High Current

LOGIC OUTPUTS (Note 9)

Digital Output Low Voltage

Digital Output High Voltage

POWER REQUIREMENTS

Positive Supply Current

Negative Supply Current

Power-Supply Rejection Ratio PSRR TA= T

VARTto VA

REF

DIV, MOD, A=B, CLK, CLK,

IL

TA= T
DIV, MOD, A=B, CLK, CLK,

IH

TA= T

MIN

MIN

RB

to T

to T

MAX

MAX

DIV, MOD, A=B = -1.8V, TA= T

I

IL

CLK, CLK, VIL= -1.8V (no termination),
TA= T

I

IH

CLK, CLK, VIH= -0.8V (no termination),
TA= T

AData, BData,

V

OL

DCLK, DCLK
AData, BData,

V

OH

DCLK, DCLK

VCC= 5.0V

I

CC

VEE= -5.2V

I

EE

V

to T

MIN

MAX

to T

MIN

MAX

= ±0.5V TA= T

INCM

to T

MIN

MAX

TA= +25°C
TA= T

TA= T

TA= +25°C
TA= T
TA= +25°C
TA= T

VEE(nom) = ±0.25V 40

MIN

MIN

MIN

MIN

MIN

MIN
MIN

MIN

to T

to T

to T

to T

to T

to T
to T

to T

= 0°C to +70°C, TA= +25°C, unless

MAX

MAX

-5 20

080

MAX

-5 20DIV, MOD, A=B = -0.8V, TA= T

080

-1.95 -1.60

MAX

-1.95 -1.50

-1.02 -0.70TA= +25°C

MAX

-1.10 -0.70

464 670

MAX

-750 -560

MAX
MAX

-780

40VCC(nom) = ±0.25V

710

MAX100

UNITSMIN TYP MAXSYMBOLPARAMETER

Ω116 175R

Ω/°C0.02

V-1.5V

V-1.07V

µA

µA

V

V

mA

mA

dBCMRRCommon-Mode Rejection Ratio 35
dB

_______________________________________________________________________________________ 3

250Msps, 8-Bit ADC with Track/Hold

TIMING CHARACTERISTICS

(VEE= -5.2V, VCC= +5V, RL= 50Ω to -2V, VART= 1.02V, VARB= -1.02V, TA= +25°C, unless otherwise noted.)

CONDITIONS

Clock Pulse Width Low
Clock Pulse Width High
CLK to DCLK

MAX100

Propagation Delay
DCLK to A/BData

Propagation Delay
Rise Time

Fall Time

Pipeline Delay
(Latency)

Note 3: All devices are 100% production tested at +25°C and are guaranteed by design for TA= T
Note 4: Deviation from best-fit straight line. See
Note 5: See the

Signal-to-Noise Ratio and Effective Bits

CLK, CLK, Figures 1 and 2

PWL

CLK, CLK, Figures 1 and 2

PWH

DIV = 0, Figure 1

t

PD1

DIV = 1, Figure 2
DIV = 0, Figure 1

t

PD2

DIV = 1, Figure 2
20% to 80%

t

R

20% to 80% ps

t

F

See Figures 3 and 4
and Table 1 (delay

t

NPD

depends on output
mode)

Integral Nonlinearity

section in the

DCLK
DATA
DCLK
DATA

Divide-by-1 mode
Divide-by-

2 mode

AData
BData

section.

Definitions of Specifications.

0.8 2.4

1.9 5.7

0.5 2.2

-1.4 -0.1
500
700
600
550

7 1/2 7 1/2
7 1/2 7 1/2

8 1/2 8 1/2

to T

MIN

MAX

as specified.

Note 6: SNR calculated from effective bits performance using the following equation: SNR (dB) = 1.76 + (6.02) (effective bits).
Note 7: Clock pulse width minimum requirements t
Note 8: Functionality guaranteed for -1.07 ≤ V
Note 9: Outputs terminated through 50Ω to -2.0V.

IH

and t

PWL

≤ -0.7 and -2.0 ≤ VIL≤ -1.5.

must be observed to achieve stated performance.

PWH

__________________________________________Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)

UNITSMIN TYP MAXSYMBOLPARAMETER

ns1.9 5.0t
ns1.9t

ns

ns

ps

Clock

Cycles

INTEGRAL NONLINEARITY 

vs. OUTPUT CODE

0.75

0.50

0.25

0

INL (LSBs)

-0.25

-0.50

-0.75
0 64 128 192 256

OUTPUT CODE

DNL (LSBs)

-0.25

-0.50

-0.75

DIFFERENTIAL NONLINEARITY 

vs. OUTPUT CODE

0.75

0.50

0.25

0

64 128 192 256

0

OUTPUT CODE

4 _______________________________________________________________________________________

250Msps, 8-Bit ADC with Track/Hold

____________________________Typical Operating Characteristics (continued)

(TA = +25°C, unless otherwise noted.)

-10

-20

-30

0

FFT PLOT (f

= 120.4462MHz)

AIN

-40

-50

-60

-70

SIGNAL AMPLITUDE (dB)

-80

-90

-100
0

12.5 25 37.5 50 62.5 75 87.5 100 112.5125
FREQUENCY (MHz)

f

= 250MHz, f

CLK

SER = -42.3dB, NOISE FLOOR = -65.4dB

vs. ANALOG INPUT FREQUENCY 

8
7
6
5
4
3

EFFECTIVE BITS

2

f

CLK

V

1
0

050

EFFECTIVE BITS 

= 250MHz,

= 95% FS

IN

100 150

= 120.4462MHz

AIN



f

(MHz)

AIN

200

250 300

MAX100-10

FFT PLOT (f

0









-10

-20

-30

-40

-50

-60

-70

SIGNAL AMPLITUDE (dB)

-80

-90

-100
0 12.5

f

= 250MHz, f

CLK

SER = -45.87dB, NOISE FLOOR = -68.5dB

vs. CLOCK FREQUENCY

8
7
6
5
4
3

EFFECTIVE BITS

2

f

= 10.4MHz,

AIN

= 95% FS

V

IN

1
0

50

0

= 10.4462MHz)

AIN

37.5 50

25
FREQUENCY (MHz)
= 10.4462MHz

AIN

EFFECTIVE BITS 

100 150 200 250

f

(MHz)

CLK









62.5

MAX100-11

300

MAX100

EFFECTIVE BITS 

vs. ANALOG INPUT FREQUENCY

8
7
6
5
4
3

EFFECTIVE BITS

2

T

= +80°C,

CASE

= 250MHz,

f

CLK

1

= 95% FS

V

IN

0

050100 150 200 250

f

(MHz)

AIN

_______________________________________________________________________________________

MAX100-12

EFFECTIVE BITS 

vs. ANALOG INPUT FREQUENCY 

8
7
6
5
4
3

EFFECTIVE BITS

2

T

= -15°C,

CASE

= 250MHz

f

CLK

1

= 95% FS

V

IN

0

050




100 150 200 250

f

(MHz)

AIN

MAX100-13

5