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EVALUATION KIT
AVAILABLE
General Description
The DS8007A multiprotocol dual smart card interface is
an automotive grade, low-cost, dual smart card reader
interface supporting all ISO 7816, EMV™, and GSM1111 requirements. Through its 8-bit parallel bus and dedicated address selects (AD3–AD0), the DS8007A can
easily and directly connect to the nonmultiplexed bytewide bus of a Maxim secure microcontroller. Optionally,
the parallel bus can be multiplexed to allow direct
access to the multiplexed bus of an 80C51-compatible
microcontroller through MOVX memory addressing.
One integrated UART is multiplexed among the interfaces to allow high-speed automatic smart card processing with each card-possessing, independent,
variable, baud-rate capability. The card interface is controlled by internal sequencers that support automatic
activation and deactivation sequencing, handling all
actions required for T = 0, T = 1, and synchronous protocols. Emergency deactivation is also supported in
case of supply dropout. A third card is supported
through the auxiliary I/O. The same set of I/O can optionally be used as additional serial interface for the UART.
The DS8007A provides all electrical signals necessary
to interface with two smart cards. The integrated voltage converter ensures full cross-compatibility between
1.8V/3V/5V cards and a 1.8V/3V/5V environment, and
allows operation within a 2.7V to 6V supply voltage
range. The standard DS8007 revision is available for
nonautomotive applications.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VDDRelative to Ground ...........-0.5V to +6.5V
Voltage Range on V
DDA
Relative to Ground .........-0.5V to +6.5V
Voltage Range on Any Pin Relative to Ground
Pins CPA1, CPA2, CPB1, CPB2, and V
UP
.........-0.5V to +7.5V
All Other Pins...........................................-0.5V to (V
DD
+ 0.5V)
Maximum Junction Temperature .....................................+150°C
Maximum Power Dissipation (T
A
= -25°C).......................900mW
Storage Temperature Range .............................-55°C to +150°C
Soldering Temperature...........................Refer to the IPC/JEDEC
Note 1: Operation guaranteed at -40°C but not tested.
Note 2: Parameters are guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the maxi-
mum rise and fall time is 10ns.
Note 3: Parameter is guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the minimum
slew rate is 0.05V/µs and the maximum slew rate is 0.5V/µs.
Reset Output. This active-high output is provided for resetting external devices. The RSTOUT pin is driven
1 RSTOUT
2 I/OAUX Auxiliary I/O. This I/O pin allows connection to an auxiliary smart card interface.
3 I/OA
4 C8A
5 PRESA Smart Card A Presence Contact. This is the active-high presence contact associated with smart card A.
6 C4A
7 GNDA Smart Card A Ground. This must be connected to GND.
8 CLKA
9 V
10 RSTA
11 I/OB
12 C8B
13 PRESB Smart Card B Presence Contact. This is the active-high presence contact associated with smart card B.
14 C4B
15 GNDB Smart Card B Ground. This must be connected to GND.
16 CLKB
17 V
18 RSTB
19 GND Ground
20 VUP Step-Up Converter Connection. Connect a low-ESR capacitor of 220nF between this pin and ground.
CCA
CCB
high until the DELAY pin reaches V
so it can externally be pulled down. The SUPL bit is set for each RSTOUT pulse.
Smart Card A I/O Data Line. This is the I/O data line a ssociated with smart card A. This is als o referred to
as the ISO C7 contact.
Smart Card A Auxiliary I/O. This is an auxiliary I/O associated with smart card A. This is also referred to
as the ISO C8 contact. This can be associated with synchronous cards.
Smart Card A Auxiliary I/O. This is an auxiliary I/O associated with smart card A. This is also referred to
as the ISO C4 contact. This can be associated with synchronous cards.
Smart Card A Clock Output. This is the clock output associated with smart card A. This is also referred to
as the ISO C3 contact.
Smart Card A Supply Voltage. This is the suppl y vo ltage output as soc iated with smart card A. Th i s is a lso
referred to as the ISO C1 contact.
Smart Card A Reset. Th is is the reset output a ssoc iated with smart card A. This i s als o referred to as the
ISO C2 contact.
Smart Card B I/O Data Line. This is the I/O data line a ssociated with smart card B. This is als o referred to
as the ISO C7 contact.
Smart Card B Auxiliary I/O. This is an auxiliary I/O associated with smart card B. This is also referred to
as the ISO C8 contact. This can be associated with synchronous cards.
Smart Card B Auxiliary I/O. This is an auxiliary I/O associated with smart card B. This is also referred to
as the ISO C4 contact. This can be associated with synchronous cards.
Smart Card B Clock Output. This is the clock output associated with smart card B. This is also referred to
as the ISO C3 contact.
Smart Card B Supply Voltage. This is the suppl y vo ltage output as soc iated with smart card B. Th i s is a lso
referred to as the ISO C1 contact.
Smart Card B Reset. Th is is the reset output a ssoc iated with smart card B. This i s als o referred to as the
ISO C2 contact.
21 CPA1 Step-Up Converter Contact 1. Connect a low-ESR capacitor of 220nF between CPA1 and CPA2.
22 CPB1 Step-Up Converter Contact 3. Connect a low-ESR capacitor of 220nF between CPB1 and CPB2.
23 V
24 CPB2 Step-Up Converter Contact 4. Connect a low-ESR capacitor of 220nF between CPB1 and CPB2.
25 AGND Analog Ground
26 CPA2 Step-Up Converter Contact 2. Connect a low-ESR capacitor of 220nF between CPA1 and CPA2.
27 VDD Digital Supply Voltage. This pin should be decoupled to GND with a good quality capacitor.
28–35 D0–D7
36RD
37WR
38CSActive-Low Chip-Select Input. This input indicates when the DS8007A is active on the parallel bus.
39 ALE
40INTActive-Low Interrupt. Thi s output indicate s an interrupt is act ive.
41 INTAUX Auxiliary Interrupt Input. This pin serves as an auxiliary interrupt.
42–45 AD3 – AD0
46, 47
DDA
XTAL2,
XTAL1
Analog Supply Voltage. Positive ana log-supply voltage for the step-up converter; can be higher but not
lower than V
8-Bit Digital I/O. This port functions as the data or address/data communication lines between the host
controller and the DS8007A for the nonmultiplexed and multiplexed operating modes, respectively.
Active-Low Paralle l Bu s Read Strobe Input. In multiple xed mode, this input indicate s when the host
processor is reading information from the DS8007A. In nonmultiplexed mode, this pin signals the current
operation is a read (RD = 1) or a write (RD = 0) when CS and WR are low.
Active-Low Parallel Bus Write Strobe Input. In multiplexed mode, this input indicates when the host
processor is writing information to the DS8007A. In nonmultiplexed mode, a low on this pin signals the
bus is engaged in a read or write operation.
Address Latch Enable Input. This signal monitors the ALE signal when the host processor bus is
operating in multiplexed mode. Connect this signal to V
Register Selection Address Inputs. These pins function as the address input lines for the nonmultiplexed
configuration and shou ld be connected to ground or V
Crystal Oscillators. Place a crystal with appropriate load capacitors between these pins if that is the
desired clock source. XTAL1 also acts as an input if there is an external clock source in place of a
crystal.
This pin should be decoupled to AGND with a good quality capacitor.
DD.
when operating in nonmultiplexed mode.
DD
in the multiple xed conf iguration.
DD
48 DELAY
External Delay Capacitor Connection. Connect a capacitor from th is pin to ground to set the power-on
reset delay.
The following describes the major functional features of
the device. Use of this document requires the reader
have a basic understanding of ISO 7816 terminology.
Parallel Bus Interface
The device interfaces to a host computer/processor
through a multiplexed or demultiplexed, parallel, 8-bit
data bus (D0–D7). The parallel bus interface monitors
the ALE signal and automatically detects whether a
multiplexed or nonmultiplexed external bus interface is
intended. The nonmultiplexed external bus interface is
the default configuration and is maintained so long as
no edge (activity) is detected on the ALE pin. Once a
rising edge is detected on the ALE pin, the DS8007A is
placed into the multiplexed mode of operation. Once in
the multiplexed mode of operation, a reset/power cycle
or the deassertion of CS forces the device to the nonmultiplexed mode. Connecting the ALE pin to V
DD
or
ground forces the device into nonmultiplexed parallel
bus mode. Figure 7 shows that the bus recognition dictates whether the external address lines (AD3–AD0)
can be used directly or whether the external data lines
(D7–D0) must be latched according to the ALE input
signal. In the multiplexed mode of operation, a new
address is latched irrespective of the state of CS.
Figure 6. Block Diagram
GNDB
I/OB
C4B
C8B
PRESB
RSTB
CLKB
V
CCB
GNDA
I/OA
C4A
C8A
PRESA
RSTA
CLKA
V
CCA
RSTOUT
DELAY
V
GND
DD
POWER-SUPPLY
SUPERVISOR
ANALOG
INTERFACE
DS8007A
ISO
UART
DIGITAL
INTERFACE
TIMEOUT
COUNTER
INT
CS
INTAUX
I/OAUX
AD0
AD1
AD2
AD3
ALE
RD
WR
D0
D1
D2
D3
D4
D5
D6
D7
CPA1
CPA2
CPB1
CPB2
V
DDA
AGND
V
UP
DC-DC
CONVERTER
CONTROL
SEQUENCERS
CLOCK
GENERATION
XTAL1
XTAL2
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