How it Works
MAXIM
Loading...
DS8007
User Manual
41 pgs333.22 Kb0

MAXIM DS8007 User Manual

DS8007
Multiprotocol Dual Smart Card Interface
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
The DS8007 multiprotocol dual smart card interface is a low-cost, dual smart card reader interface supporting all ISO 7816, EMV
®
, and GSM11-11 requirements. Through its 8-bit parallel bus and dedicated address selects (AD3–AD0), the DS8007 can easily and directly connect to the nonmultiplexed byte-wide bus of a Maxim secure microcontroller. Optionally, the parallel bus can be multiplexed to allow direct access to the multiplexed bus of an 80C51-compatible microcon­troller through MOVX memory addressing.
One integrated ISO 7816 UART is multiplexed among the interfaces to allow high-speed automatic smart card processing with each card-possessing, independent, variable, baud-rate capability. The card interface is con­trolled by internal sequencers that support automatic activation and deactivation sequencing, handling all actions required for T = 0, T = 1, and synchronous pro­tocols. Emergency deactivation is also supported in case of supply dropout. A third card is supported through the auxiliary I/O. The same set of I/O can option­ally be used as additional serial interface for the UART.
The DS8007 provides all electrical signals necessary to interface with two smart cards. The integrated voltage converter ensures full cross-compatibility between 1.8V/ 3V/5V cards and a 1.8V/3V/5V environment, and allows operation within a 2.7V to 6V supply voltage range.
Applications
Banking Applications (Point-of-Sale Terminals, Debit/Credit Payment Terminals, PIN Pads, Automated Teller Machines)
Telecommunications
Pay Television
Access Control
Features
♦ Integrated ISO 7816 UART Provides Complete
Interface/Control for Two Separate Smart Card Devices
♦ 8kV (min) ESD Protection on Card Interfaces ♦ Internal IC Card Supply Voltage Generation
5.0V ±5%, 65mA (max)
3.0V ±8%, 50mA (max)
1.8V ±10%, 30mA (max)
♦ Automatic Card Activation, Deactivation, and Data
Communication Controlled by Dedicated Internal Sequencer
♦ Host Interface Through an 8-Bit Parallel Bus (User-
Selectable Multiplexed or Nonmultiplexed Modes)
♦ Chip Select and Three-State Bus Allow Multiple
Devices (Card Readers and Memories) on Bus
♦ 8-Character Receive FIFO with Optional
Programmable Depth/Threshold
♦ I/O Interface Pin to External ISO 7816 UART for
Auxiliary Interface
♦ Separate Card Clock Generation (Up to 10MHz)
with 2x Frequency Doubling
♦ Selectable Card Clock Stop High, Stop Low, or
Internally Generated 1.25MHz (for Card Power­Down)
♦ EMV-Certified Reference Design and Evaluation
Kit Available (DS8007-KIT)
19-5972; Rev 3; 7/11
EVALUATION KIT
AVAILABLE
Ordering Information
Typical Operating Circuit appears at end of data sheet.
+
Denotes a lead(Pb)-free/RoHS-compliant package.
EMV is a registered trademark of EMVCo LLC. MAXQ is a registered trademark of Maxim Integrated Products, Inc.
Note: Some revisions of this device may incorporate devia­tions from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, go to: www.maxim-ic.com/errata
.
RD D7 D6 D5 D4 D3 D2 D1 D0 V
DD
CPA2 AGND
RSTOUT
I/OAUX
I/OA C8A
PRESA
C4A
GNDA
CLKA
V
CCA
RSTA
I/OB C8B
1
2
3
4
5
6
7
8
9
10
11
12
1314151617181920212223
24
4847464544434241403938
37
36
35
34
33
32
31
30
29
28
27
26
25
PRESB
C4B
GNDB
CLKB
V
CCB
RSTB
GND
V
UP
CPA1
CPB1
V
DDA
CPB2
DELAY
XTAL1
XTAL2
AD0
AD1
AD2
AD3
INTAUX
INT
ALECSWR
LQFP
DS8007
Pin Configuration
SMART
PART TEMP RANGE
DS8007-ENG -40°C to +85°C
DS8007-ENG+ -40°C to +85°C
SUPPORTED
2 + auxiliary
2 + auxiliary
CARDS
PIN­PACKAGE
48 LQFP
48 LQFP
DS8007
Multiprotocol Dual Smart Card Interface
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= +3.3V, V
DDA
= +3.3V, TA= +25°C, unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VDDRelative to Ground ...........-0.5V to +6.5V
Voltage Range on V
DDA
Relative to Ground .........-0.5V to +6.5V
Voltage Range on Any Pin Relative to Ground
Pins CPA1, CPA2, CPB1, CPB2, and V
UP
.........-0.5V to +7.5V
All Other Pins...........................................-0.5V to (V
DD
+ 0.5V)
Maximum Junction Temperature .....................................+150°C
Continuous Power Dissipation (T
A
= +70°C) LQFP Multilayer Board
(derate 22mW/°C above +70°C).................................1782mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
PARAMETER S YMBOL CONDITIONS MIN TYP MAX UNITS
Digital Supply Voltage VDD 2.7 6.0 V
Step-Up Converter Supply Voltage
Power-Down V
Current
DD
Sleep Mode VDD Current (Cards Active)
Active VDD Current 5V Cards
Active VDD Current 3V Cards
Power-Fail Reset Voltage
Delay Pin
RSTOUT PIN
Output High Voltage V
Output Low Voltage V
Leakage Current IL VOL = 0V, VOH = 5V -10 +10 μA
V
VDD 6.0 V
DDA
Cards Inactive f
Cards Acti ve
I
PD
I
STOP
f
= 0MHz 0.9
XTAL
f
= 0MHz, f
XTAL
= 0MH z, V
CLK
= 0MH z, V
CLK
= 5V 24 mA
CCx
= 5V 2.2
CCx
3x VDD step-up:
I
DD
I
CCA
f
XTAL
+ I
= 80mA, VDD = 2.7V,
CCB
= 20MH z, f
CLK
= 10MHz
2x VDD step-up: I
+ I
Reset Threshold
CCA
f
CLK
No step-up: I
CCA
f
CLK
Threshold voltage (fall ing) 2.1 2.5 V
Hysteresis 50 170 mV
1.25
V
V
V
I
DD
RST
HYS
DRST
= 80mA, f
CCB
= 10MHz, VDD = 2.7V
+ I
= 80mA, f
CCB
= 10MHz, VDD = 5V
= 20MHz,
XTAL
= 20MHz,
XTAL
Output Voltage VDO
V
= 0V -2 μA
Output Current I
Output Capacitance
OHRSTO
OLRSTO
DO
C
DO
DELAY
V
= VDD +2 mA
DELAY
1 nF
IOH = -1mA
IOL = 2mA -0.3 +0.4 V
mA
325 mA
225
mA
120
V
V
+
DD
0.3
0.8 x V
DD
VDD +
0.3
V
DS8007
Multiprotocol Dual Smart Card Interface
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +3.3V, V
DDA
= +3.3V, TA= +25°C, unless otherwise noted.) (Note 1)
PARAMETER S YMBOL CONDITIONS MIN TYP MAX UNITS
Alarm Pulse Width tW C
External Cloc k Frequency f
Internal Oscillator f
Voltage on VUP Pin V
Voltage Detection of V 3x Step-Up
Shutdown Temperature TSD +150 °C
Card Inactive Mode
RSTx
Pins
Card Active Mode
Card Inactive Mode
CLKx
Card
Pins
Active Mode
Cloc k Frequency f
Duty Factor  C
= 22nF 10 ms
DELAY
External cry stal 4 20
External oscillator 0 20
1.6 2.5 3.7 MHz
3x step-up 5.7
2x step-up 4.1
3.35 3.50 3.60 V
I
V
I
I
= 1mA 0 0.3 V
OLRST
= 0V 0 -1 mA
OLRST
= +200μA 0 0.3
OLRST
= -200μA
OHRST
CL = 30pF 0.1
CL = 30pF 0.1
-25
-25 +25
I
V
I
I
= 1mA 0 0.3 V
OLCLK
= 0V 0 -1 mA
OLCLK
= +200μA 0 0.3
OLCLK
= -200μA
OHCLK
CL = 30pF (Note 2) 8
CL = 30pF (Note 2) 8
-70 +70 mA
Idle configuration (1MHz) 1 1.85
Operational 0 10
= 30pF 45 55 %
L
for 2x,
DDA
Output Low Voltage
Output Current I
Output Low Voltage
Output High Voltage
V
Rise Time t
Fal l Time t
Shutdown Current
Current Limitation
I
RST(LIMIT)
Output Low Voltage
Output Current I
Output Low Voltage
Output High Voltage
Rise Time t
Fal l Time t
Current Limitation
I
CLK(LIMIT)
XTAL
INT
UP
V
DET
V
OLRST
OLRST
V
OLRSTL
OHRSTH
RRST
FRST
I
RST(SD)
V
OLCLK
OLCLK
V
OLCLK
V
OHCLK
RCLK
FCLK
CLK
MHz
V
V
V
–
CCx
0.5
V
CCx
μs
mA
V
V
–
CCx
0.5
V
CCx
ns
MHz
DS8007
Multiprotocol Dual Smart Card Interface
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +3.3V, V
DDA
= +3.3V, TA= +25°C, unless otherwise noted.) (Note 1)
PARAMETER S YMBOL CONDITIONS MIN TYP MAX UNITS
Card Inactive Mode
V
CCx
Pins
Card Active Mode
Card Inactive Mode
I/Ox
Pins
Card Active Mode
Output Low Voltage
Output Current I
Output Low Voltage
V
ICC = 1mA 0 0.3 V
CCx
V
CC
V
CCx
= 0V 0 -1 mA
CCx
I
< 65mA 4.75 5.00 5.25
CC(5V)
I
< 50mA 2.78 3.00 3.22
CC(3V)
I
< 30mA 1.65 1.80 1.95
CC(1.8V)
5V card, current pulses of 40nC with I < 200mA, t < 400ns, f < 20MHz
3V card, current pulses of 24nC with I < 200mA, t < 400ns, f < 20MHz
1.8V card, current pulse s of 12nC with I < 200mA, t < 400ns, f < 20MHz
Output Current I
Total Current (Two Cards) Shutdown Current
I
CC(A+ B)
I
Slew Rate V
Output Low Voltage
Output Current I
Internal Pul lup Resistor
R
Output Low Voltage
Output High Voltage
Output Rise/Fall Time
Input Low Voltage
Input High Voltage
Input Low Current Input High Current Input Ri se/Fall Time
Current Limitation
I
IO(LIMIT)
V
CC
V
V
-80
-100
CC(SD)
Up/down, C < 300nF (Note 3) 0.05 0.16 0.05 V/μs
CCSR
V
I
OLIO
V
OLIO
To V
PULLUP
I
V
OLIO
V
V
V
I
I
OHIO
t
OT
ILI O
IHIO
ILIO
IHIO
t
I
I
CL = 30pF 0.1 μs
-0.3 +0.8
1.5 V
V
V
CL = 30pF 1.2 μs
IT
-25 +25 mA
= 0 to 5V -65
CCx(5V)
= 0 to 3V -50
CCx(3V)
CCx(1.8 V)
OLIO
OLIO
OLIO
OHIO
OHIO
ILI O
IHIO
= 0 to 1.8V -30
= 1mA 0 0.3 V
= 0V 0 -1 mA
9 14 19 k
CCx
= 1mA 0 0.3
-20μA 0.8 x V
-40μA (3V/5V) 0.75 x V
= 0V 700
= V
20
CCx
4.6 5.4
2.75 3.25
1.62 1.98
V
CCx
V
CCx
CCx
CCx
CCx
V
mA
V
V
μA
DS8007
Multiprotocol Dual Smart Card Interface
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +3.3V, V
DDA
= +3.3V, TA= +25°C, unless otherwise noted.) (Note 1)
PARAMETER S YMBOL CONDITIONS MIN TYP MAX UNITS
C4x,
C8x
Pins
Card Inactive Mode
Card Active Mode
Output Low Voltage
Output Current I
Internal Pul lup Resistor
Output Low Voltage
Voltage
Output Rise/Fall Time
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Input Ri se/Fall Time
Pullup Pulse Width
Oper ating Frequency
V
I
OLC48
V
OLC48
R
Between C4 or C8 and V
PULLUP
I
V
OLC48
V
OHC48
t
CL = 30pF 0.1 μs
OT
V
-0.3 +0.8
ILC48
V
1.5 V
IHC48
I
V
ILC48
I
V
IHC48
t
CL = 30pF 1.2 μs
IT
t
Active pullup 200 ns
WPU
f
On card contact pin s 1 MHz
MAX
= 1mA 0 0.3 V
OLC48
= 0V 0 -1 mA
OLC48
6 10 14 k
CCx
= 1mA 0 0.3
OLC48
I
-20μA 0.8 x V
OHC48
I
-40μA (3V/5V) 0.75 x V
OHC48
= 0V 850
ILI O
= V
IHIO
20
CCx
V
CCx
V
CCx
CCxOutput High
CCx
CCx
V
V
μA
TIMING
Activation Sequence Duration t
See Figure 9 130 μs
ACT
Deactivation Sequence Duration tDE See Figure 9 150 μs
PRESA/PRESB PINS
Input Low Voltage V
Input High Voltage V
Input Low Current I
Input High Current I
0.25 x VDD V
ILPR ES
0.7 x VDD V
IHPRES
ILPRES
IHPRES
V
V
= 0V 40 μA
ILPR ES
= VDD 40 μA
IHPRES
I/OAUX PIN
Internal Pul lup Resistor R
Output Low Voltage V
Output High Voltage V
Between I/OAUX and VDD 9 14 19 k
PULLUP
OLAUX
OHAUX
I
I
= 1mA 0.3 V
OLAUX
= 40μA (3V/5V) 0.75 x VDD V
OHAUX
V
DD
Output Rise/Fall Time tOT CL = 30pF 0.1 μs
DS8007
Multiprotocol Dual Smart Card Interface
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +3.3V, V
DDA
= +3.3V, TA= +25°C, unless otherwise noted.) (Note 1)
Note 1: Operation guaranteed at -40°C and +85°C but not tested. Note 2: Parameters are guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the maxi-
mum rise and fall time is 10ns.
Note 3: Parameter is guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the minimum
slew rate is 0.05V/µs and the maximum slew rate is 0.5V/µs.
PARAMETER S YMBOL CONDITIONS MIN TYP MAX UNITS
Input Low Voltage V
Input High Voltage V
Input Low Current I
Input High Current I
Input Ri se/Fall Time tIT CL = 30pF 1.2 μs
INTERRU PT PIN
Output Low Voltage V
Input High Leakage Current I
D7 TO D0, ALL OTHER LOGIC PINS
Output Low Voltage V
Output High Voltage V
Output Rise/Fall Time tOT CL = 50pF 25 ns
Input Low Voltage V
Input High Voltage V
Input Low Current I
Input High Current I
Load Capacitance CLD 10 pF
-0.3
ILAUX
IHAUX
V
ILAUX
V
IHAUX
IOH = 2mA 0.3 V
OLINT
10 μA
LIHINT
I
OLD
I
OHD
ILD
IHD
-20 +20 μA
ILD
-20 +20 μA
IHD
= 0V 700 μA
ILAUX
= VDD -20 +20 μA
IHAUX
= +5mA
OLD
= -5mA
OHD
0.7 x V
DD
0.8 x V
DD
0.7 x V
DD
0.3 x V
DD
V
VDD V
0.2 x V
DD
V
VDD V
0.3 x V
DD
V
V
DS8007
Multiprotocol Dual Smart Card Interface
_______________________________________________________________________________________ 7
AC ELECTRICAL SPECIFICATIONS—TIMING PARAMETERS FOR MULTIPLEXED PARALLEL BUS
(VDD= 3.3V, V
DDA
= 3.3V, TA= +25°C, unless otherwise noted.) (Figure 1)
Figure 1. Multiplexed Parallel Bus Timing
XTAL1 Cycle Time t
ALE Pulse Width t
Address Valid to ALE Low t ALE Low to RD or WR Low t
RD Pulse Width t
RD Low to Data Read Valid t WR/RD High to ALE High t WR Pulse Width t Data Write Valid to WR Low t
ALE
CS
PARAMETER S YMBOL CONDITIONS MIN TYP MAX UNITS
50 ns
20 ns
W(ALE)
10 ns
AVLL
10 ns
W(RD)
Register URR 2 x t
Other registers 10
CY(XTAL1)
50 ns
10 ns
10 ns
W(WR)
10 ns
t
(AL-RWL)
t
W(ALE)
t
AVLL
CY(XTAL1)
(AL-RWL)
(RL-DV)
(RWH-AH)
(DV-WL)
ns
D7–D0
RD
WR
ADDRESS ADDRESS
t
W(RD)
t
(RL-DV)
DATA
(READ)
t
(RWH-AH)
t
(DV-WL)
DATA
(WRITE)
t
W(WR)
t
(RWH-AH)
DS8007
Multiprotocol Dual Smart Card Interface
8 _______________________________________________________________________________________
Figure 2. Nonmultiplexed Parallel Bus Timing (Read and Write)
AC ELECTRICAL SPECIFICATIONS—TIMING PARAMETERS FOR NONMULTIPLEXED PARALLEL BUS (READ AND WRITE)
(VDD= 3.3V, V
DDA
= 3.3V, TA= +25°C, unless otherwise noted.) (See Figure 2.)
RD High to CS Low t Access Time CS Low to Data Out Valid t
CS High to Data Out High Impedance t
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
1
2
3
10 ns
50 ns
10 ns
Data Valid to End of Write t
Data Hold Time t RD Low to CS or WR Low t Address Stable to CS or WR High t Address to CS Low t
READ
CS
t
WR (EN)
RD (R/W)
AD3–AD0
D7–D0
WRITE
CS
WR (EN)
1
t
8
4
5
6
7
8
t
2
ADDRESS
DATA OUT
t
3
10 ns
10 ns
10 ns
10 ns
10 ns
WRITE RELEASE WITH CS
CS
WR (EN)
t
6
RD (R/W)
t
7
AD3–AD0
D7–D0
ADDRESS
t
4
DATA IN
t
5
WRITE RELEASE WITH EN
DS8007
Multiprotocol Dual Smart Card Interface
_______________________________________________________________________________________ 9
AC ELECTRICAL SPECIFICATIONS—TIMING PARAMETERS FOR CONSECUTIVE READ/WRITE TO URR/UTR/TOC
(VDD= 3.3V, V
DDA
= 3.3V, TA = +25°C, unless otherwise noted.)
Figure 3. Timing Between Two Read Operations in Register URR
Note 4: Depends on the leading edge of WR or CS (whichever is deasserted first). Reference this specification to the rising edge
of CS/WR instead of the falling edge.
Note 5: PSC is the programmed prescaler value (31 or 32).
PARAMETER S YMBOL CONDITIONS MIN TYP MAX UNITS
SEE FIGURE 3
RD Pulse Width t
RD Low to Bit CRED = 1 t
Set Time Bit FE t
Set Time Bit RBF t
SEE FIGURE 4
WR/CS Pulse Width t
WR/CS Low to I/Ox Low t
SEE FIGURE 5
WR/CS Pulse Width t WR/CS High to Bit CRED = 1 t
10 ns
W(RD)
RD(URR)
10.5 ETU
SB(FE)
10.5 ETU
SB(RBF)
(Note 4) 10 ns
W(WR)
WR(UTR)
10 ns
W(WR)
(Notes 4 and 5) 1 / PSC 2 / PSC ETU
WR(TOC)
t
W(RD)
2t
CY(CLK)
t
W(WR)
2t
CY(CLK)
+
+
t
W(RD)
3t
CY(CLK)
t
W(WR)
3t
CY(CLK)
+
+
ns
ns
I/Ox
RBF BIT
FE BIT
INT
RD
CRED BIT
t
SB(FE)
t
SB(RBF)
t
W(RD)
t
RD(URR)
DS8007
Multiprotocol Dual Smart Card Interface
10 ______________________________________________________________________________________
Figure 4. Timing Between Two Write Operations in Register UTR
Figure 5. Timing Between Two Write Operations in Register TOC
I/Ox
TBE BIT
INT
WR/CS
CRED BIT
t
W(WR)
t
WR(UTR)
t
WR/CS
CRED BIT
W(WR)
t
WR(TOC)
DS8007
Multiprotocol Dual Smart Card Interface
______________________________________________________________________________________ 11
Pin Description
PIN NAME FUNCTION
Reset Output. This active-high output is provided for resetting external devices. The RSTOUT pin is driven
1 RSTOUT
2 I/OAUX Auxiliary I/O. This I/O pin allows connection to an auxiliary smart card interface.
3 I/OA
4 C8A
5 PRESA Smart Card A Presence Contact. This is the active-high presence contact associated with smart card A.
6 C4A
7 GNDA Smart Card A Ground. Thi s must be connected to GND.
8 CLKA
9 V
10 RSTA
11 I/OB
12 C8B
13 PRESB Smart Card B Presence Contact. This is the active-high presence contact associated with smart card B.
14 C4B
15 GNDB Smart Card B Ground. This must be connected to GND.
16 CLKB
17 V
18 RSTB
19 GND Ground
20 VUP Step-Up Converter Connection. Connect a low-ESR capacitor of 220nF between this pin and ground.
21 CPA1 Step-Up Converter Contact 1. Connect a low-ESR capacitor of 220nF between CPA1 and CPA2.
22 CPB1 Step-Up Converter Contact 3. Connect a low-ESR capacitor of 220nF between CPB1 and CPB2.
23 V
CCA
CCB
DDA
high until the DELAY pin reaches V stated so it can externally b e pul led down. The SUPL bit is set for each RSTOUT pulse.
Smart Card A I/O Data Line. This i s the I/O data line associated with smart card A. This is a lso referred to as the ISO C7 contact.
Smart Card A Auxiliary I/O. This is an auxiliary I/O associated with smart card A. This is also referred to as the ISO C8 contact. This can be associated with synchronous cards.
Smart Card A Auxiliary I/O. This is an auxiliary I/O associated with smart card A. This is also referred to as the ISO C4 contact. This can be associated with synchronous cards.
Smart Card A Cloc k Output. This is the clock output assoc iated with smart card A. This is also referred to as the ISO C3 contact.
Smart Card A Supply Voltage. This i s the supply voltage output assoc iated with smart card A. This i s al so referred to as the ISO C1 contact.
Smart Card A Reset. This is the reset output as sociated with smart card A. Thi s is a lso referred to as the ISO C2 contact.
Smart Card B I/O Data Line. This i s the I/O data line associated with smart card B. This is a lso referred to as the ISO C7 contact.
Smart Card B Auxiliary I/O. This is an auxiliary I/O associated with smart card B. This is also referred to as the ISO C8 contact. This can be associated with synchronous cards.
Smart Card B Auxiliary I/O. This is an auxiliary I/O associated with smart card B. This is also referred to as the ISO C4 contact. This can be associated with synchronous cards.
Smart Card B Cloc k Output. This is the clock output assoc iated with smart card B. This is also referred to as the ISO C3 contact.
Smart Card B Supply Voltage. This i s the supply voltage output assoc iated with smart card B. This i s al so referred to as the ISO C1 contact.
Smart Card B Reset. This is the reset output as sociated with smart card B. Thi s is a lso referred to as the ISO C2 contact.
Analog Supply Voltage. Positive analog-supply voltage for the step-up converter; can be higher but not lower than V
This pin should be decoupled to AGND with a good quality capacitor.
DD.
. Once the DELAY pin reaches V
DRST
, the RSTOUT pin is three-
DRST
DS8007
Multiprotocol Dual Smart Card Interface
12 ______________________________________________________________________________________
Pin Description (continued)
PIN NAME FUNCTION
24 CPB2 Step-Up Converter Contact 4. Connect a low-ESR capacitor of 220nF between CPB1 and CPB2.
25 AGND Analog Ground
26 CPA2 Step-Up Converter Contact 2. Connect a low-ESR capacitor of 220nF between CPA1 and CPA2.
27 VDD Digital Supply Voltage. This pin should be decoupled to GND with a good quality capacitor.
28–35 D0–D7
36 RD
37 WR
38 CS Active-Low Chip-Select Input. This input indicates when the DS8007 is active on the parallel bus.
39 ALE
40 INT Active-Low Interrupt. This output indicate s an interrupt is act ive.
41 INTAUX Auxiliary Interrupt Input. This pin serves as an auxiliary interrupt.
42–45 AD3 –AD0
46, 47
48 DELAY
XTAL2,
XTAL1
8-Bit Digital I/O. This port functions as the data or address/data communication lines between the host controller and the DS8007 for the nonmultiplexed and multiplexed operating modes, respectively.
Active-Low Paralle l Bus Read Strobe Input. In mu ltiple xed mode, this input i ndicates when the host processor is reading information from the DS8007. In nonmultiplexed mode, this pin signa ls the current operation is a read (RD = 1) or a write (RD = 0) when CS and WR are low.
Active-Low Parallel Bus Write Strobe Input. In multiple xed mode, this input indicates when the host processor is writing information to the DS8007. In nonmultiplexed mode, a low on this pin signals the bus is engaged in a read or write operation.
Address Latch Enable Input. This signal monitors the ALE signal when the host processor bus is operating in multiplexed mode. Connect this signal to V
Register Selection Address Inputs. These pins function as the address input lines for the nonmultiplexed configuration and should be connected to ground or V
Crystal Oscillators. Place a crystal with appropriate load capacitors between these pins if that is the desired clock source. XTAL1 also acts as an input if there is an external clock source in place of a crystal.
External Delay Capacitor Connection. Connect a capacitor from thi s pin to ground to set the power-on reset delay.
when operating in nonmult iplexed mode.
DD
in the mu ltiple xed configuration.
DD
DS8007
Multiprotocol Dual Smart Card Interface
______________________________________________________________________________________ 13
Detailed Description
The following describes the major functional features of the device. Use of this document requires the reader have a basic understanding of ISO 7816 terminology.
Parallel Bus Interface
The device interfaces to a host computer/processor through a multiplexed or demultiplexed, parallel, 8-bit data bus (D0–D7). The parallel bus interface monitors the ALE signal and automatically detects whether a multiplexed or nonmultiplexed external bus interface is intended. The nonmultiplexed external bus interface is the default configuration and is maintained so long as
no edge (activity) is detected on the ALE pin. Once a rising edge is detected on the ALE pin, the DS8007 is placed into the multiplexed mode of operation. Once in the multiplexed mode of operation, a reset/power cycle or the deassertion of CS forces the device to the non­multiplexed mode. Connecting the ALE pin to V
DD
or ground forces the device into nonmultiplexed parallel bus mode. Figure 7 shows that the bus recognition dic­tates whether the external address lines (AD3–AD0) can be used directly or whether the external data lines (D7–D0) must be latched according to the ALE input signal. In the multiplexed mode of operation, a new address is latched irrespective of the state of CS.
Figure 6. Block Diagram
GNDB
I/OB
C4B C8B
PRESB
RSTB CLKB
V
CCB
GNDA
I/OA C4A C8A
PRESA
RSTA CLKA V
CCA
RSTOUT
DELAY
V
GND
DD
POWER-SUPPLY
SUPERVISOR
ANALOG
INTERFACE
DS8007
ISO
UART
DIGITAL
INTERFACE
TIMEOUT
COUNTER
INT CS
INTAUX I/OAUX
AD0 AD1 AD2 AD3 ALE RD WR
D0 D1 D2 D3
D4
D5 D6
D7
CPA1 CPA2 CPB1
CPB2
V
DDA
AGND
V
UP
DC-DC
CONVERTER
CONTROL
SEQUENCERS
CLOCK
GENERATION
XTAL1
XTAL2
Loading...
+ 28 hidden pages
Buy Points How it Works FAQ Contact Us Questions and Suggestions Privacy Policy Cookie Policy Terms of Use