General Description
The DS8005 dual smart card interface is a low-cost,
dual analog front-end for an IC card reader interface
that needs to communicate with two smart cards in a
mutually exclusive fashion. The analog interface is
designed for use in ISO 7816, EMV®, and B-CAS applications. The device is functionally similar to two
DS8024s with external multiplexing to select the active
interface, but also includes low power and 1.8V card
support. Additionally, the device is designed for applications where the C4/C8 (AUX1/AUX2) contacts are not
required on either card interface.
The device is provided in a 28-pin SO package. The
pinout is backwards compatible with the DS8313,
allowing applications to use the same footprint and
PCB for applications that communicate with either one
or two smart cards.
The device is designed to be used with microcontrollers that contain an ISO 7816 UART, or have the
bandwidth to run this protocol in software by bit-banging IO ports. If the microcontroller does not have the
capability of running the ISO 7816 UART, the DS8007 is
the more appropriate product selection.
Applications
Set-Top Box Conditional Access
Telecommunications
Pay Television
Access Control
Financial Terminals
Features
♦ Analog Interface and Level Shifting for IC Card
Communication
♦ ±8kV (min) ESD (HBM) Protection on Card Interfaces
♦ Ultra-Low Stop-Mode Current, Less than 10nA
Typical
♦ Internal IC Card Supply-Voltage Generation
5.0V ±5%, 80mA (max)
3.0V ±8%, 65mA (max)
1.8V ±10%, 30mA (max)
♦ Automatic Card Activation and Deactivation
Controlled by Dedicated Internal Sequencer
♦ I/O Lines from Host Directly Level Shifted for
Smart Card Communication
♦ Flexible Card Clock Generation, Supporting
External Crystal Frequency Divided by 1, 2, 4, or 8
♦ High-Current, Short-Circuit and High-Temperature
Protection
♦ Low Active-Mode Current
♦ Internal Multiplexing Allows One ISO 7816 UART
Implementation to Control Two Smart Card
Sockets
DS8005
Smart Card Interface
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
19-5257; Rev 0; 4/10
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-PACKAGE
DS8005-RRX+ -40°C to +85°C 28 SO
+
Denotes a lead(Pb)-free/RoHS-compliant package.
Typical Application Circuit appears at end of data sheet.
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be
simultaneously available through various sales channels. For information about device errata, go to: www.maxim-ic.com/errata
.
EMV is a registered trademark of EMVCo LLC.
Selector Guide
PART
DS8005-RRX+ 1.8V, 3V, 5V Yes Yes Positive 2
CARD VOLTAGES
SUPPORTED
LOW STOP-MODE
POWER
LOW ACTIVE-
MODE POWER
PRES_ POLARITY V
DDA
INPUTS
DS8005
Smart Card Interface
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED DC OPERATING CONDITIONS
(VDD= +3.3V, V
DDA
= +5.0V, TA= +25°C, unless otherwise noted. All specifications apply to the device, unless otherwise noted in
the CONDITIONS column.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VDDRelative to GND ...............-0.5V to +6.5V
Voltage Range on V
DDA
Relative to GND .............-0.5V to +6.5V
Voltage Range on CLKA, RSTA, I/OA ......-0.5V to (V
CCA
+ 0.5V)
Voltage Range on CLKB, RSTB, I/OB ......-0.5V to (V
CCB
+ 0.5V)
Voltage Range on All Other Pins
Relative to GND.......................................-0.5V to (V
DD
+ 0.5V)
Maximum Junction Temperature .....................................+125°C
Maximum Power Dissipation Range (T
A
= -25°C to +85°C)..700mW
Storage Temperature Range ............................-55°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
POWER SUPPLY
Digital Supply Voltage VDD 2.7 6.0 V
Card Voltage-Generator Supply Voltage V
Reset Voltage Thresholds
CURRENT CONSUMPTION
Active VDD Current 5V Cards
(Including 80mA Draw from 5V Card)
Active VDD Current 5V Cards (Current
Consumed by Device Only)
Active VDD Current 3V Cards
(Including 65mA Draw from 3V Card)
Active VDD Current 3V Cards (Current
Consumed by Device Only)
Active VDD Current 1.8V Cards
(Including 30mA Draw from 1.8V Card)
Active VDD Current 1.8V Cards (Current
Consumed by Device Only)
Inactive- Mode Current I
Stop-Mode Current I
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Must be VDD 4.75 6.0 V
DDA
V
Threshold voltage (falling) 2.20 2.45 2.65 V
TH2
Hy steresis 50 100 200 mV
V
HYS2
I
DD_50V
I
DD_IC
I
DD_30V
I
DD_IC
I
DD_18V
I
DD_IC
DD
DD_STOP
ICC = 80mA, f
f
= 10MHz, V
CLK
ICC = 80mA, f
f
= 10MHz, V
CLK
ICC = 65mA, f
= 10MHz, V
f
CLK
ICC = 65mA, f
= 10MHz, V
f
CLK
ICC = 30mA, f
= 10MHz, V
f
CLK
ICC = 30mA, f
= 10MHz, V
f
CLK
Card inactive, active-high PRES_,
device not in stop mode
= 20MH z,
XTAL
DDA
= 20MHz,
XTAL
= 5.0V (Note 2)
DDA
= 20MH z,
XTAL
DDA
= 20MHz,
XTAL
= 5.0V (Note 2)
DDA
= 20MH z,
XTAL
DDA
= 20MHz,
XTAL
= 5.0V (Note 2)
DDA
= 5.0V
= 5.0V
= 5.0V
80.75 85 mA
0.75 5 mA
65.75 70 mA
0.75 5 mA
30.75 40 mA
0.75 5 mA
50 400 μA
Device in ultra-low-power stop
mode (CMDVCC, 5V/3V, and 1_8V
0.01 2 μA
set to logic 1) (Note 3)
DS8005
Smart Card Interface
_______________________________________________________________________________________ 3
RECOMMENDED DC OPERATING CONDITIONS (continued)
(VDD= +3.3V, V
DDA
= +5.0V, TA= +25°C, unless otherwise noted. All specifications apply to the device, unless otherwise noted in
the CONDITIONS column.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CLOCK SOURCE
Crystal Frequency f
XTAL1 Operating Condition s
External Capacitance for Crystal
Internal Oscillator f
External crystal (Note 1) 0 20 MHz
XTAL
f
XTAL1
V
IL_XTAL1
V
IH_XTAL1
C
XTAL1
C
XTAL2
INT
(Note 1) 0 20 MHz
Low-level input on XTAL1 -0.3
High-level input on XTAL1
,
15 pF
0.7 x
V
DD
0.3 x
V
DD
VDD +
0.3
2.2 2.7 3.4 MHz
V
SHUTDOWN TEMPERATURE
Shutdown Temperature TSD +150 °C
RSTA AND RSTB PINS
Card-Inactive Mode
Card-Active Mode
Output Low Voltage V
Output Current I
Output Low Voltage V
Output High
Voltage
V
Rise Time t
Fal l Time t
Current Limitation I
RSTIN to RST Delay t
RST(LIMIT)
D(RSTIN-RST)
OL_RST1
I
OL_RST1
V
I
OL_RST2
I
OH_RST2
CL= 30pF (Note 1) 0.1 μs
R_RST
CL= 30pF (Note 1) 0.1 μs
F_RST
= 1mA 0.3 V
OL_RST
= 0V -1 mA
OL_RST
= 200μA 0.3 V
OL_RST
V
-
OH_RST
= -200μA
CC
0.5
V
-20 +20 mA
2 μs
CLKA AND CLKB PINS
Card-Inactive Mode
Card-Active Mode
V
CCA
AND V
PINS
CCB
Card-Inactive Mode
Output Low Voltage V
Output Current I
Output Low Voltage V
Output High
Voltage
Rise Time t
Fal l Time t
Current Limitation I
Cloc k Frequency f
OL_CLK1 IOLCLK
V
OL_CLK1
I
OL_CLK2
V
OH_CLK2 IOHCLK
CL= 30pF (Notes 1, 4) 8 ns
R_CLK
CL= 30pF (Notes 1, 4) 8 ns
F_CLK
CLK(LIMIT)
-75 +75 mA
Operational 0 10 MHz
CLK
Duty Factor C
Slew Rate SR C
Output Low Voltage V
Output Current I
I
CC1
VCC = 0V 0 -1 mA
CC1
= 1mA 0.3 V
= 0V -1 mA
OLCLK
= 200μA 0.3 V
OLCLK
V
-
= -200μA
= 30pF 45 55 %
L
= 30pF (Note 1) 0.2 V/ns
L
= 1mA 0.3 V
CC
CC
0.5
V
DS8005
Smart Card Interface
4 _______________________________________________________________________________________
RECOMMENDED DC OPERATING CONDITIONS (continued)
(VDD= +3.3V, V
DDA
= +5.0V, TA= +25°C, unless otherwise noted. All specifications apply to the device, unless otherwise noted in
the CONDITIONS column.) (Note 1)
Card-Active Mode
DATA LINES (I/O_ AND I/OIN)
I/O_ I/OIN Fall ing Edge Delay t
Pullup Pulse Active Time tPU (Note 1) 100 ns
Maximum Frequency f
Input Capacitance CI 10 pF
I/OA AND I/OB PINS
Card-Inactive Mode
Card-Active Mode
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Device: I
= 4.75V (Note 1)
V
DDA
Device: I
Device: I
Device: I
< 30mA,
CC(5V)
< 80mA 4.75 5 5.25
CC(5V)
< 65mA 2.78 3 3.24
CC(3V)
CC(1. 8V)
< 30mA 1.64 1.8 1.98
4.65 5 5.25
5V card; current pulses of 40nC
Output Low Voltage V
CC2
with I < 200mA, t < 400ns,
4.6 5.4
V
f < 20MHz
3V card; current pulses of 24nC
with I < 200mA, t < 400ns,
2.75 3.25
f < 20MHz
1.8V card; current pulse s of 12nC
with I < 200mA, t < 400ns,
1.62 1.98
f < 20MHz
Output Current I
Shutdown Current
Threshold
I
Slew Rate V
D(IO-I OIN)
Output Low Voltage V
Output Current I
Internal Pullup
Resistor
R
Output Low Voltage V
Output High
Voltage
V
Output Rise/Fall
Time
Input Low Voltage V
Input High Voltage V
V
CC2
V
V
CC(SD)
CCSR
(Note 1) 120 mA
Up/down; C < 300nF (Note 5) 0.05 0.16 0.22 V/μs
(Note 1) 200 ns
1 MHz
IOMAX
I
OL_IO1
V
OL_I O1
To VCC 6 11 19 k
PU_I O
OL_IO2 IOL_I O
OH_IO2
t
OT
IL_IO
IH_IO
I
I
CL= 30pF (Note 1) 0.1 μs
-0.3 +0.8
1.5 V
= 0 to 5V -80
CC(5V)
= 0 to 3V -65
CC(3V)
CC(1.8V)
OL_I O
OL_IO
= 0 to 1.8V -30
= 1mA 0.3 V
= 0V 0 -1 mA
= 1mA 0.3 V
= < -20μA 0.8 x VCC
OH_IO
= < -40μA (3V/5V) 0.75 x VCC
OH_IO
mA
V
V
CC
DS8005
Smart Card Interface
_______________________________________________________________________________________ 5
RECOMMENDED DC OPERATING CONDITIONS (continued)
(VDD= +3.3V, V
DDA
= +5.0V, TA= +25°C, unless otherwise noted. All specifications apply to the device, unless otherwise noted in
the CONDITIONS column.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Card-Active Mode
Input Low Current I
Input High Current I
IL_IO
IH_IO
Input Rise/Fa ll Time tIT 1.2 μs
Current Limitation I
IO(LIMIT)
V
= 0V 700 μA
IL_IO
V
= VCC -20 +20 μA
IH_IO
CL= 30pF -15 +15 mA
I/OIN PIN
Output Low Voltage VOL IOL = 1mA 0.3 V
Output High Voltage VOH IOH < -40μA
0.75 x
V
DD
VDD +
0.1
V
Output Rise/Fall Time tOT CL= 30pF, 10% to 90% 0.1 μs
Input Low Voltage VIL -0.3
Input High Voltage V
Input Low Current I
Input High Current I
Input Ri se/Fal l Time tIT V
IH
VIL = 0V 700 μA
IL_IO
VIH = VDD -10 +10 μA
IH_IO
to VIH 1.2 μs
IL
0.7 x
V
DD
+0.3 x
V
DD
VDD +
0.3
V
V
Integrated Pullup Resistor RPU Pullup to VDD 6 11 19 k
CONTROL PINS (CLKDIV1, CLKDIV2, CMDVCC, RSTIN, 5V/3V, 1_8V)
Input Low Voltage V
Input High Voltage V
Input Low Current I
Input High Current I
IH_IO
IL
IH
IL_IO
-0.3
0.7 x
V
DD
0 < VIL < VDD -5 +5 μA
0 < VIH < VDD -5 +5 μA
+0.3 x
V
DD
VDD +
0.3
V
V
INTERRUPT OUTPUT PINS (OFF AND OFF2)
Output Low Voltage VOL IOL = 2mA 0.3 V
Output High Voltage VOH IOH = -15μA
0.75 x
V
DD
V
Integrated Pullup Resistor RPU Pullup to VDD 12 24 38 k
PRESA AND PRESB PINS
Input Low Voltage V
Input High Voltage V
Input Low Current I
Input High Current I
IL_PRES
IH_PRES
IL_PRES
IH_PRES
0.7 x
V
DD
V
V
= 0V -5 +5 μA
IL_PRES
= VDD 10 μA
IH_PRES
0.3 x
V
DD
V
V
DS8005
Smart Card Interface
6 _______________________________________________________________________________________
RECOMMENDED DC OPERATING CONDITIONS (continued)
(VDD= +3.3V, V
DDA
= +5.0V, TA= +25°C, unless otherwise noted. All specifications apply to the device, unless otherwise noted in
the CONDITIONS column.) (Note 1)
Note 1: Operation guaranteed at -40°C and +85°C but not tested.
Note 2: I
DD_IC
measures the amount of current used by the device to provide the smart card current minus the load.
Note 3: Stop mode is enabled by setting CMDVCC, 5V/3V, and 1_8V to a logic-high.
Note 4: Parameters are guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the maximum
rise and fall time is 10ns.
Note 5: Parameter is guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the minimum
slew rate is 0.05V/µs and the maximum slew rate is 0.5V/µs.
TIMING
Activation Time t
Deactivation Time t
CLK_ to Card Start
Time
PRES Debounce Time t
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
50 160 220 μs
ACT
50 80 100 μs
DEACT
Window Start t3 50 95 130
Window End t
140 160 220
5
DEB OUNCE
5 8 11 ms
μs
DS8005
Smart Card Interface
_______________________________________________________________________________________ 7
Pin Description
Pin Configuration
TOP VIEW
CLKDIV1
CLKDIV2
5V/3V
1_8V
V
CCB
V
DDA
RSTB
CLKB
CGND
PRESA
I/OA
I/OB
PRESB
28
1
2
3
4
5
6
7
8
9
10
11
12
13
14CGND
DS8005
SEL_AB
27
OFF2
26
I/OIN
25
XTAL2
24
XTAL1
23
OFF
22
GND
21 V
DD
20 RSTIN
19 CMDVCC
18 V
DDA2
17 V
CCA
16 RSTA
15 CLKA
SO
PIN NAME FUNCTION
1, 2
CLKDIV1,
CLKDIV2
Cloc k D iv ider. Determine s the di vided-down input cloc k frequency (presented at XTAL1 or from a
crystal at XTAL1 and XTAL2) on the CLK_ output pin. Dividers of 1, 2, 4, and 8 are a va ilable.
5V/3V Selection Pin. Al lows se lect ion of 5V or 3V for communication with an IC card. Log ic-high
3 5V/3V
select s 5V operation; log ic-low se lects 3V operation. The 1_8V pin overrides the setting on this pin if
active. See Table 3 for a complete description of choosing card voltages.
1.8V Operation Selection. Thi s acti ve-high input puts the device into 1.8V smart card communication
4 1_8V
mode. The selected interface (when activated) powers a card with a 1.8V supply and al l I/O lines
operate at 1.8V.
5 V
6 V
CCB
DDA
Smart Card Supply Voltage, Interface B. Decouple to CGND (card ground) with 2 x 100nF or 100 +
200nF capacitors (ESR < 100m).
Smart Card Interface Supply. 5V power supply for powering the card interface.
7 RSTB Smart Card Reset, Interface B. Card reset output from contact C2.
8 CLKB Smart Card Clock, Interface B. Card clock, contact C3.
9, 14 CGND Smart Card Ground
Interface A Card Presence Indicator. Active-high card presence input for the first card interface.
10 PRESA
When the presence indicator becomes active, a debounce timeout begins. After 8ms (typ), the OFF
signal becomes active if the first card interface is selected (SEL_AB low), else the OFF2 signal
becomes active.
Smart Card Data-Line Output, Interface A. Card data commun ication l ine, contact C7. Thi s pin i s
11 I/OA
onl y acti ve if the first card interface is selected (SEL_AB low) and the interface ha s gone through an
activation sequence.
DS8005
Smart Card Interface
8 _______________________________________________________________________________________
Pin Description (continued)
PIN NAME FUNCTION
Smart Card Data-Line Output, Interface B. Card data commun ication l ine, contact C7. Thi s pin i s
12 I/OB
13 PRESB
15 CLKA Smart Card Clock, Interface A. Card clock, contact C3.
16 RSTA Smart Card Reset, Interface A. Card reset output from contact C2.
17 V
18 V
19 CMDVCC Activation Sequence Initiate. Active-low input from host.
20 RSTIN Card Re set Input. Reset input from the ho st.
21 VDD Supply Voltage
22 GND Digital Ground
23 OFF
24, 25
26 I/OIN I/O Input. Host-to-interface chip data I/O line.
27 OFF2
28 SEL_AB
CCA
DDA2
XTAL1,
XTAL2
only active if the second card interface is selected (SEL_AB high) and the interface has gone
through an activation sequence.
Interface B Card Presence Indicator. Active-high card presence input for the second card interface.
When the presence indicator becomes active, a debounce timeout begins. After 8ms (typ), the OFF
signal becomes active if the second card interface is selected (SEL_AB high), else the OFF2 signal
becomes active.
Smart Card Supply Voltage, Interface A. Decouple to CGND (card ground) with 2 x 100nF or 100 +
220nF capacitors (ESR < 100m).
Smart Card Interface Supply. 5V power supply for powering the card interface. Whi le this pin is not
required to be connected to 5V (it can be left not connected (N.C.)), it is recommended for the best
performance when delivering power to a 5V smart card.
Status Output for Selected Interface. Active-low interrupt output to the ho st. Includes a 20 k
integrated pullup resistor to V
selected interface only (behaving as if it were a DS8024 with only one interface). The OFF2 pin
should be used to monitor presence events on the nonselected interface.
Crystal/Clock Input. Connect an input from an external clock to XTAL1 or connect a crystal across
XTAL1 and XTAL2.
Status Output for Nonselected Interface. This pin passes through the presence signal for the
nonselected interface. If SEL_AB is low (the A interface is s elected), thi s pin reflect s the state of the
PRESB input. If SEL_AB is high (the B interface is se lected), this pin reflect s the state of the PRESA
input.
Interface Selection. This pin selects the interface the input pins (I/OIN, RSTIN, etc.) communicate
with and control. If SEL_AB i s low, the A interface is selected. Activation sequences power up V
and communication occurs with CLKA, I/OA, and RSTA. If SEL_AB is high, the B interface is
selected. Both interfaces can be powered and clocking at the same time. See the Switching A/B
Interfaces section for more information.
. This pin reflects fault events and PRES_ events on the currently
DD
CCA
DS8005
Smart Card Interface
_______________________________________________________________________________________ 9
Figure 1. Functional Diagram
Detailed Description
The DS8005 is an analog front-end for communicating
with 1.8V, 3V, and 5V dual smart cards. It is a dual
input-voltage device, requiring one supply to match
that of a host microcontroller and a separate +5V supply for generating correct smart card supply voltages.
The device translates all communication lines to the
correct voltage level and provides power for smart card
operation. It is a low-power device, consuming very little current in active-mode operation (during a smart
card communication session), and is suitable for use in
battery-powered devices such as laptops and PDAs,
consuming only 10nA in stop mode. The device is
designed for applications that do not require communication using the C4 and C8 card contacts (AUX1 and
AUX2). It is suitable for SIM/SAM interfacing, as well as
for applications where only the I/O line is used to communicate with a smart card.
Power Supply
The device has dual supplies. The supply pins for the
device are VDD, GND, and V
DDA
. VDDshould be in the
2.7V to 6.0V range, and is the supply for signals that
interface with the host controller. It should, therefore, be
the same supply as used by the host controller. All
smart card contacts remain inactive during power-on or
power-off. The internal circuits are kept in the reset
state until VDDreaches V
TH2
+ V
HYS2
and for the duration of the internal power-on reset pulse, tW. A deactivation sequence is executed when VDDfalls below
V
TH2
.
An internal regulator generates the 1.8V, 3V, or 5V card
supply voltage (V
CC_
). The regulator should be sup-
plied separately by V
DDA
. V
DDA
should be connected
to a minimum 4.75V supply to provide the correct supply voltage for 5V smart cards.
1_8V
5V/3V
V
DDA
V
DDA2
CLKDIV1
CLKDIV2
XTAL1
XTAL2
RSTIN
I/OIN
SEL_AB
CMDVCC
OFF
OFF2
REGULATOR
CLOCK
GENERATION
I/O
XCVR
CONTROL
SEQUENCER
QSEL_AB
INTERRUPT
GENERATION
QSEL_AB
DETECTION
CGND
I/OA
V
CCA
RSTA
CLKA
PRESA
I/OB
V
CCB
RSTB
CLKB
PRESB
V
DD
GND
FAULT
CARD
INTERFACE A
CARD
INTERFACE B
DS8005
POWER
SUPPLY
Voltage Supervisor
The voltage supervisor monitors the VDDsupply. A
220µs reset pulse (tW) is used internally to keep the
device inactive during power-on or power-off of the
V
DD
supply. See Figure 2.
The IC card interface remains inactive regardless of the
levels on the command lines until duration tWafter V
DD
has reached a level higher than V
TH2
+ V
HYS2
. When
V
DD
falls below V
TH2
, the device executes a card
deactivation sequence if the card interface is active.
Clock Circuitry
The card clock signal (CLKA/CLKB) is derived from a
clock signal input to XTAL1 or from a crystal operating
at up to 20MHz connected between XTAL1 and XTAL2.
The output clock frequency of CLK_ is selectable
through inputs CLKDIV1 and CLKDIV2. The CLK signal
frequency can be f
XTAL
, f
XTAL
/2, f
XTAL
/4, or f
XTAL
/8.
See Table 1 for the frequency generated on the CLK_
signal given the inputs to CLKDIV1 and CLKDIV2.
Note that CLKDIV1 and CLKDIV2 must not be changed
simultaneously; a delay of 10ns minimum between
changes is needed. The minimum duration of any state
of CLK_ is eight periods of XTAL1.
The frequency change is synchronous: during a transition of the clock divider, no pulse is shorter than 45% of
the smallest period, and the first and last clock pulses
about the instant of change have the correct width.
When changing the frequency dynamically, the change
is effective for only eight periods of XTAL1 after the
command.
The f
XTAL
duty factor depends on the input signal on
XTAL1. To reach a 45% to 55% duty factor on CLK_,
XTAL1 should have a 48% to 52% duty factor with transition times less than 5% of the period.
With a crystal, the duty factor on CLK_ can be 45% to
55% depending on the circuit layout and on the crystal
characteristics and frequency. In other cases, the duty
factor on CLK_ is guaranteed between 45% and 55% of
the clock period.
I/O Transceivers
I/O_ and I/OIN are pulled high with an 11kΩ resistor
(I/O_ to V
CC_
and I/OIN to VDD) in the inactive state.
The first side of the transceiver to receive a falling edge
becomes the master. When a falling edge is detected
(and the master is decided), the detection of falling
edges on the line of the other side is disabled; that side
then becomes a slave. After a time delay t
D(EDGE)
, an n
transistor on the slave side is turned on, thus transmitting the logic 0 present on the master side.
When the master side asserts a logic 1, a p transistor
on the slave side is activated during the time delay t
PU
and then both sides return to their inactive (pulled up)
states. This active pullup provides fast low-to-high transitions. After the duration of tPU, the output voltage
depends only on the internal pullup resistor and the
DS8005
Smart Card Interface
10 ______________________________________________________________________________________
Figure 2. Voltage Supervisor Behavior
Table 1. Clock Frequency Selection
CLKDIV1 CLKDIV2 f
0 0 f
0 1 f
1 1 f
1 0 f
CLK
XTAL
XTAL
XTAL
XTAL
/8
/4
/2
V
DD
(INTERNAL SIGNAL)
ALARM
t
W
POWER ON
t
W
SUPPLY DROPOUT
+ V
V
TH2
V
TH2
POWER OFF
HYS2
DS8005
Smart Card Interface
______________________________________________________________________________________ 11
load current. Current to and from the card I/O lines is
limited internally to 15mA. The maximum frequency on
these lines is 1MHz.
Inactive Mode
The device powers up with the card interface in the
inactive mode. Minimal circuitry is active while waiting
for the host to initiate a smart card session.
• All card contacts are inactive (approximately 200Ω to
GND).
• The I/OIN pin in the high-impedance state (11kΩ
pullup resistor to VDD).
• Voltage generators are stopped.
• XTAL oscillator is running (if included in the device).
• Voltage supervisor is active.
• The internal oscillator is running at its low frequency.
Activation Sequence
After power-on and the reset delay, the host microcontroller can monitor card presence with signals OFF and
CMDVCC, as shown in Table 2.
If the card is in the reader (if PRES_ is active), the host
microcontroller can begin an activation sequence (start
a card session) by pulling CMDVCC low. The following
events form an activation sequence (Figure 3):
1) CMDVCC is pulled low.
2) The internal oscillator changes to high frequency (t
0
).
3) The voltage generator is started (between t0and t1).
Figure 3. Activation Sequence Using RSTIN and CMDVCC
Table 2. Card Presence Indication
SEL_AB OFF CMDVCC STATUS
Low High High Card A present.
Low Low High Card A not present.
High High High Card B present.
High Low High Card B not present.
SEL_AB OFF2 CMDVCC STATUS
Low High High Card B present.
Low Low High Card B not present.
High High High Card A present.
High Low High Card A not present.
CMDVCC
V
CC_
I/O_
CLK_
RSTIN
RST_
I/OIN
t
0t1
t
2
t
3
ATR
t
t5 = t
4
ACT
DS8005
4) V
CC_
rises from 0 to 5V, 3V, or 1.8V with a controlled
slope (t2= t1+ 1.5 × T). T is 64 times the internal
oscillator period (approximately 25µs).
5) I/O_ pin is enabled (t
3
= t1+ 4T) (they were previ-
ously pulled low).
6) The CLK_ signal is applied to the C3 contact (t
4
).
7) RST_ is enabled (t5= t1+ 7T).
To apply the clock to the card interface:
1) Set RSTIN high.
2) Set CMDVCC low.
3) Set RSTIN low between t3and t5; CLK_ now starts.
4) RST_ stays low until t5, then RST becomes the copy
of RSTIN.
5) RSTIN has no further effect on CLK_ after t5.
If the applied clock is not needed, set CMDVCC low
with RSTIN low. In this case, CLK_ starts at t3(minimum
200ns after the transition on I/O; see Figure 4); after t5,
RSTIN can be set high to obtain an answer to request
(ATR) from an inserted smart card. Do not perform activation with RSTIN held permanently high.
Active Mode
When the activation sequence is completed, the card
interface is in active mode. The host microcontroller
and the smart card exchange data on the I/O lines.
Deactivation Sequence
When a session is completed, the host microcontroller
sets the CMDVCC line high to execute an automatic
deactivation sequence and returns the card interface to
the inactive mode (Figure 5).
1) RST_ goes low (t10).
2) CLK_ is held low (t12= t10+ 0.5 × T) where T is 64
times the period of the internal oscillator (approximately 25µs).
3) I/O_ pin is pulled low (t13= t10+ T).
4) VCCstarts to fall (t14= t10+ 1.5 × T).
5) When V
CC_
reaches its inactive state, the deactiva-
tion sequence is complete (at tDE).
6) All card contacts become low impedance to GND;
I/OIN remains at VDD(pulled up through an 11kΩ
resistor).
7) The internal oscillator returns to its lower frequency.
V
CC
Generator
Each V
CC_
generator has a capacity to supply up to
80mA continuously at 5V, 65mA at 3V, and 30mA at
1.8V. An internal overload detector triggers at approximately 120mA. Current samples to the detector are filtered. This allows spurious current pulses (with a
duration of a few µs) up to 200mA to be drawn without
causing deactivation. The average current must stay
below the specified maximum current value. To maintain V
CC
voltage accuracy, a 100nF capacitor (with an
ESR < 100mΩ) should be connected to CGND and
placed near the V
CC_
pin, and a 100nF or 220nF
capacitor (220nF is the best choice) with the same ESR
should be connected to CGND and placed near the
smart card reader’s C1 contact.
Fault Detection
The following fault conditions are monitored:
• Short-circuit or high current on V
CC_
• Removal of a card during a transaction
•VDDdropping
• Card voltage generator operating out of the specified
values (V
DDA
too low or current consumption too
high)
• Overheating
There are two different cases (Figure 6):
• CMDVCC High Outside a Card Session. Output
OFF_ is low if a card is not in the card reader and
high if a card is in the reader. The VDDsupply is monitored—a decrease in input voltage generates an
internal power-on reset pulse but does not affect the
OFF_ signal. Short-circuit and temperature detection
is disabled because the card is not powered up.
• CMDVCC Low Within a Card Session. Output OFF_
goes low when a fault condition is detected, and an
emergency deactivation is performed automatically
(Figure 7). When the system controller resets CMD-
VCC to high, it may sense the OFF_ level again after
completing the deactivation sequence. This distinguishes between a card extraction and a hardware
problem (OFF_ goes high again if a card is present).
Depending on the connector’s card-present switch
(normally closed or normally open) and the mechanical characteristics of the switch, bouncing can occur
on the PRES_ signals at card insertion or withdrawal.
The device has a debounce feature with an 8ms typical
duration (Figure 6). When a card is inserted, output
OFF_ goes high after the debounce time delay. When
the card is extracted, an automatic deactivation
sequence of the card is performed on the first true/false
transition on PRES_ and output OFF_ goes low.
Smart Card Interface
12 ______________________________________________________________________________________
DS8005
Smart Card Interface
______________________________________________________________________________________ 13
CMDVCC
Figure 4. Activation Sequence at t
3
Figure 5. Deactivation Sequence
V
CC_
I/O_
CLK_
RSTIN
RST_
I/OIN
CMDVCC
RST_
t
0t1
ATR
200ns
t
2
t3t
4
t5 = t
ACT
CLK_
I/O_
V
CC_
t
10
t
12
t
13
t
DE
t
14
t
15
DS8005
Smart Card Interface
14 ______________________________________________________________________________________
Figure 6. Behavior of PRES_, OFF_, CMDVCC, and V
CC_
Figure 7. Emergency Deactivation Sequence (Card Extraction)
PRES_
OFF_
CMDVCC
DEBOUNCE DEBOUNCE
V
CC_
DEACTIVATION CAUSED
BY CARD WITHDRAWAL
OFF_
PRES_
RST_
CLK_
I/O_
V
CC_
DEACTIVATION CAUSED
BY SHORT CIRCUIT
t
10
t
12
t
13
t
DE
t
14
t
15
DS8005
Smart Card Interface
______________________________________________________________________________________ 15
Stop Mode (Low-Power Mode)
A low-power state, stop mode, can be entered by forcing the CMDVCC, 5V/3V, and 1_8V input pins to a
logic-high state. Stop mode can only be entered when
the smart card interface is inactive. In stop mode, all
internal analog circuits are disabled. The OFF_ pin follows the status of the PRES_ pin. To exit stop mode,
change the state of one or more of the three control
pins to a logic-low. An internal 220µs (typ) power-up
delay and the 8ms PRES_ debounce delay are in effect
and OFF_ is asserted to allow the internal circuitry to
stabilize. This prevents smart card access from occurring after leaving stop mode. Figure 8 shows the control
sequence for entering and exiting stop mode. Note that
an in-progress deactivation sequence always finishes
before the device enters low-power stop mode.
Figure 8. Stop-Mode Sequence
DEACTIVATE INTERFACE
CMDVCC
1_8V
5V/3V
STOP MODE
ACTIVATE
STOP MODE
DEACTIVATE
STOP MODE
220μs DELAY
8ms DEBOUNCE
OFF_
OFF_ FOLLOWS
PRES IN STOP MODE
PRES_
V
CC_
OFF_ ASSERTED TO
WAIT FOR DELAY
DS8005
Smart Card Power Select
The device supports three smart card VCCvoltages:
1.8V, 3V, and 5V. The power select is controlled by the
1_8V and 5V/3V signals as shown in Table 3. The 1_8V
signal has priority over 5V/3V. When 1_8V is asserted
high, 1.8V is applied to VCCwhen the smart card is
active. When 1_8V is deasserted, 5V/3V dictates V
CC
power range. VCCis 5V if 5V/3V is asserted to a logichigh state, and V
CC
is 3V if 5V/3V is pulled to a
logic-low state. Care must be exercised when switching
from one V
CC
power selection to the other. If both 1_8V
and 5V/3V are high with CMDVCC high at the same
time, the device enters stop mode. To avoid accidental
entry into stop mode, the state of 1_8V and 5V/3V must
not be changed simultaneously. A minimum delay of
100ns should be observed between changing the
states of 1_8V and 5V/3V. See Figure 9 for the recommended sequence of changing the VCCrange.
Smart Card Interface
16 ______________________________________________________________________________________
Figure 9. Smart Card Power Select
Table 3. VCCSelect and Operation Mode
1_8V 5V/3V CMDVCC VCC SELECT (V) CARD INTERFACE STATUS
0 0 0 3 Activated
0 0 1 3 Inactivated
0 1 0 5 Activated
0 1 1 5 Inactivated
1 0 0 1.8 Activated
1 0 1 1.8 Inactivated
1 1 0 1.8 Reserved (Activated)
1 1 1 1.8 Not Applicable—Stop Mode
VCC SELECT STOP MODE1.8V 1.8V3V 3V5V
CMDVCC
1_8V
5V/3V
Switching A/B Interfaces
One of the device’s key features is the ability to manage two card slots at the same time. The multiplexing
control signal SEL_AB is used to determine which interface is active for communication, though it is possible
to leave both interfaces powered at the same time.
When switching between interfaces, the device preserves the state of control signals CLKDIV1, CLKDIV2,
1.8V, 5V/3V, CMDVCC, and RSTIN by latching the pin
states. This allows the now inactive interface to stay
powered while the other interface is activated for communication, and it also allows for fast switching
between card interfaces without the need for a card
deactivation and activation sequence. After switching
SEL_AB, the control signals CLKDIV1, CLKDIV2, 1.8V,
5V/3V, CMDVCC, and RSTIN must not be changed for
78µs while the device latches the state of the pins for
the inactive interface. After the control signals are
latched, a 42µs window is provided to change the control
inputs.
Note that the behavior of the OFF and OFF2 pins is
dependent on the SEL_AB pin. OFF always refers to
the active interface, and OFF2 always reports events
on the inactive interface. This allows the device to
monitor for card insertion and removal on both interfaces simultaneously. See Figure 10 for details on the
behavior of the SEL_AB, OFF, and OFF2 pins with
regard to card presence.
DS8005
Smart Card Interface
______________________________________________________________________________________ 17
Figure 10. Switching A/B Interfaces
1_8V, 5V/3V, CLKDIV1,
CLKDIV2, RST, I/O
SEL_AB
TRANSITION
SENSOR
DELAY
V
CCA
CLKA
RSTA, I/OA, GNDA
V
CCB
CLKB
RSTB, I/OB, GNDB
TRANSPARENT
LATCH A
ENA
TRANSPARENT
LATCH B
ENA
REG A
CLKA DIV
REG B
CLKB DIV
OFF
OFF2
1
0
1
0
SMART CARD
STATUS 1
SMART CARD
STATUS 2
DS8005
PRESA
PRESB
DS8005
Smart Card Interface
18 ______________________________________________________________________________________
Applications Information
Performance can be affected by the layout of the application. For example, an additional cross-capacitance of
1pF between card reader contacts C2 (RST_) and C3
(CLK_) or C2 (RST_) and C7 (I/O_) can cause contact
C2 to be polluted with high-frequency noise from C3 (or
C7). In this case, include a 100pF capacitor between
contacts C2 and CGND.
Application recommendations include the following:
• Ensure there is ample ground area around the device
and the connector; place the device very near to the
connector; decouple the VDDand V
DDA
lines separately. These lines are best positioned under the connector.
• The device and the host microcontroller must use the
same V
DD
supply. Pins CLKDIV1, CLKDIV2, RSTIN,
PRES_, I/OIN, 5V/3V, 1_8V, CMDVCC, and OFF are
referenced to VDD; if pin XTAL1 is to be driven by an
external clock, also reference this pin to VDD.
• Trace C3 (CLK) should be placed as far as possible
from the other traces.
• The trace connecting CGND to C5 (GND) should be
straight (the two capacitors on C1 (V
CC_
) should be
connected to this ground trace).
• Avoid ground loops between CGND and GND.
• Decouple V
DDA
and VDDseparately. If two supplies
are the same in the application, they should be connected in a star on the main trace
With all these layout precautions, noise should be kept to
an acceptable level and jitter on C3 (CLK_) should be
less than 100ps. Reference layouts are available on
request.
Technical Support
For technical support, go to https://support.maxim-
ic.com/micro.
DS8005
Smart Card Interface
______________________________________________________________________________________ 19
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
28 SO W28+1
21-0042
Typical Application Circuit
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the
package regardless of RoHS status.
MAXQ1103
ISO_DATA
GPIO
GPIO
GPIO
GPIO
GPIO
V
DD
V
DD
INTERFACE A
PRESA
INTERFACE B
PRESB
100nF
10μF
DDA2VDDA
PRES
V
CCA
RSTA
CLKA
I/OA
CGND
V
CCB
RSTB
CLKB
I/OB
PRESB
+3.3V
100kΩ
100nF* 220nF*
100nF* 220nF*
33pF
XTAL1 XTAL2 GND
CLKDIV1
CLKDIV2
5V/3V
...
1_8V
...
RSTIN
CMDVCC
I/OIN
SEL_AB
OFF
OFF2
33pF
+3.3V
100nF
V
DS8005
*PLACE A 100nF CAPACITOR CLOSE TO THE DS8005 AND PLACE A 220nF CAPACITOR CLOSE TO CARD CONTACT.
100kΩ
+3.3V
DS8005
Smart Card Interface
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
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