MAXIM DS4550 User Manual

General Description

The DS4550 is a 9-bit, nonvolatile (NV) I/O expander
with 64 bytes of NV user memory controlled by either
an I

2

C-compatible serial interface or an IEEE 1149.1
JTAG port. The DS4550 offers a digitally programmable
alternative to hardware jumpers and mechanical
switches that are being used to control digital logic
nodes. Each I/O pin is independently configurable. The
outputs are open drain with selectable pullups. Each
output has the ability to sink up to 16mA, and since the
device is NV, it powers up in the desired state allowing
it to control digital logic inputs immediately on power­up without having to wait for the host CPU to initiate
control.

Applications

RAM-Based FPGA Bank Switching for Multiple
Profiles

Selecting Between Boot Flash

Setting ASIC Configurations/Profiles

Servers

Network Storage

Routers

Telecom Equipment

PC Peripherals

Features

♦ Programmable Replacement for Mechanical

Jumpers and Switches

♦ Nine NV Inputs/Outputs

♦ 64-Byte NV User Memory (EEPROM)

♦ I2C-Compatible Serial Interface and JTAG

♦ Up to 8 Devices can be Multidropped on the Same

I2C Bus

♦ IEEE 1149.1 Boundary Scan Compliant

♦ Open-Drain Outputs with Configurable Pullups

♦ Outputs Capable of Sinking 16mA

♦ Low Power Consumption

♦ Wide Operating Voltage Range: 2.7V to 5.5V

♦ Operating Temperature Range: -40°C to +85°C

DS4550

I2C and JTAG Nonvolatile 9-Bit I/O

Expander Plus Memory

______________________________________________ Maxim Integrated Products 1

20

19

18

17

16

15

14

13

1

2

3

4

5

6

7

8

GND

I/O_8

I/O_7

I/O_6I/O_3

I/O_2

I/O_1

I/O_0

TOP VIEW

I/O_5

A2

TDO

TDITCK

A1

A0

I/O_4

12

11

9

10

SCL

SDAV

CC

TMS

TSSOP

DS4550

V

CC

FPGA

CLOCK
GENERATOR

CPU SPEED
SELECT

A0
A1
A2
GND

0.1μF

V

CC

4.7k

I

2

C

INTERFACE

JTAG

INTERFACE

DS4550

SCL

SDA
TCK
TMS
TDI
TDO

I/O_0
I/O_1
I/O_2
I/O_3
I/O_4

I/O_5
I/O_6
I/O_7
I/O_8

Pin Configuration

Typical Operating Circuit

Rev 0; 9/04

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Ordering Information

PART TEMP RANGE PIN-PACKAGE

DS4550E -40°C to +85°C 20 TSSOP

Add “/T&R” for tape and reel orders.

DS4550

I2C and JTAG Nonvolatile 9-Bit I/O
Expander Plus Memory

2 _____________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

RECOMMENDED OPERATING CONDITIONS

(TA= -40°C to +85°C)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

Voltage on VCC, SDA, and SCL Pins

Relative to Ground.............................................-0.5V to +6.0V

Voltage on A0, A1, A2, TCK, TMS, TDI, and I/O_n [n = 0 to 8]

Relative to Ground...................................-0.5V to V

CC

+ 0.5V,

not to exceed +6.0V.

Operating Temperature Range ...........................-40°C to +85°C

EEPROM Programming Temperature Range .........0°C to +70°C

Storage Temperature Range .............................-55°C to +125°C

Soldering Temperature .....................See IPC/JEDEC J-STD-020

Specification

PARAMETER

CONDITIONS

UNITS

Supply Voltage V

CC

(Note 1)

V

Input Logic 1 V

IH

0.7 x

V

CC

+

0.3

V

Input Logic 0 V

IL

0.3 x
V

DC ELECTRICAL CHARACTERISTICS

(VCC= +2.7V to +5.5V, TA= -40°C to +85°C, unless otherwise noted.)

PARAMETER

CONDITIONS

Standby Current I

STBY

(Note 2) 2 10 µA

Input Leakage I

L

µA

Input Current each I/O pin I

I/O

0.4 < V

I/O

< 0.9 x V

CC

µA

3mA sink current 0.4

Low-Level Output Voltage (SDA)

6mA sink current 0.6

V

I/O Pins Low-Level Output
Voltage

V

OL I/O

16mA sink current 0.4 V

Low-Level Output Voltage (TDO)

4mA sink current 0.4 V

High-Level Output Voltage (TDO)

1mA source current 2.4 V

I/O Pin Pullup Resistors R

PU

4.0 5.5 7.5 kΩ

TMS, TDI Pullup Resistors R

JPU

7.5 10

kΩ

I/O Capacitance C

I/O

(Note 3) 10 pF

Power-On Reset Voltage V

POR

1.6 V

SYMBOL

MIN TYP MAX

+2.7 +5.5

V

CC

-0.3

SYMBOL

V

OL SDA

V

OL TDO

V

OH TDO

MIN TYP MAX UNITS

-1.0 +1.0

-1.0 +1.0

V

CC

12.5

DS4550

I2C and JTAG Nonvolatile 9-Bit I/O

Expander Plus Memory

_____________________________________________________________________ 3

AC ELECTRICAL CHARACTERISTICS-–I2C Interface (See Figure 5)

(VCC= +2.7V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Timing referenced to V

IL(MAX)

and V

IH(MIN)

.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

SCL Clock Frequency f

SCL

(Note 4) 0

kHz

Bus Free Time Between Stop and
Start Conditions

t

BUF

1.3 µs

Hold Time (Repeated) Start
Condition

(Note 5) 0.6 µs

Low Period of SCL t

LOW

1.3 µs

High Period of SCL t

HIGH

0.6 µs

Data Hold Time

0 0.9 µs

Data Setup Time

100 ns

Start Setup Time t

SU:STA

0.6 µs

SDA and SCL Rise Time t

R

(Note 6)

20 +

ns

SDA and SCL Fall Time t

F

(Note 6)

20 +

ns

Stop Setup Time

0.6 µs

SDA and SCL Capacitive
Loading

C

B

(Note 6)

pF

EEPROM Write Time t

WR

I2C EEPROM write (Note 7) 10 20 ms

AC ELECTRICAL CHARACTERISTICSJTAG Interface (See Figure 1)

(VCC= +2.7V to +5.5V, TA= -40°C to +85°C, unless otherwise noted.)

PARAMETER

CONDITIONS

UNITS

TCK Clock Period t

1

ns

TCK Clock High/Low Time t2, t

3

(Note 8) 50

ns

TCK to TDI, TMS Setup Time t

4

15 ns

TCK to TDI, TMS Hold Time t

5

10 ns

TCK to TDO Delay t

6

50 ns

TCK to TDO High-Z Delay t

7

50 ns

EEPROM Write Time t

WR

JTAG EEPROM write (Note 9) 10 20 ms

t

HD:STA

t

HD:DAT

t

SU:DAT

400

0.1C

0.1C

t

SU:STO

SYMBOL

MIN TYP MAX

B

B

1000

500

300

300

400

DS4550

I2C and JTAG Nonvolatile 9-Bit I/O
Expander Plus Memory

4 _____________________________________________________________________

NONVOLATILE MEMORY CHARACTERISTICS

(VCC= +2.7V to +5.5V, unless otherwise noted.)

PARAMETER

CONDITIONS

UNITS

EEPROM Writes +70°C (Note 3)

Note 1: All voltages referenced to ground.
Note 2: I

STBY

is specified with SDA = SCL = TMS = TDI = VCC, outputs floating, and inputs connected to VCCor GND.

Note 3: Guaranteed by design.
Note 4: Timing shown is for fast-mode (400kHz) operation. This device is also backward-compatible with I

2

C standard mode timing.

Note 5: After this period, the first clock pulse is generated.
Note 6: C

B

total capacitance of one bus line in picofarads.

Note 7: EEPROM write time applies to all the EEPROM memory and SRAM-shadowed EEPROM memory when SEE = 0. The

EEPROM write time begins after a stop condition occurs.

Note 8: TCK can be stopped either high or low.
Note 9: EEPROM write begins immediately after the UPDATE-DR state that latches the data to be written. The EEPROM cannot be

accessed until the EEPROM write has completed. However, the remainder of the JTAG functionality is active and accessi­ble during the EEPROM write.

TCK

t

1

t

2

t

3

t

4

t

5

t

6

t

7

TDI, TMS

TDO

Figure 1. JTAG Timing Diagram

SYMBOL

MIN TYP MAX

50,000

DS4550

I2C and JTAG Nonvolatile 9-Bit I/O

Expander Plus Memory

_____________________________________________________________________ 5

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

DS4550 toc01

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (µA)

54.543.53

0.5

1

1.5

2

0

2.5 5.5

I/O0-I/O7 CONTROL BITS = 0
I/O0-I/O7 PULLUPS DISABLED
V

CC

= SDA = SCL = TCK

SUPPLY CURRENT

vs. TEMPERATURE

DS4550 toc02

TEMPERATURE (°C)

SUPPLY CURRENT (µA)

806040200-20

0.5

1

1.5

2

2.5

0

-40

V

CC

= SDA = SCL = 5.5V = TCK

V

CC

= SDA = SCL = 2.7V = TCK

I/O0-I/O7 CONTROL BITS = 0
I/O0-I/O7 PULLUPS DISABLED

SUPPLY CURRENT

vs. SCL FREQUENCY

DS4550 toc03

SCL FREQUENCY (kHz)

SUPPLY CURRENT (µA)

300200100

2

4

6

8

10

12

14

16

18

20

0

0400

V

CC

= SDA = TCK = 5.0V

V

CC

= SDA = TCK = 2.7V

SUPPLY CURRENT

vs. TCK FREQUENCY

DS4550 toc04

TCK FREQUENCY (kHz)

SUPPLY CURRENT (µA)

1750150012501000750500250

5

10

15

20

25

0

02000

V

CC

= 5.0V

V

CC

= 2.7V

SDA = SCL = V

CC

I/O OUTPUT VOLTAGE

vs. SUPPLY VOLTAGE

DS4550 toc05

SUPPLY VOLTAGE (V)

I/O OUTPUT VOLTAGE (V)

54321

1

2

3

4

5

0

0

PULL-UPS ENABLED
PULL-DOWNS DISABLED

HIGH IMPEDANCE

EEPROM RECALL AT V

POR

Typical Operating Characteristics

(VCC= +5.0V, TA= +25°C; TDI, TDO, TMS pins are no connects, unless otherwise noted.)

DS4550

I2C and JTAG Nonvolatile 9-Bit I/O
Expander Plus Memory

6 _____________________________________________________________________

Pin Description

PIN NAME FUNCTION

1 I/O_0 Input/Output 0. Bidirectional I/O pin.

2 I/O_1 Input/Output 1. Bidirectional I/O pin.

3 I/O_2 Input/Output 2. Bidirectional I/O pin.

4 I/O_3 Input/Output 3. Bidirectional I/O pin.

5 I/O_4 Input/Output 4. Bidirectional I/O pin.

6A0I

2

C Address Input. Inputs A0, A1, and A2 determine the I2C slave address of the device.

7A1I

2

C Address Input. Inputs A0, A1, and A2 determine the I2C slave address of the device.

8 TCK

JTAG Test Clock. This signal is used to shift data into TDI on the rising edge and out of TDO on the
falling edge.

9 TMS

JTAG Test Mode Select. This pin is sampled on the rising edge of TCK and used to place the TAP
into the various defined JTAG states. This pin has an internal pullup resistor.

10 V

CC

Power Supply Voltage

11 SDA I2C Serial Data Open-Drain Input/Output

12 SCL I2C Serial Clock Input

13 TDI

JTAG Test Data Input. Test instructions and data are clocked into this pin on the rising edge of TCK.
This pin has an internal pullup resistor.

14 TDO

JTAG Test Data Output. Test instructions and data are clocked out of this pin on the falling edge of
TCK. If not used, this pin should be left open circuit.

15 A2 I2C Address Input. Inputs A0, A1, and A2 determine the I2C slave address of the device.

16 I/O_5 Input/Output 5. Bidirectional I/O pin.

17 I/O_6 Input/Output 6. Bidirectional I/O pin.

18 I/O_7 Input/Output 7. Bidirectional I/O pin.

19 I/O_8 Input/Output 8. Bidirectional I/O pin.

20 GND Ground