General Description
The DS4302 is a 5-bit digital-to-analog converter (DAC)
with three programmable digital outputs. The DS4302
communicates through a 2-wire, SMBus™-compatible,
serial interface. The tiny 8-pin µSOP package is ideal
for use in space-constrained applications.
Applications
CCFL Backlight Brightness Control
Power-Supply Calibration
Features
♦ SO Package is a Drop-In Replacement for the
MPS1251 and MPS1252
♦ Single 5-Bit DAC (32 Steps)
♦ 0V to 2V and 0V to 1.9V Versions
♦ Three Programmable Digital Outputs
♦ SMBus-Compatible Serial Interface
♦ 4.5V to 5.5V Supply Voltage Range
♦ 8-Pin SO and 8-Pin µSOP Packages
♦ Industrial Temperature Range: -40°C to +85°C
DS4302
2-Wire, 5-Bit DAC with Three Digital Outputs
______________________________________________ Maxim Integrated Products 1
TOP VIEW
P1
P2GND
1
2
87V
CC
P0SDA
V
OUT
SCL
SO/µSOP
3
4
6
5
DS4302
Pin Configuration
Ordering Information
Rev 1; 6/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Add “/T&R” for tape-and-reel orders.
*Contact factory for availability.
SMBus is a trademark of Intel Corp.
PART
V
OUT
RANGE
TOP
BRAND
PIN-
FUNCTION
1 SCL Serial Clock Input. 2-wire clock input.
2 SDA
Serial Data Input/Output. Bidirectional,
2-wire data pin.
3V
OUT
DAC Output Voltage
4 GND Ground
5P2
6P1
7P0
Programmable Digital Output
8VCCPower-Supply Input
查询DS4302供应商
0V to 2.0V
0V to 1.9V
0V to 2.0V
0V to 1.9V
NAME
DS4302
2-Wire, 5-Bit DAC with Three Digital Outputs
2 _____________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED DC OPERATING CONDITIONS
(TA= -40°C to +85°C)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VCC, SDA, and SCL Pins
Relative to Ground.............................................-0.5V to +6.0V
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-55°C to +125°C
Soldering Temperature.....See IPC/JEDEC J-STD-020A Specification
Supply Voltage V
CC
(Note 1) 4.5 5.5 V
Input Logic 1 (SDA, SCL) V
IH
2.0
V
Input Logic 0 (SDA, SCL) V
IL
DC ELECTRICAL CHARACTERISTICS
(VCC= +4.5V to 5.5V, TA= -40°C to +85°C.)
X = Don’t care.
SYMBOL
Standby Current I
Input Leakage I
SDA Low-Level Output Voltage V
P0, P1, P2 Low-Level Output
Voltage
P0, P1, P2 High-Level Output
Voltage
V
OUT
V
OUT
V
OUT
V
OUT
Power-On Reset 1.7 V
Settling Time 10 µs
D/A Output Levels 32 steps
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
STBY
OL1
V
OL2
V
OH
Maximum Level (-020) VCC = 5.0V, Data = 00000XXX (Note 3) 1.925 2.0 2.075 V
Minimum Level (-020) VCC = 5.0V, Data = 11111XXX 0.0 0.05 0.1 V
Maximum Level (-019) VCC = 5.0V, Data = 00000XXX (Note 3) 1.825 1.9 1.975 V
Minimum Level (-019) VCC = 5.0V, Data = 11111XXX 0.0 0.05 0.1 V
(Notes 2, 3) 200 300 µA
(Note 4) -1.0 +1.0 µA
L
3mA sink current 0.0 0.4
6mA sink current 0.0 0.6
(Note 1)
4mA sink
(Note 1)
4mA source
MIN TYP MAX
V
+ 0.3
CC
GND - 0.3
+0.4V V
- 0.4V V
V
CC
V
DS4302
2-Wire, 5-Bit DAC with Three Digital Outputs
_____________________________________________________________________ 3
SCL Clock Frequency f
SCL
0 400 kHz
Bus Free Time Between STOP
and START Conditions
t
BUF
1.3 µs
Low Period of SCL t
LOW
1.3 µs
High Period of SCL t
HIGH
0.6 µs
Data Hold Time
100 ns
Start Setup Time t
SU:STA
0.6 µs
SDA and SCL Rise Time t
R
(Note 5)
300 ns
SDA and SCL Fall Time t
F
(Note 5)
0.6 µs
SDA and SCL Capacitive
Loading
C
B
(Note 5) 400 pF
AC ELECTRICAL CHARACTERISTICS (Figure 3)
(VCC= +4.5V to 5.5V, TA= -40°C to +85°C, timing referenced to V
IL(MAX)
and V
IH(MIN)
.)
Note 1: All voltages referenced to ground.
Note 2: I
STBY
specified for the inactive state measured with SDA = SCL = VCCand with V
OUT
, P0, P1, and P2 floating.
Note 3: No load on V
OUT
.
Note 4: The DS4302 will not obstruct the SDA and SCL lines if V
CC
is switched off as long as the voltages applied to these inputs
does not violate their min and max input-voltage levels.
Note 5: C
B
—total capacitance of one bus line in picofarads.
t
HD:DAT
t
SU:DAT
t
SU:STO
20 + 0.1C
20 + 0.1C
B
B