MAXIM DS2792 Technical data

www.maxim-ic.com
The DS2792 provides a user-programmable fuel gauge solution for Li-Ion and NiMH chemistry battery packs. A low-power, 16-bit MAXQ20 microcontroller with generous program and data memory, combined with an accurate measurement system for battery current, voltage, and temperature provide the ideal platform for customized fuel-gauge algorithms. EEPROM data memory supports nonvolatile (NV) in-pack storage of charge parameters, cell characteristics, usage history, and manufacturing/lot tracking data.
APPLICATIONS
Digital Video Cameras SLR Digital Still Cameras Subnotebook PCs and Ultra-Portable PCs Industrial PDAs, Handheld Computers, and GPS
FUNCTIONAL DIAGRAM
MAXQ is a registered trademark of Maxim Integrated Products, Inc.
DS2792
Programmable Fuel Gauge
with UART Interface
FEATURES
Accurate Current Measurement for Coulomb
Counting (Current Accumulation)
1.5% ±4µV Over ±64mV Input Range
1.5% ±267µA Over ±4.2A Range Using an External 15mΩ Series Resistor
High-Resolution Current Reporting
12-Bit + Sign Average Every 0.88ms 15-Bit + Sign Average Every 2.8s
Three Voltage Measurement Sources
10-Bit Average from VIN1, VIN2–VIN1, and Vx
Inputs
Temperature Measurement
10-Bit Using On-Chip Sensor Ratiometric Input for External Thermistor (Vx)
16-Bit MAXQ20 Low-Power Microcontroller
Efficient C-Language Programming 8k Words Total Program Memory:
4k Words EEPROM Program Memory 4k Words ROM Program Memory
64 Words Data EEPROM 256 Words Data RAM Password-Protected Programming
On-Chip, Low Drop-Out Regulator
2.5V to 10V Operating Range
SHA-1 Hash Algorithm in ROM 19.2kbps UART Interface Internal Oscillator: No Crystal Required Low-Power Consumption
1.5mA CPU Mode (1MHz), 145µA ANALOG Mode, 50µA SLEEP Mode
ORDERING INFORMATION
PART TEMP RANGE PIN-PACKAGE
DS2792G+ -20ºC to +70ºC TDFN-28
+ Denotes lead-free package. Contact factory concerning Mask ROM devices.
Pin Configuration appears at end of data sheet.
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata
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DS2792 Programmable Fuel Gauge with UART Interface
ABSOLUTE MAXIMUM RATINGS
VDD, VIN2 to VSS.......................................................................................................................................-0.3V to +12V
P0.4, P0.5 to V AV
to VSS..............................................................................................................................................-0.3V to +0.3V
SS
All Other Pins to V
................................................................................................................................-0.3V to VB +0.3V
SS
..................................................................................................................................-0.3V to +6V
SS
TXD, P0.0–P0.5 Continous Sink Current ...............................................................................20mA Each, 50mA Total
Operating Temperature Range.............................................................................................................. -40ºC to +85ºC
Storage Temperature Range ...............................................................................................................-55ºC to +125ºC
Soldering Temperature ................................................................................See IPC/JEDEC J-STD-020 Specification
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyone those indicated in the operational sections of the specifications is not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device.
RECOMMENDED DC OPERATING CHARACTERISTICS
(VDD = 2.5V to 10V, TA = -20°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C, VDD = 5.0V.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Voltage VDD (Note 1) +2.5 +10 V Voltage Range: VIN1, TXD, RXD, P0.0–P0.3, SNS1, SNS2
Voltage Range: P0.4–P0.5 (Note 1) -0.3 VB + 0.3 V
(Note 1) -0.3 5.5 V
Voltage Range: VIN2 (Note 1) -0.3 +10 V
Voltage Range: Vx (Note 1) -0.3 VB + 0.3 V
> 3.5V, IO = 2mA,
V
Output Voltage: VB V
VB
DD
(Note 1)
3.0 3.3 3.6 V
ELECTRICAL CHARACTERISTICS
(VDD = 2.5V to 10V, TA = -20°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C, VDD = 5.0V.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
I
SLEEP
I
SUSP
Supply Current
I
ANALOG
I
CPU
Power-On Reset Threshold V
RESET
Brownout Threshold VBO (Note 10) 2.0 2.2 2.4 V
Regulator Drop-Out V
Current Measurement Input Range Current Measurement Resolution I
Current Measurement Gain Error I
Current Measurement Offset Error I
DO:VB
I
FS
LSB
GERR
OERR
Accumulated Current Range qFS -204.8 +204.8 mVh/R Accumulated Current Resolution q
LSB
Accumulated Current Offset qCA
Temperature Measurement Range Temperature Measurement LSb T Temperature Measrement Error T
T
FS
LSB
ERR
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SLEEP mode (Note 2) SUSPEND mode (Note 3) ANALOG mode (Note 4) CPU mode (Note 5)
25 50
25 50
110 145
μA
μA
μA
0.8 1.5 mA
1.0 1.6 2.2 V
= 2.5V,
V
DD
V
= 2.0mA, (Note 6)
I
VB
-64 +64 mV
IS1–VIS2
15.625 0oC TA +50oC -0.5 +0.5
-1 +1
-7.8 +7.8
6.25 OBEN = 1 -94 0 OBEN = 1,
= 0.015
R
SNS
-40 +85 oC
0.125
-3 +3
0.15 V
μV/R
SNS
% Full
Scale
μV/R
SNS
SNS
μVh/R
SNS
μVh/Day
-6.3 0 mAh/Day
oC
o
C
DS2792 Programmable Fuel Gauge with UART Interface
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
VIN1 Input Range (VIN1–VSS) V VIN1 LSb V VIN2 Input Range (VIN2–VIN1) V VIN2 LSb V VIN1, VIN2 Gain Error V VIN1, VIN2 Offset V Vx Input Range (Vx–VSS) V Vx LSb V
Vx Error V
VIN1, VIN2, Vx Input Resistance Current Measurement Sample Frequency Analog System Clock Frequency f
(Notes 1, 7) 0 4.99 V
FS1
4.88 mV
LSB1
(Notes 1, 7) 0 4.99 V
FS2
4.88 mV
LSB2
-1 +1 %
GERR
-1 +1 LSb
OERR
(Note 1) 0 VB V
FSX
VB/1024 —
LSBX
-1 +1
ERRX
15 M
R
IN
f
(Note 8) 1456 Hz
SAMPLE
69.9 kHz
OSCA
VDD > 2.7V, TA = +25oC -0.7 +0.7
Analog System Clock Error f
ERR:OSCA
VDD > 2.7V,
o
0
C TA +50oC
-2 +2
-5 +5
OSCA active 1
CPU System Clock Startup Time t
CPU System Clock Frequency f
CPU System Clock Error f
Suspend Period Error t Filter Resistors IS1 to SNS1, IS2 to SNS2 Input Logic High: RXD V Input Logic Low: RXD V Input Logic High: P0.0–P0.5 V Input Logic Low: P0.0–P0.5 V
SU:OSCI
OSCI
ERR:OSCI
ERR:SUS
R
KS
IH:RXD
IL:RXD
IH:P0
IL:P0
From SLEEP, OSCA inactive OSCA inactive 1000 kHz OSCA active 14 x f OSCA inactive -20 +20 OSCA active f
700
kHz
OSCA
ERR:OSCA
-30 +30 %
7 10 13 k
(Note 1) 1.5 V (Note 1) 0.6 V
(Note 1) 0.7 x VB V
(Note 1) 0.3 x VB V
Output Logic Low: TXD, P0.X VOL IOL = 4mA (Note 1) 0.4 V
= VIH,
V
P0.0–P0.3 Weak Pullup Current
I
PU:P0
Output Logic High: P0.4–P0.5 VOH
RXD, TXD Pulldown Current I
RXD, TXD Pullup Current V
RXD, TXD Capacitance C
RXD Pulse Rejection t
P0.0–P0.5 Pulse Rejection t
PD:UART
PU:UART
UART
SP:UART
SP:P0
Rising and falling edges 10 ns
PIN
V
> 2.7V
DD
0.15 22.0
Bits PPU:0,1,2,3 set
= 1mA
I
PIN
Bits PPU:4,5 set
PIN = V
V Bits PPU:6,7 clear
PIN = V
V Bits PPU:6,7 set
,
IL
,
IL
- 0.4 V
V
B
0.3 1.2 3
0.3 1.2 3
50 pF
Rising and falling edges (Note 9)
50 ns
EEPROM RELIABILITY SPECIFICATION
(VDD = 2.5V to 10V, TA = -20°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C, VDD = 5.0V.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
% Full
Scale
%
μS
%
μA
μA
μA
EEPROM Copy Time t
EEPROM Copy Endurance N
10 15 ms
EEC
TA = +50°C 50,000 Cycles
EEC
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DS2792 Programmable Fuel Gauge with UART Interface
ELECTRICAL CHARACTERISTICS: JTAG INTERFACE
(VDD = 2.5V to 10V, TA = -20°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C, VDD = 5.0V.) (See Figure 1.)
JTAG Logic Reference V
TCK High Time tTH 4.0 µs
TCK Low Time tTL 4.0 µs
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
(Note 1) VB ÷ 2 V
REF
TCK Low to TDO Output t
TMS, TDI Input Setup to TCK High
TMS, TDI Input Hold after TCK High
1.0 µs
TLQ
1.0 µs
t
DVTH
t
4.0 µs
THDX
Note 1: All voltages referenced to V Note 2: Internal voltage regulator remains active in SLEEP mode. RAM and registers are powered to maintain contents. RXD and
Note 3: Internal voltage regulator and suspend timer are active in SUSPEND mode. RAM and registers are powered to maintain Note 4: Internal voltage regulator and ADC are active in ANALOG mode. RAM and registers are powered to maintain contents. ADC data Note 5: MAXQ core fetches and executes instructions in CPU mode.
Note 6: Parameters guaranteed by design. Note 7: Voltage A/D readings saturate at 4.85V. Note 8: f Note 9: The filter on RXD suppresses noise spikes at the input buffers and delays the sampling instant. Note 10: V
internal interrupts can be armed by firmware.
contents.
is collected and updated to registers including current accumulation to ACR register.
= 48 × f
OSCA
and VBO will never overlap.
RESET
SAMPLE
.
.
SS
Figure 1. JTAG Timing Diagram
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PIN DESCRIPTION
PIN NAME FUNCTION
1, 7–10,
21, 25,
26, 28
2 VIN2
3 VIN1
4 Vx
5 TXD Serial Interface Data Transmit. Maximum of 19200bps. 6 RXD Serial Interface Data Recieve. Maximum of 19200bps.
11 P0.0
12 P0.1
13 SNS2
14 IS2
15 IS1
16 SNS1
17 AVSS
18 VSS
19 P0.2
20 P0.3
22 P0.4 Programmable I/O Pin. Alternate function: [JTAG TDO]
23 P0.5
24 VB
27 VDD
— PAD
N.C.
DS2792 Programmable Fuel Gauge with UART Interface
No Connection Battery Voltage Sense Input 2. Voltage measurement on VIN2 is
relative to VIN1.
Battery Voltage Sense Input 1. Voltage measurement on VIN1 is
relative to AV
SS
.
Auxiliary ADC Input. Voltage measured ratiometrically with respect
to V
pin voltage or absolutely with respect to internal reference.
B
Programmable I/O Pin. Alternate functions: external interrupt input
INT0, [JTAG TDI].
Programmable I/O Pin. Alternate functions: external interrupt input
INT1, [JTAG TMS].
Current-Sense Input. SNS2 attaches to the pack end of current-
sense resistor.
Current Filter Input 2 Current Filter Input 1
Current-Sense Input. SNS1 attaches to the battery end of current-
sense resistor and V
Analog Supply Return Node. AV
SS
.
attaches to negative battery
SS
terminal.
Digital Supply Return Node. V
attaches to negative battery
SS
terminal.
Programmable I/O Pin. Alternate functions: reset input pin RST. Programmable I/O Pin. Alternate functions: timer/counter input pin
TCK, [JTAG TCK].
Programmable I/O Pin Bias Supply Output. Internally regulated to 3.3V. Bypass V
to V
B
SS
with 0.1µF.
Input Supply. +2.5V to +10.0V input range. Bypass V
to VSS with
DD
0.1μF.
Exposed PAD. Not electrically connected to IC. Connect to V
SS
or
leave floating.
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FUNCTIONAL DIAGRAM
DS2792 Programmable Fuel Gauge with UART Interface
PRECISION
ANALOG
OSCILLATOR
SUSPEND
TIMER
TTCK0:1
CLK DIV
P0.3
TIMER/
COUNTER
WATCHDOG
TIMER
VDD
LDO
Regulator
VB VDD_INT
VSS
VSS_INT
TCI
WDI
A/D
CONTROL
BOI, VI, CI, TI
INTERRUPT
CONTROLLER
MAXQ20
16-BIT RISC
CORE
INSTRUCTION
OSCILLATOR
(1MHz)
JTAG
BOOTLOAD
AND DEBUG
INTERFACE
VOLTAGE1
(VIN1 - AVSS)
VOLTAGE2
(VIN2 - VIN1)
AUX VOLTAGE
(VX - AVSS)
SCI, SDI
INT0, INT1
CURRENT
(IS1 - IS2)
AVG CURRENT
TEMPERATURE
ANALOG REGISTERS
UART
INTERFACE
AND
BOOTLOADER
REGISTER FILE
DP[0]
DP[1]
BP[Offs]
256 X 16 SRAM
(DATA)
4K X 16 ROM
(UTILITY)
4K X 16
EEPROM
(PROGRAM)
64 X 16
EEPROM
(DATA)
Tx
Rx
ANALOG
FRONT
END
ADC / MUX
VREF
PORT
PIN
DRIVERS
EEPROM CHARGE
PUMP
VIN1 VIN2 VX
SNS1
IS1 IS2
SNS2
AVSS
P0.0/INT0/TDI
P0.1/INT1/TMS
P0.2/RST
P0.3/TCK
P0.4/TDO
P0.5
TXD
RXD
P0.3/TCK
P0.1/TMS
P0.0/TDI
P0.4/TDO
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DS2792 Programmable Fuel Gauge with UART Interface
TYPICAL OPERATING CIRCUIT
In Figure 2, the DS2792 is connected to the battery side of the pack protector. VDD is isolated with a 150 resistor. Both V
and the internally regulated voltage VB have 0.1µF bypass capacitors. The VIN1 and VIN2 pins sample
DD
the voltage of each cell. Current flow through the cell pack is monitored by measuring the voltage drop across the sense resistor R
. Cell temperature is measured ratiometrically through the general-purpose voltage input Vx.
SNS
The GPIO pin P0.5 gates the thermistor circuit to limit current flow between measurements. The UART signals RXD and TXD are combined into a single 3.3V bidirectional I/O line. The I/O circuit causes no extra current drain when idle.
Figure 2. Example Pack Circuit with Regulated I/O
PACK+
15010K
1K
1K
AT103-2
VIN2
VDD
Vx
VIN1
0.1µF0.1µF
VB
[P0.0-P0.4]
TxD
BSS84
100
1K
1K
100
2N3906
DS2792
VSS, AVSS
SNS1
R
SNS
P0.5
SNS2
IS1
RxD
IS2
0.1µF
2N2222
1K 1K
100 100
DATA
100
2N2222
1K
PACK-
2-Cell Protection
IC
DETAILED DESCRIPTION
The following is an introduction to the primary features of the DS2792 programmable 2-cell Li-Ion fuel gauge. More detailed descriptions of the device features can be found in the errata sheets and user's guides described later in
the Additional Documentation section.
DS2792 Overview
The DS2792 incorporates the 16-bit MAXQ20 microcontroller core with 16 accumulators and 16-level hardware stack. Four memory blocks provide application code space, utility code space, RAM memory, and EEPROM memory. Specialized peripherals are integrated to perform battery monitoring, coulomb counting, and UART communication functions. The MAXQ20 core along with the specialized peripherals provide a flexible solution for fuel gauging of Li-Ion or NiMH battery packs. Flexibility is further enhanced as the solution allows for upgrading of
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DS2792 Programmable Fuel Gauge with UART Interface
the program and data EEPROM contents over the UART interface. Updates to the program and data EEPROM are protected against unauthorized writes by a 256-bit user password. A read protection bit is provided to prevent
reading either EEPROM.
MAXQ20 Core Architecture
The DS2792 employs a MAXQ20 low-cost, high-performance, CMOS, fully static, 16-bit RISC microcontroller with EEPROM memory. Fetch and execution operations are completed in one cycle without pipelining, since the instruction contains both the op code and data. The highly efficient core is supported by 16 accumulators and a 16­level hardware stack, enabling fast subroutine calling and task switching. Data can be quickly and efficiently manipulated with three internal data pointers. Multiple data pointers allow more than one function to access data memory without having to save and restore data pointers each time. The data pointers can automatically increment or decrement following an operation, eliminating the need for software intervention.
Instruction Set
The instruction set is composed of fixed-length, 16-bit instructions that operate on registers and memory locations. The instruction set is highly orthogonal, allowing arithmetic and logical operations to use any register along with the accumulator. Special-function registers control the peripherals and are subdivided into register modules. The family architecture is modular, so that new devices and modules can reuse code developed for existing products.
The architecture is transport-triggered. This means that writes or reads from certain register locations can also cause side effects to occur. These side effects form the basis for higher level op codes, such as ADDC, OR, JUMP, etc. The op codes are implemented as MOVE instructions between register locations, while the assembler handles the encoding, which need not be a concern to the programmer. The 16-bit instruction word is designed for efficient execution.
Bit 15 indicates the format for the source field of the instruction. Bits 0 to 7 of the instruction represent the source for the transfer. Depending on the value of the format field, this can either be an immediate value or a source register. If this field represents a register, the lower four bits contain the module specifier and the upper four bits contain the register index in that module.
Bits 8 to 14 represent the destination for the transfer. This value always represents a destination register, with the lower four bits containing the module specifier and the upper three bits containing the register subindex within that module. Any time that it is necessary to directly select one of the upper 24 registers as a destination, the prefix register PFX is needed to supply the extra destination bits. This prefix register write is inserted automatically by the
assembler and requires only one additional execution cycle. Refer to the MAXQ Family User's Guide for complete
instruction set information.
Memory Organization
The DS2792 incorporates several memory areas:
4k Words of utility ROM contain a debugger, program loader, and SHA-1 routines 4k Words of EEPROM memory for application program storage 256 Words of SRAM for storage of temporary variables 64 Words of EEPROM memory for data storage 10 Words of ADC conversion data information 16-level stack memory for storage of program return addresses and general-purpose use
The memory is implemented using the Harvard architecture, with separate address spaces for program and data memory. A pseudo-Von Neumann memory map is also utilized placing ROM, application code, and data memory into a single contiguous memory map. The pseudo-Von Neuman memory map allows data memory to be mapped into program space, permitting code execution from data memory. In addition, program memory can be mapped into data space, permitting code constants to be accessed as data memory. Figure 3 shows the DS2792’s memory
map when executing from program memory space. Refer to the MAXQ Family User's Guide: DS2792 Supplement
for memory map information when executing from data or ROM space.
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DS2792 Programmable Fuel Gauge with UART Interface
The incorporation of EEPROM memory allows field upgrade of the firmware. EEPROM memory can be password protected with a 16-word key, denying access to program memory by unauthorized individuals. ROM memory is also available for high-volume, low-cost applications. Contact Dallas Semiconductor for more information on the availability of ROM-based devices.
Figure 3. DS2792 Memory Map
SYSTEM
REGISTERS
8h
9h
Bh
Ch
Dh
Eh
Fh
00h 0Fh
0h
1h
2h
00h 1Fh
AP
A
PFX
IP
SP
DPC
DP
PERIPHERAL
REGISTERS
M0
M1
M2
16 × 16 STACK
FFFFh
8FFFh
8000h
0FFFh
0000h
PROGRAM
MEMORY SPACE
4K × 16
UTILITY ROM
4K × 16
USER PROGRAM
MEMORY
FFFFh
9FFFh
8000h
027Fh
0200h
01FFh
0000h
DATA MEMORY
(BYTE MODE)
8K × 8
UTILITY ROM
128 × 8
EEPROM DATA
512 × 8
SRAM DATA
FFFFh
8FFFh
8000h
600Ah
6000h
013Fh
0100h
00FFh
0000h
DATA MEMORY
(WORD MODE)
4K × 16
UTILITY ROM
11 × 16
ADC DATA
64 × 16
EEPROM DATA
256 × 16
SRAM DATA
Stack Memory
A 16-bit, 16-level internal stack provides storage for program return addresses and general-purpose use. The stack is used automatically when the CALL, RET, and RETI instructions are executed and interrupts serviced. The stack can also be used explicitly to store and retrieve data by using the PUSH, POP, and POPI instructions.
On reset, the stack pointer (SP) initializes to the top of the stack (0Fh). The CALL, PUSH, and interrupt-vectoring operations increment SP, then store a value at the location pointed to by SP. The RET, RETI, POP, and POPI operations retrieve the value pointed to by SP, and then decrement SP.
Utility ROM
The utility ROM is a 4k Word block of internal ROM memory that defaults to a starting address of 8000h. The utility ROM consists of subroutines that can be called from application software. These include:
In-system programming (bootstrap loader) over JTAG or serial interfaces In-circuit debug routines Internal self-test routines Callable routines for in-application EEPROM programming and SHA-1 calculations
Following any reset, execution begins in the utility ROM. The ROM software determines whether the program execution should immediately jump to location 0000h, the start of application code, or to one of the special routines
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DS2792 Programmable Fuel Gauge with UART Interface
mentioned. Routines within the utility ROM are firmware-accessible and can be called as subroutines by the
application software. More information on the utility ROM contents is contained in the MAXQ Family User's Guide: DS2792 Supplement.
Some applications require protection against unauthorized viewing of program code memory. For these applications, access to in-system programming, in-application programming, or in-circuit debugging functions is prohibited until a password has been supplied. The password is defined as the 16 words of physical program memory at addresses x0010h to x001Fh. Upon startup, code in the ROM examines the password, if a password is defined (password is other than all zeros or all ones), and the PWL bit remains set, which prohibits access to commands to read memory contents over the JTAG and serial interfaces.
A single password lock (PWL) bit is implemented in the SC register. When the PWL is set to one (power-on reset default), the password is required to access the utility ROM, including in-circuit debug and in-system programming routines that allow reading or writing of internal memory. When PWL is cleared to zero, these utilities are fully accessible without password. The password is automatically set to all ones following a mass erase.
PROGRAMMING
The EEPROM memory of the microcontroller can be programmed by two different methods: in-system programming and in-application programming. Both methods afford great flexibility in system design as well as reduce the life-cycle cost of the embedded system. These features can be password protected to prevent unauthorized access to code memory.
In-System Programming
An internal bootstrap loader allows the device to be programmed over the JTAG or serial interfaces. As a result, system software can be upgraded in-system, eliminating the need for a costly hardware retrofit when software updates are required. Remote software uploads are possible that enable physically inaccessible applications to be frequently updated. The JTAG interface hardware can be a JTAG connection to another microcontroller, or a connection to a PC serial port using a serial to JTAG converter such as the MAXQJTAG-001 (3.3V reference voltage required), available from Maxim Integrated Products. The UART interface hardware can be a connection to another microcontroller, or a connection to a PC USB port using a USB to UART converter such as the DS9123O, available from Dallas Semiconductor. A commercial gang programmer can also be used for programming.
Activating the JTAG interface and loading the test access port (TAP) with the system programming instruction invokes the bootstrap loader for use over the JTAG interface. Setting the SPE bit to 1 during reset through the JTAG interface executes the bootstrap-loader-mode program that resides in the utility ROM. When programming is complete and the bootstrap loader exited, the SPE bit will clear and the IC will reset, allowing execution of the application software.
Performing a program request over the serial interface also invokes the bootstrap loader. The user must successfully complete a password match (if PWL = 1). The bootstrap loader functions are then fully supported over the serial interface. When programming is complete, the exit loader function is used to reset the DS2792 and begin execution of the application software.
The following bootstrap loader functions are supported:
Information commands Load EEPROM code and data Dump EEPROM code and data CRC EEPROM code and data Verify EEPROM code and data Erase EEPROM code and data
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DS2792 Programmable Fuel Gauge with UART Interface
In-Application Programming
The in-application programming feature allows the microcontroller to modify its own EEPROM program memory. This allows on-the-fly software updates in mission-critical applications that cannot afford downtime. Alternatively, it allows the application to develop custom loader software that can operate under the control of the application software. The utility ROM contains firmware-accessible EEPROM programming functions that erase and program
EEPROM memory. These functions are described in detail in the MAXQ Family User's Guide: DS2792 Supplement.
SYSTEM TIMING
The DS2792 generates its 1MHz instruction clock (OSCI) internally. This quick starting oscillator is used for instruction fetch and execution by the MAXQ20 core. The analog oscillator (OSCA) is a bandgap-based RC oscillator that is trimmed to better than 2% accuracy (f serves as the clock source for the ADC, watchdog timer, and interval timer. OSCA is enabled by the watchdog timer signals EWDI or EWT, by the timer/counter (TMOD), or by the coulomb counter (CCEN).
OSCI is enabled through either a system interrupt or system POR and disabled through a system stop. A voltage brownout-detection circuit disables OSCI if V waits t OSCI is slaved to OSCA when OSCA is active.
before re-enabling OSCI. To improve overall system timing and meet UART timing requirements,
SU:OSCI
falls below VBO. Once VDD raises above VBO, a hysteresis circuit
DD
ERR:OSCA
Figure 4. System Clocks
). The analog clock runs independent of OSCI and
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DS2792 Programmable Fuel Gauge with UART Interface
SYSTEM RESET
Several reset sources are provided for microcontroller control. Although code execution is halted in the reset state, OSCI continues to run.
Power-On Reset: An internal power-on reset circuit enhances system reliability. This circuit forces the device to
perform a power-on reset whenever a rising voltage on V
climbs above V
DD
. At this point the following events
POR
occur:
All registers and circuits enter their reset state. The POR flag (WDCN.7) is set to indicate the source of the reset. Code execution begins at location 8000h.
Watchdog Timer Reset: Software can determine if a reset is caused by a watchdog timeout by checking the
watchdog timer reset flag (WTRF) in the WDCN register. Execution resumes at location 8000h following a watchdog timer reset.
External System Reset: Asserting the external RST (port P0.2) pin low causes the device to enter the reset state. The external reset function is described in the MAXQ Family User's Guide. Execution resumes at location 8000h after the RST pin is released.
MAXQ20 CORE POWER MANAGEMENT
The DS2792 is designed for low-power battery-monitoring applications. The peripherals have been designed with the ability to wake the processor from SLEEP or ANALOG mode any time software intervention is needed. Power management is optimized in the applications by performing any necessary processing as quickly as possible, and re-entering the low power SLEEP or ANALOG mode. Processing resumes from SLEEP or ANALOG mode via any of the following sources (when enabled):
An external interrupt is triggered. An external reset signal is applied to the RST pin. A watchdog timer interrupt occurs. An internal interrupt event occurs.
Note: No division of the internal system clock is supported, subsequently the PMME and CD[1:0] bits described in
the MAXQ Family User’s Guide are not implemented in the DS2792.
WATCHDOG TIMER
The watchdog timer provides a mechanism to reset the processor in the case of undesirable code execution. The watchdog timer is a hardware timer designed to be periodically reset by the application software. If the software operates correctly, the timer is reset before it reaches its maximum count. However, if undesireable code execution prevents a reset of the watchdog timer, the timer reaches its maximum count and resets the processor.
The watchdog timer in the DS2792 differs in two respects from the one described in the MAXQ Family User's Guide: 1) the clock used by the timer is the 70kHz OSCA clock that runs independently of the 1MHz OSCI (or
system) clock, and 2) the watchdog interrupt is an asynchronous interrupt that can bring the processor out of stop mode.
The watchdog timer is controlled through bits in the WDCN register. Its timeout period can be set to one of the four programmable intervals ranging from 2 occurs at the end of this timeout period, which is 512 OSCA clock periods, or 7.3ms, before the reset.
12
to 221 OSCA clock periods (59ms up to 30s). The watchdog interrupt
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