MAXIM DS2761 Technical data

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DS2761

High-Precision Li+ Battery Monito

FEATURES

§ Lithium-Ion (Li+) Safety Circuit

- Overvoltage Protection

- Overcurrent/Short-Circuit Protection

- Undervoltage Protection

§ Zero Volt Battery Recovery Charge

§ Available in Two Configurations:

- Internal 25mW Sense Resistor

- External User-Selectable Sense Resistor

§ Current Measurement

- 12-Bit Bidirectional Measurement

- Internal Sense Resistor Configuration:

0.625mA LSB and ±1.9A Dynamic Range

- External Sense Resistor Configuration:

15.625mV LSB and ±64mV Dynamic Range

§ Current Accumulation:

- Internal Sense Resistor: 0.25mAhr LSB

- External Sense Resistor: 6.25mVhr LSB

§ Voltage Measurement with 4.88mV

Resolution

§ Temperature Measurement Using Integrated

Sensor with 0.125°C Resolution

§ System Power Management and Control

Feature Support

§ 32 Bytes of Lockable EEPROM

§ 16 Bytes of General-Purpose SRAM

§ Dallas 1-Wire

Device Address

§ Low Power Consumption:

- Active Current: 60mA typ, 90mA max

- Sleep Current: 1mA typ, 2mA max

Interface with Unique 64-bit

PIN CONFIGURATION

1 2 3 4

DS2761

PIO

IS1

PLS DC DQ

CC IS2

VIN IS1

VDD PIO PS

Flip-Chip Packaging*

SNS Probe

VSS Probe

DS2761

Top View

SNS

VSS

CC V

PLS

SNS

IS2

16-Pin TSSOP Package

PIN DESCRIPTION

- Charge Control Output

- Discharge Control Output

DQ - Data Input/Output PIO - Programmable I/O Pin PLS - Battery Pack Positive Terminal Input

- Power Switch Sense Input

VIN- Voltage-Sense Input VDD- Power-Supply Input (2.5V to 5.5V) VSS- Device Ground SNS - Sense Resistor Connection IS1 - Current-Sense Input IS2 - Current-Sense Input SNS Probe - Do Not Connect

Probe - Do Not Connect

* Mechanical drawing for the 16-pin TSSOP and DS2761 flip-chip package can be found at:

http://pdfserv.maxim-ic.com/arpdf/Packages/16tssop.pdf http://pdfserv.maxim-ic.com/arpdf/Packages/chips/2761x.pdf

1-Wire is a registered trademark of Dallas Semiconductor.

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DS2761

ORDERING INFORMATION

PART MARKING DESCRIPTION

DS2761AE D2761EA TSSOP, External Sense Resistor, 4.275V V DS2761BE D2761EB TSSOP, External Sense Resistor, 4.35V V

DS2761AE/T&R D2761EA DS2761AE on Tape-and-Reel DS2761BE/T&R D2761EB DS2761BE on Tape-and-Reel DS2761AE-025 2761A25 TSSOP, 25mW Sense Resistor, 4.275V V DS2761BE-025 2761B25 TSSOP, 25mW Sense Resistor, 4.35V V

DS2761AE-025/T&R 2761A25 DS2761AE-025 in Tape-and-Reel DS2761BE-025/T&R 2761B25 DS2761BE-025 in Tape-and-Reel DS2761AX-025/T&R DS2761AR Flip-Chip, 25mW Sense Resistor, Tape-and-Reel, 4.275V V DS2761BX-025/T&R DS2761BR Flip-Chip, 25mW Sense Resistor, Tape-and-Reel, 4.35V V DS2761AX/T&R DS2761A Flip-Chip, External Sense Resistor, Tape-and-Reel, 4.275V V DS2761BX/T&R DS2761B Flip-Chip, External Sense Resistor, Tape-and-Reel, 4.35V V

Note: Additional VOV options are available, contact Maxim/Dallas Semiconductor sales.

DESCRIPTION

The DS2761 high-precision Li+ battery monitor is a data-acquisition, information-storage, and safetyprotection device tailored for cost-sensitive battery pack applications. This low-power device integrates precise temperature, voltage, and current measurement, nonvolatile (NV) data storage, and Li+ protection into the small footprint of either a TSSOP package or flip-chip package. The DS2761 is a key component in applications including remaining capacity estimation, safety monitoring, and battery-specific data storage.

Through its 1-Wire interface, the DS2761 gives the host system read/write access to status and control registers, instrumentation registers, and general-purpose data storage. Each device has a unique factoryprogrammed 64-bit net address that allows it to be individually addressed by the host system, supporting multibattery operation.

The DS2761 is capable of performing temperature, voltage, and current measurement to a resolution sufficient to support process monitoring applications such as battery charge control, remaining capacity estimation, and safety monitoring. Temperature is measured using an on-chip sensor, eliminating the need for a separate thermistor. Bidirectional current measurement and accumulation are accomplished using either an internal 25mW sense resistor or an external device. The DS2761 also features a programmable I/O pin that allows the host system to sense and control other electronics in the pack, including switches, vibration motors, speakers, and LEDs.

Three types of memory are provided on the DS2761 for battery information storage: EEPROM, lockable EEPROM, and SRAM. EEPROM memory saves important battery data in true NV memory that is unaffected by severe battery depletion, accidental shorts, or ESD events. Lockable EEPROM becomes ROM when locked to provide additional security for unchanging battery data. SRAM provides inexpensive storage for temporary data.

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Figure 1. BLOCK DIAGRAM

DS2761

IS1

IS2

PLS

SNS

THERMAL

SENSE

1-WIRE

INTERFACE

ADDRESS

MUX

REGISTERS AND

AND

VOLTAGE

REFERENCE

ADC

INTERNAL SENSE RESISTOR CONFIGURATION ONLY

25mW

USER MEMOR

LOCKABLE EEPROM

SRAM

TEMPERATURE

VOLTAGE

CURRENT

ACCUM. CURRENT

STATUS / CONTROL

LI-ION PROTECTION

CHIP GROUND

TIMEBASE

PIO

IS2 IS1

TEST CURRENT AND RECOVERY CHARGE DETAIL

PLS

TST

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Table 1. DETAILED PIN DESCRIPTION

SYMBOL TSSOP FLIP

CHIP

DS2761

DESCRIPTION

1C1Charge Protection Control Output. Controls an external p-channel

high-side charge protection FET.

3B2Discharge Protection Control Output. Controls an external p-channel

high-side discharge protection FET.

DQ 7 B4 Data Input/Out. 1-Wire data line. Open-drain output driver. Connect

this pin to the DATA terminal of the battery pack. Pin has an internal 1mA pull-down for sensing disconnection.

PIO

14 E2 Programmable I/O Pin. Used to control and monitor user-defined

external circuitry. Open drain to VSS.

PLS 2 B1 Battery Pack Positive Terminal Input. The DS2761 monitors the pack

plus terminal through PLS to detect overcurrent and overload conditions, as well as the presence of a charge source. Additionally, a charge path to recover a deeply depleted cell is provided from PLS to V

. In sleep

mode (with SWEN = 0), any capacitance or voltage source connected to PLS is discharged internally to VSS through 200mA (nominal) to assure reliable detection of a valid charge source. For details of other internal connections to PLS and associated conditions see the Li+ Protection

Circuitry section.

10 E4 Power Switch Sense Input. The device wakes up from Sleep Mode

when it senses the closure of a switch to VSS on this pin. Pin has an internal 1mA pull-up to VDD.

VIN 16 D1 Voltage Sense Input. The voltage of the Li+ cell is monitored via this

input pin. This pin has a weak pullup to VDD.

15 E1 Power Supply Input. Connect to the positive terminal of the Li+ cell

through a decoupling network.

VSS

13,14,

F3 Device Ground. Connect directly to the negative terminal of the Li+ cell.

For the external sense resistor configuration, connect the sense resistor between VSS and SNS.

SNS 4,5,6 A3 Sense Resistor Connection. Connect to the negative terminal of the

battery pack. In the internal sense resistor configuration, the sense resistor is connected between VSS and SNS.

IS1 9 D4

Current Sense Input. This pin is internally connected to VSS through a

4.7kW resistor. Connect a 0.1mF capacitor between IS1 and IS2 to complete a low-pass input filter.

IS2 8 C4

Current Sense Input. This pin is internally connected to SNS through a

4.7kW resistor.

SNS

N/A C2

Do Not Connect.

Probe

VSS

N/A D2

Do Not Connect.

Probe

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Figure 2. APPLICATION EXAMPLE

(1)

(2)

102 x 2

DS2761

PACK+

DATA

PACK-

102

1kW

150

150W

1kW

CC PLS DC SNS SNS SNS DQ IS2

DS2761

PIO

IS1

104

BAT+

1kW

150W

104

4.7k

BAT-

SNS

SNS-INT

SNS

4.7KW

IS2 IS1

voltage

4.7KW

sense

DS2761

1) R

2) R

is present for external sense resistor configurations only.

SNS

SNS-INT

is present for internal sense resistor configurations only.

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DS2761

POWER MODES

The DS2761 has two power modes: active and sleep. While in active mode, the DS2761 continually measures current, voltage, and temperature to provide data to the host system and to support current accumulation and Li+ safety monitoring. In sleep mode, the DS2761 ceases these activities. The DS2761 enters sleep mode when any of the following conditions occurs:

§ The PMOD bit in the Status Register has been set to 1 and the DQ line is low for longer than

2s (pack disconnection)

§ The voltage on VIN drops below undervoltage threshold VUV for t

§ The pack is disabled through the issuance of a SWAP command (SWEN bit = 1)

The DS2761 returns to active mode when any of the following occurs:

§ The PMOD bit has been set to 1 and the SWEN bit is set to 0 and the DQ line is pulled high

(pack connection)

§ The PS pin is pulled low (power switch)

§ The voltage on PLS becomes greater than the voltage on V

(charger connection) with the SWEN bit

set to 0

§ The pack is enabled through the issuance of a SWAP command (SWEN bit = 1)

The DS2761 defaults to sleep mode when power is first applied.

(cell depletion)

UVD

Li+ PROTECTION CIRCUITRY

During active mode, the DS2761 constantly monitors cell voltage and current to protect the battery from overcharge (overvoltage), overdischarge (undervoltage), and excessive charge and discharge currents (overcurrent, short circuit). Conditions and DS2761 responses are described in the sections below and summarized in Table 2 and Figure 3.

Table 2. Li+ PROTECTION CONDITIONS AND DS2761 RESPONSES

ACTIVATIONCONDITION

NAME

Overvoltage V

Undervoltage V

THRESHOLD DELAY RESPONSE

> V

< V

OVD

UVD

high

CC, DC

high,

Sleep Mode

Overcurrent, Charge V Overcurrent, Discharge V Short Circuit V

VIS = V delivered from pin SNS.

If V

For the internal sense resistor configuration, the overcurrent thresholds are expressed in terms of current: I

With test current I

- V

IS1

allows V

charge direction and I

. Logic high = V

IS2

< 2.2V, release is delayed until the recovery charge current (IRC) passed from PLS to VDD charges the battery and

to exceed 2.2V.

< -IOC for discharge direction

SNS

flowing from PLS to VSS (pulldown on PLS)

TST

flowing from VDD to PLS (pullup on PLS)

TST

< -V

SNS

for CC and VDD for

PLS

> V

(2)

OCD

SCD

All voltages are with respect to VSS. I

CC, DC

high

high high

RELEASE

THRESHOLD

< VCE, or

VIS ≤ -2mV

> VDD

PLS

(1)

(charger connected)

< VDD - V

PLS

> VDD - V

PLS

> VDD - V

PLS

references current

SNS

(3)

(4)

> IOC for

Overvoltage. If the cell voltage on VIN exceeds the overvoltage threshold, VOV, for a period longer than overvoltage delay, t protection register. When the cell voltage falls below charge enable threshold V

, the DS2761 shuts off the external charge FET and sets the OV flag in the

OVD

, the DS2761 turns the

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DS2761

charge FET back on (unless another protection condition prevents it). Discharging remains enabled during overvoltage, and the DS2761 re-enables the charge FET before VIN < VCE if a discharge current of

-80mA (VIS ≤ -2mV) or less is detected.

Undervoltage. If the voltage of the cell drops below undervoltage threshold VUV for a period longer than undervoltage delay t

, the DS2761 shuts off the charge and discharge FETs, sets the UV flag in the

UVD

protection register, and enters sleep mode. The DS2761 provides a current-limited recovery charge path from PLS to V

to gently charge severely depleted cells during sleep mode.

Overcurrent, Charge Direction. The voltage difference between the IS1 pin and the IS2 pin (V V

) is the filtered voltage drop across the current-sense resistor. If VIS exceeds overcurrent threshold

IS2

VOC for a period longer than overcurrent delay t

, the DS2761 shuts off both external FETs and sets the

OCD

= V

COC flag in the protection register. The charge current path is not re-established until the voltage on the PLS pin drops below VDD - VTP. The DS2761 provides a test current of value I

from PLS to VSS to pull

TST

PLS down in order to detect the removal of the offending charge current source.

Overcurrent, Discharge Direction. If VIS is less than -VOC for a period longer than t

, the DS2761

OCD

shuts off the external discharge FET and sets the DOC flag in the protection register. The discharge current path is not re-established until the voltage on PLS rises above VDD - VTP. The DS2761 provides a test current of value I

from VDD to PLS to pull PLS up in order to detect the removal of the offending

TST

low-impedance load.

Short Circuit. If the voltage on the SNS pin with respect to VSS exceeds short-circuit threshold VSC for a period longer than short-circuit delay t

, the DS2761 shuts off the external discharge FET and sets the

SCD

DOC flag in the protection register. The discharge current path is not re-established until the voltage on PLS rises above VDD - VTP. The DS2761 provides a test current of value I

from VDD to PLS to pull

TST

PLS up in order to detect the removal of the short circuit.

Figure 3. Li+ PROTECTION CIRCUITRY EXAMPLE WAVEFORMS

CELL

CHARGE

DISCHARGE

(1)

OVD

OCD

V 0

-V

PLS

IS1

SLEEP

MODE

(1) To allow the device to react quickly to short circuits, detection occurs on the SNS pin rather than on the

filtered IS1 and IS2 pins. The actual short-circuit detect condition is V

SNS

> VSC.

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ACTIVE

INACTIVE

DS2761

Summary. All of the protection conditions described above are OR'ed together to affect the CC and

outputs.

= (Undervoltage) or (Overcurrent, Either Direction) or (Short Circuit) or

(Protection Register Bit DE = 0) or (Sleep Mode)

= (Overvoltage) or (Undervoltage) or (Overcurrent, Charge Direction) or (Protection Register

bit CE = 0) or (Sleep Mode)

CURRENT MEASUREMENT

In the active mode of operation, the DS2761 continually measures the current flow into and out of the battery by measuring the voltage drop across a current-sense resistor. The DS2761 is available in two configurations: 1) internal 25mW current-sense resistor, and 2) external user-selectable sense resistor. In either configuration, the DS2761 considers the voltage difference between pins IS1 and IS2 (V V

) to be the filtered voltage drop across the sense resistor. A positive VIS value indicates current is

IS2

flowing into the battery (charging), while a negative VIS value indicates current is flowing out of the battery (discharging).

VIS is measured with a signed resolution of 12-bits. The current register is updated in two’s-complement format every 88ms (128/fsample) with an average of 128 readings. Currents outside the range of the register are reported at the limit of the range. The format of the current register is shown in Figure 4.

= V

IS1

For the internal sense resistor configuration, the DS2761 maintains the current register in units of amps, with a resolution of 0.625mA and full-scale range of no less than ±1.9A (see Note 7 on IFS spec for more details). The DS2761 automatically compensates for internal sense resistor process variations and temperature effects when reporting current.

For the external sense resistor configuration, the DS2761 writes the measured VIS voltage to the current register, with a resolution of 15.625mV and a full-scale range of ±64mV.

Figure 4. CURRENT REGISTER FORMAT

MSB—Address 0E LSB—Address 0F

1121029

2827262

2423222120XXX

MSb LSb MSb LSb

Units: 0.625mA for Internal Sense Resisto

15.625mV for External Sense Resisto

CURRENT ACCUMULATOR

The current accumulator facilitates remaining capacity estimation by tracking the net current flow into and out of the battery. Current flow into the battery increments the current accumulator while current flow out of the battery decrements it. Data is maintained in the current accumulator in two’s-complement format. The format of the current accumulator is shown in Figure 5.

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MAXIM DS2761 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual