The DS2250(T) soft microcontroller module is a
fully 8051-compatible 8-bit CMOS microcontroller that
offers “softness” in all aspects of its application.
This is accomplished through the comprehensive
use of nonvolatile technology to preserve all
information in the absence of system V
. The
CC
internal program/data memory space is
implemented using 8, 32, or 64kbytes of nonvolatile
CMOS SRAM. Furthermore, internal data registers
and key configuration registers are also nonvolatile.
An optional real-time clock gives permanently
powered timekeeping. The clock keeps time to a
hundredth of a second using an on-board crystal.
All nonvolatile memory and resources are
maintained for over 10 years at room temperature in
the absence of power.
PIN CONFIGURATION
1 20 21 40
DS2250(T)
40-Pin SIMM
ORDERING INFORMATION
PART RAM SIZE (kB) MAX CRYSTAL SPEED (MHz) TIMEKEEPING?
FEATURES
8-Bit 8051-Compatible Microcontroller
Adapts to Task-At-Hand
8, 32, or 64kbytes of Nonvolatile RAM for
Program and/or Data Memory Storage
Initial Downloading of Software in End System
via On-Chip Serial Port
Capable of Modifying its Own Program and/or
Data Memory in End Use
High-Reliability Operation
Maintains All Nonvolatile Resources Up to 10
Years in the Absence of V
Temperature
Power-Fail Reset
Early Warning Power-Fail Interrupt
Watchdog Timer
Software Security Feature
Executes Encrypted Software to Prevent
Unauthorized Disclosure
On-Chip, Full-Duplex Serial I/O Ports
Two On-Chip Timer/Event Counters
32 Parallel I/O Lines
Compatible with Industry Standard 8051
Instruction Set
Permanently Powered Real-Time Clock
Operating information is contained in the Secure Microcontroller
User’s Guide. This data sheet provides ordering information,
pinout, and electrical specifications.
at Room
CC
DS2250-32-16 32 16 No
DS2250-32-16+ 32 16 No
DS2250-64-16 64 16 No
DS2250-64-16# 64 16 No
DS2250T-32-16 32 16 Yes
DS2250T-32-16+ 32 16 Yes
DS2250T-64-16 64 16 Yes
DS2250T-64-16+ 64 16 Yes
+ Denotes lead-free/RoHS-compliant package
# Denotes RoHS-compliant device that may contain lead exempt under the RoHS requirements.
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DS2250(T) BLOCK DIAGRAM Figure 1
DS2250(T)
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PIN DESCRIPTION
PIN DESCRIPTION
1, 3, 5, 7, 9,
11, 13, 15
17
19
21
P1.0 - P1.7. General purpose I/O Port 1
RST - Active high reset input. A logic 1 applied to this pin will activate a reset state.
This pin is pulled down internally so this pin can be left unconnected if not used. An
RC power-on reset circuit is not needed and is not recommended.
P3.0 RXD. General purpose I/O port pin 3.0. Also serves as the receive signal for the
on board UART. This pin should not be connected directly to a PC COM port.
P3.1 TXD. General purpose I/O port pin 3.1. Also serves as the transmit signal for the
on board UART. This pin should not be connected directly to a PC COM port.
DS2250(T)
23
25
P3.2 INT0 . General purpose I/O port pin 3.2. Also serves as the active low External
Interrupt 0.
P3.3 INT1 . General purpose I/O port pin 3.3. Also serves as the active low External
Interrupt 1.
27 P3.4 T0. General purpose I/O port pin 3.4. Also serves as the Timer 0 input.
29 P3.5 T1. General purpose I/O port pin 3.5. Also serves as the Timer 1 input.
31
33
35, 37
P3.6 WR . General purpose I/O port pin. Also serves as the write strobe for Expanded
bus operation.
P3.7 RD . General purpose I/O port pin. Also serves as the read strobe for Expanded
bus operation.
XTAL2, XTAL1. Used to connect an external crystal to the internal oscillator.
XTAL1 is the input to an inverting amplifier and XTAL2 is the output.
39 GND - Logic ground.
26, 28, 30, 32,
34, 36, 38, 40
P2.7-P2.0. General purpose I/O Port 2. Also serves as the MSB of the Expanded
Address bus.
PSEN - Program Store Enable. This active low signal is used to enable an external
program memory when using the Expanded bus. It is normally an output and should
24
be unconnected if not used.
time, PSEN will be pulled down externally. This should only be done once the
PSEN also is used to invoke the Bootstrap Loader. At this
DS2250(T) is already in a reset state. The device that pulls down should be open-drain
since it must not interfere with PSEN under normal operation.
ALE - Address Latch Enable. Used to de-multiplex the multiplexed Expanded
22
Address/Data bus on Port 0. This pin is normally connected to the clock input on a
’373 type transparent latch. When using a parallel programmer, this pin also assumes
the PROG function for programming pulses.
20
4, 6, 8, 10, 12,
14, 16, 18
2 VCC + - 5 volts.
EA - External Access. This pin forces the DS2250(T) to behave like an 8031. No
internal memory (or clock) will be available when this pin is at a logic low. Since this
pin is pulled down internally, it should be connected to +5V to use NV RAM. In a
parallel programmer, this pin also serves as VPP for super voltage pulses.
P0.0-P0.7. General purpose I/O Port 0. This port is open-drain and can not drive a
logic 1. It requires external pullups. Port 0 is also the multiplexed Expanded
Address/Data bus. When used in this mode, it does not require pullups.
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DS2250(T)
INSTRUCTION SET
The DS2250(T) executes an instruction set which is object code-compatible with the industry standard
8051 microcontroller. As a result, software development packages which have been written for the 8051
are compatible with the DS2250(T), including cross-assemblers, high-level language compilers, and
debugging tools. Note that the DS2250(T) is functionally identical to the DS5000(T) except for package
and the 64k memory option.
A complete description for the DS2250(T) instruction set is available in the Secure Microcontroller
User’s Guide.
MEMORY ORGANIZATION
Figure 2 illustrates the address spaces which are accessed by the DS2250(T). As illustrated in the figure,
separate address spaces exist for program and data memory. Since the basic addressing capability of the
machine is 16 bits, a maximum of 64 kbytes of program memory and 64 kbytes of data memory can be
accessed by the DS2250(T) CPU. The 8- or 32-kbyte RAM area inside of the DS2250(T) can be used to
contain both program and data memory. A second 32k RAM is available for data only.
The Real Time Clock (RTC) in the DS2250(T) is reached in the memory map by setting a SFR bit. The
MCON.2 bit (ECE2) is used to select an alternate data memory map. While ECE2=1, all MOVXs will be
routed to this alternate memory map. The real time clock is a serial device that resides in this area. A full
description of the RTC access and example software is given in the Secure Microcontroller User’s Guide.
DS2250(T) MEMORY MAP Figure 2
DATA MEMORY (MOVX)
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DS2250(T)
PROGRAM LOADING
The Program Load Modes allow initialization of the NV RAM Program/Data Memory. This initialization
may be performed in one of two ways:
1. Serial Program Loading which is capable of performing Bootstrap Loading of the DS2250(T). This
feature allows the loading of the application program to be delayed until the DS2250(T) is installed in
the end system.
2. Parallel Program Load cycles which perform the initial loading from parallel address/data information
presented on the I/O port pins. This mode is timing set-compatible with the 87C51H microcontroller
programming mode.
The DS2250(T) is placed in its Program Load configuration by simultaneously applying a logic 1 to the
RST pin and forcing the PSEN line to a logic 0 level. Immediately following this action, the DS2250(T)
will look for a parallel Program Load pulse, or a serial ASCII carriage return (0DH) character received at
9600, 2400, 1200, or 300 bps over the serial port.
The hardware configurations used to select these modes of operation are illustrated in Figure 3.
PROGRAM LOADING CONFIGURATIONS Figure 3
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DS2250(T)
SERIAL BOOTSTRAP LOADER
The Serial Program Load Mode is the easiest, fastest, most reliable, and most complete method of
initially loading application software into the DS2250(T) nonvolatile RAM. Communication can be
performed over a standard asynchronous serial communications port. A typical application would use a
simple RS232C serial interface to program the DS2250(T) as a final production procedure. The hardware
configuration which is required for the Serial Program Load Mode is illustrated in Figure 3. Port pins 2.7
and 2.6 must be either open or pulled high to avoid placing the device in a parallel load cycle. Although
an 11.0592 MHz crystal is shown in Figure 3, a variety of crystal frequencies and loader baud rates are
supported, shown in Table 2. The serial loader is designed to operate across a 3-wire interface from a
standard UART. The receive, transmit, and ground wires are all that are necessary to establish
communication with the DS2250(T).
The Serial Bootstrap Loader implements an easy-to-use command line interface which allows an
application program in an Intel hex representation to be loaded into and read back from the device. Intel
hex is the typical format which existing 8051 cross-assemblers output. The serial loader responds to
single character commands which are summarized below:
COMMAND FUNCTION
C Return CRC-16 checksum of embedded RAM
D Dump Intel hex File
F Fill embedded RAM block with constant
K Load 40-bit encryption key
L Load Intel hex file
R Read MCON register
T Trace (Echo) incoming Intel hex data
U Clear Security Lock
V Verify Embedded RAM with incoming Intel hex
W Write MCON register
Z Set security lock
P Put a value to a port
G Get a value from a port
Table 1 summarizes the selection of the available Parallel Program Load cycles. The timing associated
with these cycles is illustrated in the electrical specs.
PARALLEL PROGRAM LOAD CYCLES Table 1
MODE RST
PSEN PROG EA
P2.7 P2.6 P2.5
Program 1 0 0 V
PP
1 0 X
Security Set 1 0 0 VPP 1 1 X
Verify 1 X X 1 0 0 X
Prog Expanded 1 0 0 VPP 0 1 0
Verify Expanded 1 0 1 1 0 1 0
Prog MCON or Key registers 1 0 0 VPP 0 1 1
Verify MCON registers 1 0 1 1 0 1 1
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