MAXIM DS21600, DS21602, DS21604 User Manual

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GENERAL DESCRIPTION

The DS21600/DS21602/DS21604 are multiple-rate clock adapters that convert between E-carrier and Tcarrier clocks rates. A T1 or E1 clock output, CLKOUT1, is available, along with a higher multiple rate clock output, CLKOUT2. CLKOUT1 and CLKOUT2 are frequency locked to the clock input CLKIN. The clock outputs, along with frame-sync output, can be phase-aligned to a frame-sync input. The devices are fully compatible with the LXP600A, LXP602, and LXP604, and operate from either a 5V or 3.3V supply. All operation modes include a standard 8kHz output.

The DS21600/DS21602/DS21604 are available in 16-pin SO, and are rated for industrial temperatures.

ORDERING INFORMATION

PART TEMP RANGE PIN-PACKAGE

DS21600SN

DS21600SN+ -40°C to +85°C 16 SO DS21600N -40°C to +85°C 8 DIP DS21600N+ -40°C to +85°C 8 DIP DS21602SN DS21602SN+ -40°C to +85°C 16 SO DS21602N -40°C to +85°C 8 DIP DS21602N+ -40°C to +85°C 8 DIP DS21604SN DS21604SN+ -40°C to +85°C 16 SO DS21604N -40°C to +85°C 8 DIP DS21604N+ -40°C to +85°C 8 DIP

+ Denotes a lead(Pb)-free/RoHS-compliant device.

-40°C to +85°C 16 SO

-40°C to +85°C

16 SO

FREQUENCY CONVERSIONS (MHz)

PART CLKIN CLKOUT1 CLKOUT2

DS21600

DS21602

DS21604

1.544 2.048 6.144

2.048 1.544 6.176

1.544 2.048 8.192

2.048 1.544 6.176

1.544 4.096 8.192

4.096 1.544 6.176

DS21600/DS21602/DS21604

3.3V/5V Clock Rate Adapte

FEATURES

 Direct Drop-In Replacement for LXP600ASE,

LXP602SE, and LXP604SE

 Converts E-Carrier Clock Rates to T-Carrier

Clock Rates

 Converts T-Carrier Clock Rates to E-Carrier

Clock Rates

 3.3V or 5V Supply  Low Jitter Output  Multiple Output Clocks Synchronized to

Input Clock

 8kHz Frequency-Locked Output for All

Operation Modes

 No External Components Required  16-Pin SO and 8-Pin DIP  Industrial Temperature Range: -40°C to

+85°C

PIN CONFIGURATION

TOP VIEW

Semiconductor

Dallas

DS21600/2/4

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata

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REV: 011606

TABLE OF CONTENTS

1. PIN DESCRIPTION ................................................................................................ 3

1.1 PIN NAME CROSS-REFERENCE TO LXP60X ......................................................................... 3

2. FUNCTIONAL DESCRIPTION............................................................................... 4

2.1 MODE SELECT..................................................................................................................... 4

2.2 FRAME-SYNC INPUT............................................................................................................. 4

3. OUTPUT JITTER.................................................................................................... 4

3.1 JITTER TRANSFER................................................................................................................ 5

4. OPERATING PARAMETERS................................................................................. 7

5. PACKAGE INFORMATION.................................................................................. 11

6. REVISION HISTORY............................................................................................ 12

LIST OF FIGURES

Figure 1-1. Block Diagram........................................................................................................................3

Figure 3-1. Nominal Jitter Transer for 2.048MHz to 1.544MHz Conversion.............................................5

Figure 3-2. Nominal Jitter Transfer for 1.544MHz to 2.048MHz Conversion............................................6

Figure 4-1. DS21600/DS21602 High-to-Low Frequency Conversion Frame-Sync Alignment .................8

Figure 4-2. DS21604 High-To-Low Frequency Conversion Frame-Sync Alignment................................9

Figure 4-3. DS21600 Low-to-High Frequency Conversion Frame-Sync Alignment .................................9

Figure 4-4. DS21602 Low-to-High Frequency Conversion Frame-Sync Alignment ...............................10

Figure 4-5. DS21604 Low-to-High Frequency Conversion Frame-Sync Alignment ...............................10

LIST OF TABLES

Table 1-A. Pin Description........................................................................................................................3

Table 1-B. Pin Name Cross-Reference to LXP60x...................................................................................3

Table 2-A. Frequency Conversions (MHz) ...............................................................................................4

Table 3-A. Output Jitter Specifications .....................................................................................................4

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1. PIN DESCRIPTION

Table 1-A. Pin Description

DIP SO

—

1, 3, 6, 8, 10,

11, 13, 15

1 2 SYNCOUT Output 2 4 CLKOUT2 Output 3 5 CLKIN Input 4 7 CLKOUT1 Output

5 9 Vss Supply Ground 6 12 SEL Input Clock Mode Select. Conversion mode select.

7 14 SYNCIN Input

8 16 VDD Supply Positive Supply, 3.3V or 5V ±5%

1.1 Pin Name Cross-Reference to LXP60X Table 1-B. Pin Name Cross-Reference to LXP60x

DS21600/DS21602

/DS21604

SYNCOUT FSO Synchronization Pulse Output

CLKOUT2 HFO Clock 2 Output

CLKIN CLKI Clock Input

CLKOUT1 CLKO Clock 1 Output

VSS GND Ground

SEL SEL Clock Mode Select

SYNCIN FSI Synchronization Pulse Input

N.C. N.C. No Connect

VDD V

LXP600ALXP602/L

Figure 1-1. Block Diagram

CLKIN

Dallas Semiconductor

DS21600/DS21602/DS21604

SEL

SYNCIN

NAME TYPE FUNCTION

N.C. — No Connect

Synchronization Output. An 8kHz output that can be synchronized to the clock outputs. Clock Output 2. T1 or E1 carrier clock output referenced to CLKIN. Clock Input. Reference Clock Input. CLKOUT1 and CLKOUT2 will be referenced to this clock. Clock Output 1. T1 or E1 carrier clock output referenced to CLKIN.

Synchronization Input. Used to synchronize the clock outputs and SYNCOUT to CLKIN and SYNCIN. SYNCIN should be tied high or low when not in use.

XP604

Positive Supply

ANALOG

PLL

FUNCTION

FEEDBACK

CIRCUIT

OUTPUT DIVIDER

FRAME SYNC GENERATOR

CLKOUT2

CLKOUT1

SYNCOUT

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2. FUNCTIONAL DESCRIPTION

A clock input at CLKIN is converted to an alternate clock rate available on CLKOUT1. A higher multiple-rate clock also is available on CLKOUT2. Additionally, an 8kHz clock locked to CLKIN is always available at the SYNCOUT pin. The SEL pin controls clock-rate conversion selection.

2.1 Mode Select

The SEL pin is used to select the operating frequencies. Table 2-A shows the SEL state for the various operating modes of the DS21600, DS21602, and DS21604.

Table 2-A. Frequency Conversions (MHz)

PART SEL CLKIN CLKOUT1 CLKOUT2

DS21600

DS21602

DS21604

0 1.544 2.048 6.144 1 2.048 1.544 6.176 0 1.544 2.048 8.192 1 2.048 1.544 6.176 0 1.544 4.096 8.192

1 4.096 1.544 6.176

2.2 Frame-Sync Input

In all cases, CLKOUT1 and CLKOUT2 are frequency-locked to CLKIN. CLKOUT1, CLKOUT2, and SYNCOUT are phased-locked to SYNCIN when SYNCIN is asserted. The signal applied to SYNCIN can be 8kHz or some integer subrate such as 1kHz, 2kHz, or 4kHz. Phase synchronization occurs within a maximum of 50ms when SYNCIN is 8kHz.

3. OUTPUT JITTER

Table 3-A shows the output jitter specifications for 2.048MHz (or 4.096MHz) to 1.544MHz conversions (SEL = 1)

and 1.544MHz to 2.048MHz (or 4.096MHz) conversions (SEL = 0).

Table 3-A. Output Jitter Specifications

CLKIN

(MHz)

1.544 2.048

2.048 or

4.096

CLKOUT1

(MHz)

1.544

FREQUENCY

BAND

SPECIFICATION VALUE TYP MAX UNITS

20Hz–100kHz G.823 1.500 0.018 0.035 UI 18kHz–100kHz G.823 0.200 0.012 0.025 UI No bandlimiting TR62411 0.050 0.010 0.020 UI

10Hz–40kHz TR62411 0.025 0.005 0.010 UI 8kHz–40kHz TR62411 0.025 0.006 0.012 UI

P-P P-P P-P P-P P-P

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