General Description
The DS2127 Ultra3 LVD/SE SCSI terminator provides
low-voltage differential (LVD)/single-ended (SE) terminations for 14 SCSI lines. Through the voltage on the
DIFF_CAP pin, the device detects the types of drivers
on the bus. If the device is connected in an LVD-only
bus, the DS2127 provides LVD termination. If any single-ended devices are connected to the bus, the
DS2127 uses SE termination. If any high-voltage differential (HVD) devices are connected to the bus, the
DS2127 isolates itself from the SCSI bus. The mode
change has a built-in delay that is determined by an
integrated SPI-3 mode change filter/delay. The terminating resistors can also be disconnected from the bus
by asserting the ISO pin.
For the LVD termination, the DS2127 provides 14 precisely trimmed resistors. Each resistor is biased with
two current sources to a fail-safe state. For SE termination, the DS2127 provides 14 precision 110Ω resistors
and one regulator for active-negation bias.
Applications
SCSI Array Backplane
SCSI Cables
Features
♦ Fully Compliant with Ultra2, Ultra3, Ultra160, and
Ultra320 SCSI Standards
♦ Provides LVD/SE Termination for 14 Signal Pairs
♦ Auto-Selection of LVD or SE Termination
♦ 5% Tolerance on SE and LVD Termination
Resistance
♦ Low 3pF Power-Down Capacitance
♦ Built-In Mode-Change Filter/Delay
♦ On-Board Thermal-Shutdown Circuitry
♦ SCSI Bus Hot-Plug Compatible
♦ Fully Supports Actively Negated SE SCSI Signals
DS2127
Ultra3 LVD/SE SCSI 14-Line Terminator
______________________________________________ Maxim Integrated Products 1
Pin Configuration
Ordering Information
Rev 1; 3/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
查询DS2127供应商
PART TEMP RANGE
PINPACKAGE
DS2127 0°C to +70°C 48 LQFP DS2127
TOP
MARK
TOP VIEW
REF
R1N
R1P
V
HS_GND
HS_GND
HS_GND
HS_GND
HS_GND
HS_GND
TPWR
R14N
R14P
12111098765432
13
R2P
14
R2N
15
R3P
16
R3N
17
R4P
18
R4N
19
R5P
R5N
R6P
R6N
R7P
R7N
20
21
22
23
24
2526272829303132333435
SE
GND
LVD
DS2127
HS_GND
HS_GND
HS_GND
LQFP
HS_GND
HS_GND
HS_GND
DIFFSENS
DIFF_CAP
1
36
ISO
48
R13N
47
R13P
46
R12N
45
R12P
44
R11N
43
R11P
42
R10N
41
R10P
40
R9N
39
R9P
38
R8N
37
R8P
DS2127
Ultra3 LVD/SE SCSI 14-Line Terminator
2 _____________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(TPWR = V
TPWR(MIN)
to V
TPWR(MAX)
, TA= 0°C to +70°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on All Pins Relative to Ground ......-0.3V to +6.0V
V
REF
Continuous Output Current....................................±200mA
Operating Temperature Range...............................0°C to +70°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +160°C
Soldering Temperature .......................................See IPC/JEDEC
J-STD-020A Specification
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
TPWR Operating Supply Range
(Note 1)
TPWR SUPPLY CURRENT
TPWR Supply Current (All Lines
Open)
LVD TERMINATION (Applies to each line pair, 1 to 14 in LVD mode)
Differential-Mode Termination
Resistance
Common-Mode Termination
Resistance
Differential-Mode Bias V
Common-Mode Bias V
SE TERMINATION (Applies to single-ended terminators, 1 to 14 in SE mode)
Single-Ended Mode Termination
Resistance
Termination Current I
SE Voltage Reference V
Pin Leakage With ISO high 400 nA
Single-Ended GND Resistance R
TERMINATOR PIN CAPACITANCE
Terminator Pin Capacitance C
V
REGULATOR
REF
1.25V Regulator Output Voltage V
1.25V Regulator Short-Circuit
Source Current
1.25V Regulator Short-Circuit
Sink Current
V
TPWR
I
TPWR_LVD
I
TPWR_SE
I
TPWR_ISO
R
DM
R
CM
DM
CM
R
SE
REF
GND
REF_LVD
I
SOURCE
I
SINK
LVD 2.7 3.3 5.5
SE 4 5.0 5.5
LVD SCSI mode 32
SE SCSI mode 10
ISO mode (terminators disabled) 750 µA
100 110 Ω
RP and RN shorted together
(V
CM(MAX)
All lines open 100 125 mV
RP and RN shorted together (Note 1) 1.15 1.25 1.35 V
RSE = (VLX - 0.2) / ILX, where VLX = voltage
at terminator pin with pin unloaded and
SE
I
LX
the pin forced to 0.2V
Signal level at 0.2V, all lines low -21 -24 -25.4
Signal level at 0.5V -18 -22.4
Measured at RP pins, I = 10mA 20 60 Ω
With ISO high (Note 2) 3 pF
IN
0.5V ≤ V
and RN lines simultaneously
V
REF
V
REF
= 2V, V
= current for each terminator pin with
≤ 2.0V, VCM applied to all R
CM
= 0V -375 -700 -1000 mA
= 3.3V 170 300 700 mA
CM(MIN)
= 0.5V)
P
110 165 Ω
104.5 110 115.5 Ω
2.7 2.85 3.0 V
1.15 1.25 1.35 V
mA
mA
V
DS2127
Ultra3 LVD/SE SCSI 14-Line Terminator
_____________________________________________________________________ 3
Note 1: All voltages are referenced to ground.
Note 2: Guaranteed by design and not production tested.
Note 3: Room temperature only.
ELECTRICAL CHARACTERISTICS (continued)
(TPWR = V
TPWR(MIN)
to V
TPWR(MAX)
, TA= 0°C to +70°C, unless otherwise noted.)
V
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
REGULATOR
REF
1.25V Regulator Line Regulation
V
unloaded; vary TPWR from
REF
2.7V to 5.5V
1.0 2.5 %
2.85V Regulator 2.7 2.85 3.0 V
2.85V Regulator Short-Circuit
Source Current
2.85V Regulator Short-Circuit
Sink Current
2.85V Regulator Line Regulation
V
V
= 0V -375 -700 -1000 mA
REF
= 3.3V 170 300 700 mA
REF
V
unloaded; vary TPWR from
REF
2.7V to 5.5V
1.0 2.5 %
DIFFSENS OUTPUT
DIFFSENS Driver Output Voltage V
DIFFSENS Driver Source Current I
DIFFSENS Driver Sink Current I
DIFFSENS Leakage (Note 3)
THERMAL SHUTDOWN
Thermal-Shutdown Threshold For increasing temperature 130 °C
Thermal-Shutdown Hysteresis 10 °C
MODE CHANGE DELAY/FILTER
Mode Change Delay t
LOGICAL SIGNALS (ISO)
Input Low Voltage V
Input High Voltage V
Input Current I
STATUS BITS (LVD, SE)
Source Current I
Sink Current I
DIFF_CAP
Input Current IL VIL = -0.3V -1 +1 µA
DIFF_CAP SE Operating Range V
DIFF_CAP LVD Operating Range V
DIFF_CAP HVD Operating Range V
DSO
DSH
DSL
I
LEAK,
LOW
I
LEAK,
HIGH
DELAY
OH
OL
SEOR
LVDOR
HVDOR
-5mA ≤ I
V
V
DIFFSENS
DIFFSENS
DIFFSENS
With ISO high, |V
With ISO high, |V
IL
IH
VCC = 3.3V -30 -10 µA
IL
VCC = 3.3V, V
VCC = 3.3V, V
≤ 50µA 1.2 1.4 V
= 0V -15 -5 mA
= 2.75V 100 200 µA
DIFFSENS
DIFFSENS
LOAD
LOAD
| = 0.3V -3 +1
TPWR
| = 0.3V
1 3
0.66 1.25 2.00 ms
-0.3 +0.8 V
2.0 TPWR + 0.3 V
- V
= 2.4V -4 -6 mA
= 0.4V 2 5 mA
-0.3 +0.5 V
0.7 1.9 V
2.4 V
TPWR
+ 0.3 V
µA
DS2127
Ultra3 LVD/SE SCSI 14-Line Terminator
4 _____________________________________________________________________
Pin Description
Figure 1. Block Diagram
2.15V
2.15V
1.30V
0.6V
HVD
LVD
1.30V
SE
110Ω
52Ω
124Ω
124Ω
V
REF
110Ω
52Ω
52Ω
52Ω
DIFF_CAP
0.6V
SHUTDOWN
ISO
10µA
DS2127
BANDGAP
SE ALL SWITCHES UP
HVD/ISO ALL SWITCHES CENTER
LVD ALL SWITCHES DOWN
THERMAL
DELAY/
FILTER
REFGEN AND
1.25V
(LVD)
LVD
SE
HVD
LVD SE
CONTROL LOGIC
TRIM
2.85V
(SE)
LVD
SE
DIFFSENS
R1N
R1P
R14N
R14P
PIN NAME FUNCTION
1, 2, 11–24,
37–48
3 TPWR
R_ _ P, R_ _ N
Signal Termination. Connect to SCSI bus signal lines. Asserting ISO removes the terminators from the
SCSI bus. R_ _ P pins are the ground line for SE operation and the positive lines in differential mode.
R_ _ N pins are the signal lines in SE operation and the negative lines in differential mode.
Termination Power. Connect to the SCSI TERMPWR line and decouple with a ceramic
2.2µF capacitor.
Heat-Sink Ground. Internally connected to the mounting pad. These pins must be connected to
4–9, 28–33 HS_GND
ground. These pins should be connected to a ground plane with the layout optimized for
heat transfer.
Regulator Output Voltage. This must be decoupled with a 4.7µF capacitor. Asserting ISO floats this
10 V
REF
output. A high-frequency capacitor (0.1µF) should also be placed on the V
use fast rise/fall-time drivers.
25 GND Signal Ground
26 SE SE Mode Indicator. A high state indicates SE mode detected on SCSI bus.
27 LVD LVD Mode Indicator. A high state indicates LVD mode detected on SCSI.
34 DIFF_CAP
DIFFSENSE Capacitor. Connect a 0.1µF capacitor for the DIFFSENSE filter. Input to detect the type of
device (differential or single-ended) on the SCSI bus.
35 DIFFSENS DIFFSENSE. Output to drive the SCSI bus DIFFSENS line.
Isolation Input. When pulled high, terminating resistors and biasing current sources are removed from
36 ISO
the SCSI bus. When not connected to ground, the pin has a 10µA current source pulling the pin to the
high state.
pin in applications that
REF
Detailed Description
The DS2127 provides dual-mode active terminators
with auto-switching SE and LVD termination for 14 SCSI
lines. The DIFFSENSE signal performs mode detection
and selection.
In LVD mode, the termination configuration is a y-type
terminator with a 105Ω differential resistance and a
150Ω common-mode resistance. The termination resistor is biased with two current sources and the commonmode node is connected to a 1.25V voltage regulator.
A fail-safe bias of 112mV is maintained when no drivers
are connected to the SCSI bus.
In SE mode, each negative signal input pin is connected to 2.85V through a 110Ω resistor.
In HVD mode, the termination resistors are isolated
from the SCSI bus and the resistor pins are left floating.
The voltage regulator is powered down and the V
REF
pin is in a high-impedance state.
The DIFF_CAP pin is connected to the SCSI DIFFSENSE
line and monitors the voltage to determine the proper
operating mode of the device. Any DIFFSENSE voltage
below 0.5V indicates single ended; any DIFFSENSE voltage between 0.7V and 1.9V is LVD, and above 2.4V is
an HVD SCSI. On power-up, the DS2127 assumes SE
mode. If the voltage on the DIFF_CAP is between 0.7V
and 1.9V, the device waits t
DELAY
before entering the
LVD mode. The delay is the same when changing
modes. A new mode change can start at any time after a
previous mode change has been detected.
Typically, four DS2127s are used in a SCSI bus segment. On two chips, the DIFF_CAP inputs at each end
of the bus should be connected together. There should
be a 50Hz noise filter implemented on DIFF_CAP at
each end of the bus, as close as possible to the
DIFF_CAP pins. This filter consists of a 20kΩ resistor
between the DIFFSENS and DIFF_CAP pins, and a
0.1µF capacitor from DIFF_CAP to GND. See Figure 2
for the typical operating circuit.
When ISO is connected to TPWR, the termination pins
are isolated from the SCSI bus and V
REF
becomes
inactive, and the device is in a low-power state. During
thermal shutdown, the termination pins are isolated
from the SCSI bus and V
REF
becomes high impedance.
The DIFFSENS driver is shut down during either of
these two events. LVD and SE signals indicate whether
the SCSI bus segment is in LVD or SE mode.
Chip Information
TRANSISTOR COUNT: 8114 CMOS and 87 Bipolar
PROCESS: BiCMOS
SUBSTRATE CONNECTED TO GROUND
Thermal Information
Thermal Resistance (junction-to-ambient):
θJA= +29°C/W
Thermal Resistance (junction-to-case):
θJC= +10°C/W
DS2127
Ultra3 LVD/SE SCSI 14-Line Terminator
_____________________________________________________________________ 5
Figure 2. Typical Operating Circuit
TPWR
2.2µF
2.2µF
4.7µF
ISO
GND
V
REF
TPWR
ISO
GND
V
REF
DIFFSENS
DIFF_CAP
0.1µF
DIFF_CAP
DIFFSENS
4.7µF
CONTROL LINES (9)
20kΩ 20kΩ
DATA LINES (8) + PARITY
DATA LINES (4) + PARITY
TPWR
2.2µF
4.7µF
2.2µF
DATA LINES (4)
DIFFSENS
DIFFSENS
DIFF_CAP
0.1µF
DIFF_CAP
DIFFSENS
4.7µF
ISO
GND
V
REF
TPWR
ISO
GND
V
REF
DS2127
Ultra3 LVD/SE SCSI 14-Line Terminator
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
6 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
6 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package
outline information, go to www.maxim-ic.com/packages
.)
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