DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
______________________________________________ Maxim Integrated Products 1
For pricing delivery, and ordering information please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
General Description
The DS1859 dual, temperature-controlled, nonvolatile
(NV) variable resistors with three monitors consists of
two 50kΩ or two 20kΩ, 256-position, linear, variable
resistors; three analog monitor inputs (MON1, MON2,
MON3); and a direct-to-digital temperature sensor. The
device provides an ideal method for setting and temperature-compensating bias voltages and currents in
control applications using minimal circuitry. The variable resistor settings are stored in EEPROM memory
and can be accessed over the 2-wire serial bus.
Applications
Optical Transceivers
Optical Transponders
Instrumentation and Industrial Controls
RF Power Amps
Diagnostic Monitoring
Features
♦ SFF-8472 Compatible
♦ Five Monitored Channels (Temperature, VCC,
MON1, MON2, MON3)
♦ Three External Analog Inputs (MON1, MON2, MON3)
That Support Internal and External Calibration
♦ Scalable Dynamic Range for External Analog Inputs
♦ Internal Direct-to-Digital Temperature Sensor
♦ Alarm and Warning Flags for All Monitored
Channels
♦ Two 50kΩ or Two 20kΩ, Linear, 256-Position,
Nonvolatile Temperature-Controlled Variable
Resistors
♦ Resistor Settings Changeable Every 2°C
♦ Access to Monitoring and ID Information
Configurable with Separate Device Addresses
♦ 2-Wire Serial Interface
♦ Two Buffers with TTL/CMOS-Compatible Inputs and
Open-Drain Outputs
♦ Operates from a 3.3V or 5V Supply
♦ Operating Temperature Range of -40°C to +95°C
Ordering Information
Rev 4; 2/06
EVALUATION KIT
AVAILABLE
PIN-PACKAGE
DS1859B-020 20kΩ 16 CSBGA
DS1859B-020+ 20kΩ 16 CSBGA
DS1859B-050 50kΩ 16 CSBGA
DS1859B-050+ 50kΩ 16 CSBGA
A
TOP VIEW
B
C
D
1
CSBGA (4mm x 4mm)
1.0mm PITCH
TSSOP
324
MON3
OUT1IN2
MON1
L0GND
WPEN
L1
H0SDA
OUT2
H1
V
CC
SCLIN1
MON2
DS1859
SDA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SCL
OUT1
IN1
OUT2
IN2
WPEN
GND
V
CC
H1
L1
H0
L0
MON3
MON2
MON1
DS1859
SDA
1
2
3
4
5
6
7
8
16
0.1µF
15
14
13
12
11
10
9
SCL
OUT1
IN1
OUT2
IN2
WPEN
GND
V
CC
H1
L1
H0
L0
MON3
MON2
MON1
GROUND TO
DISABLE WRITE
PROTECT
Rx POWER*
DIAGNOSTIC
INPUTS
TO LASER
MODULATION
CONTROL
TO LASER BIAS
CONTROL
DECOUPLING
CAP
Tx POWER*
Tx BIAS*
*SATISFIES SFF-8472 COMPATIBILITY
V
CC
VCC = 3.3V
4.7kΩ4.7kΩ
Tx-FAULT
LOS
2-WIRE
INTERFACE
Typical Operating Circuit
+Denotes lead-free package.
Ordering Information continued at end of data sheet.
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
2 _____________________________________________________________________
Supply Voltage V
CC
(Note 1)
V
Resistor Inputs (L0, L1, H0, H1)
V
Resistor Current I
RES
-3 +3 mA
High-Z Resistor Current I
ROFF
Input Logic Levels (IN1, IN2)
Input logic 0 0.9
V
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VCCRelative to Ground ...........-0.5V to +6.0V
Voltage Range on Inputs Relative
to Ground* ................................................-0.5V to V
CC
+ 0.5V
Voltage Range on Resistor Inputs Relative
to Ground* ................................................-0.5V to V
CC
+ 0.5V
Current into Resistors............................................................5mA
Operating Temperature Range ...........................-40°C to +95°C
Programming Temperature Range .........................0°C to +70°C
Storage Temperature Range .............................-55°C to +125°C
Soldering Temperature .......................................See IPC/JEDEC
J-STD-020A
RECOMMENDED DC OPERATING CONDITIONS
(TA= -40°C to +95°C, unless otherwise noted.)
Supply Current I
CC
(Note 3) 1 2 mA
Input Leakage I
IL
nA
V
OL1
3mA sink current 0 0.4
Low-Level Output Voltage
(SDA, OUT1, OUT2)
V
OL2
6mA sink current 0 0.6
V
Full-Scale Input (MON1, MON2,
MON3)
At factory setting
(Note 4)
V
Full-Scale VCC Monitor
At factory setting
(Note 5)
V
I/O Capacitance C
I/O
10 pF
WPEN Pullup R
WPEN
40 65 100 kΩ
Digital Power-On Reset POD
2.2 V
Analog Power-On Reset POA
DC ELECTRICAL CHARACTERISTICS
(VCC= 2.85V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
*Not to exceed 6.0V.
Input Logic 1 (SDA, SCL, WPEN)
Input Logic 0 (SDA, SCL, WPEN)
2.85
0.7 x Vcc VCC + 0.3
-0.3 +0.3 x V
-0.3 VCC + 0.3
0.001
1.5
CC
SYMBOL
MIN TYP MAX
-200 +200
2.4875
6.5208 6.5536 6.5864
1.0
2.0
2.5125
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
_____________________________________________________________________ 3
Thermometer Error T
ERR
-40°C to +95°C
DIGITAL THERMOMETER
(VCC= 2.85V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
NONVOLATILE MEMORY CHARACTERISTICS
(VCC= 2.85V to 5.5V)
µV
Supply Resolution ∆V
CC
1.6 mV
Input/Supply Accuracy
(MON1, MON2, MON3, V
CC
)
A
CC
At factory setting
Update Rate for MON1, MON2,
MON3, Temp, or V
CC
t
frame
30 45 ms
Input/Supply Offset
(MON1, MON2, MON3, V
CC
)
V
OS
(Note 14) 0 5 LSB
ANALOG VOLTAGE MONITORING
(VCC= 2.85V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
Position 00h Resistance (50kΩ)T
A
= +25°C
kΩ
Position FFh Resistance (50kΩ)T
A
= +25°C 40 50 60 kΩ
Position 00h Resistance (20kΩ)T
A
= +25°C
kΩ
Position FFh Resistance (20kΩ)T
A
= +25°C 16 20 24 kΩ
Absolute Linearity (Note 6) -2 +2 LSB
Relative Linearity (Note 7) -1 +1 LSB
Temperature Coefficient (Note 8) 50
ANALOG RESISTOR CHARACTERISTICS
(VCC= 2.85V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
SYMBOL
∆VMON 610
0.65
0.20 0.40 0.55
MIN TYP MAX UNITS
0.25 0.5
1.35
ppm/°C
(full scale)
SYMBOL
MIN TYP MAX
50,000
±3.0
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
4 _____________________________________________________________________
Fast mode (Note 9) 0 400
SCL Clock Frequency f
SCL
Standard mode (Note 9) 0 100
kHz
Fast mode (Note 9) 1.3
Bus Free Time Between STOP and
START Condition
t
BUF
Standard mode (Note 9) 4.7
µs
Fast mode (Notes 9, 10) 0.6
Hold Time (Repeated)
START Condition
Standard mode (Notes 9, 10) 4.0
µs
Fast mode (Note 9) 1.3
LOW Period of SCL Clock t
LOW
Standard mode (Note 9) 4.7
µs
Fast mode (Note 9) 0.6
HIGH Period of SCL Clock t
HIGH
Standard mode (Note 9) 4.0
µs
Fast mode (Notes 9, 11, 12) 0 0.9
Data Hold Time
Standard mode (Notes 9, 11, 12) 0
µs
Fast mode (Note 9)
ns
Fast mode (Note 9) 0.6
START Setup Time
Standard mode (Note 9) 4.7
µs
Fast mode (Note 13)
300
Rise Time of Both SDA and SCL
Signals
t
R
Standard mode (Note 13)
300
Fall Time of Both SDA and SCL
Signals
t
F
Standard mode (Note 13)
300
ns
Fast mode 0.6
Setup Time for STOP Condition
Capacitive Load for Each Bus Line
C
B
(Note 13) 400 pF
EEPROM Write Time t
W
(Note 14) 10 20 ms
AC ELECTRICAL CHARACTERISTICS
(VCC= 2.85V to 5.5V, TA= -40°C to +95°C, unless otherwise noted. See Figure 6.)
Note 1: All voltages are referenced to ground.
Note 2: I/O pins of fast-mode devices must not obstruct the SDA and SCL lines if V
CC
is switched off.
Note 3: SDA and SCL are connected to V
CC
and all other input signals are connected to well-defined logic levels.
Note 4: Full Scale is user programmable. The maximum voltage that the MON inputs read is approximately Full Scale, even if the volt-
age on the inputs is greater than Full Scale.
Note 5: This voltage defines the maximum range of the analog-to-digital converter voltage, not the maximum V
CC
voltage.
Note 6: Absolute linearity is the difference of measured value from expected value at DAC position. The expected value is a
straight line from measured minimum position to measured maximum position.
Note 7: Relative linearity is the deviation of an LSB DAC setting change vs. the expected LSB change. The expected LSB change
is the slope of the straight line from measured minimum position to measured maximum position.
Note 8: See the Typical Operating Characteristics.
Note 9: A fast-mode device can be used in a standard-mode system, but the requirement t
SU:DAT
> 250ns must then be met. This
is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the
LOW period of the SCL signal, it must output the next data bit to the SDA line t
RMAX
+ t
SU:DAT
= 1000ns + 250ns = 1250ns
before the SCL line is released.
SYMBOL
MIN TYP MAX
t
HD:STA
t
HD:DAT
t
SU:DAT
t
SU:STA
t
SU:STO
100
250
20 + 0.1C
20 + 0.1C
20 + 0.1C
20 + 0.1C
B
B
B
B
1000
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
_____________________________________________________________________ 5
Note 10: After this period, the first clock pulse is generated.
Note 11: The maximum t
HD:DAT
only has to be met if the device does not stretch the LOW period (t
LOW
) of the SCL signal.
Note 12: A device must internally provide a hold time of at least 300ns for the SDA signal (see the V
IH MIN
of the SCL signal) to
bridge the undefined region of the falling edge of SCL.
Note 13: C
B
—total capacitance of one bus line, timing referenced to 0.9 x VCCand 0.1 x VCC.
Note 14: Guaranteed by design.
Typical Operating Characteristics
(VCC= 5.0V, TA= +25°C, for both 50kΩ and 20kΩ versions, unless otherwise noted.)
TEMPERATURE (°C)
40 60 80200-20
560
600
640
680
720
520
-40 100
SUPPLY CURRENT vs. TEMPERATURE
DS1859 toc01
SUPPLY CURRENT (µA)
SDA = SCL = V
CC
SUPPLY CURRENT vs. VOLTAGE
DS1859 toc02
VOLTAGE (V)
SUPPLY CURRENT (µA)
5.04.54.03.5
450
500
550
600
650
700
400
3.0 5.5
SDA = SCL = V
CC
RESISTANCE vs. SETTING
DS1859 toc03
SETTING (DEC)
RESISTANCE (kΩ)
20015010050
10
20
30
40
50
60
0
0 250
50kΩ VERSION
RESISTANCE vs. SETTING
DS1859 toc04
SETTING (DEC)
RESISTANCE (kΩ)
20015010050
5
10
15
20
0
0 250
20kΩ VERSION
ACTIVE SUPPLY CURRENT
vs. SCL FREQUENCY
DS1859 toc05
SCL FREQUENCY (kHz)
ACTIVE SUPPLY CURRENT (µA)
300200100
600
640
680
720
760
560
0 400
SDA = V
CC
RESISTOR 0 INL (LSB)
DS1859 toc06
SETTING (DEC)
RESISTOR 0 INL (LSB)
225200150 17550 75 100 12525
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
0 250
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
6 _____________________________________________________________________
Typical Operating Characteristics (continued)
(VCC= 5.0V, TA= +25°C, for both 50kΩ and 20kΩ versions, unless otherwise noted.)
RESISTOR 0 DNL (LSB)
DS1859 toc07
SETTING (DEC)
RESISTOR 0 DNL (LSB)
225200150 17550 75 100 12525
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
0 250
RESISTOR 1 INL (LSB)
DS1859 toc08
SETTING (DEC)
RESISTOR 1 INL (LSB)
225200150 17550 75 100 12525
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
0 250
RESISTOR 1 DNL (LSB)
DS1859 toc09
SETTING (DEC)
RESISTOR 1 DNL (LSB)
225200150 17550 75 100 12525
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
0 250
POSITION 00h RESISTANCE
vs. TEMPERATURE
DS1859 toc12
TEMPERATURE (°C)
RESISTANCE (kΩ)
20 35 50 65 805-10-25
0.96
0.97
0.98
0.99
1.00
0.95
-40 95
50kΩ VERSION
RESISTANCE
vs. POWER-UP VOLTAGE
DS1859 toc11
POWER-UP VOLTAGE (V)
RESISTANCE (kΩ)
2341
30
20
40
50
60
70
80
90
100
110
120
0
10
05
PROGRAMMED
RESISTANCE
(80h)
>1MΩ 20kΩ VERSION
RESISTANCE
vs. POWER-UP VOLTAGE
DS1859 toc10
POWER-UP VOLTAGE (V)
RESISTANCE (kΩ)
2341
30
20
40
50
60
70
80
90
100
110
120
0
10
05
PROGRAMMED
RESISTANCE
(80h)
>1MΩ 50kΩ VERSION
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
_______________________________________________________________________________________ 7
Typical Operating Characteristics (continued)
(VCC= 5.0V, TA= +25°C, for both 50kΩ and 20kΩ versions, unless otherwise noted.)
POSITION FFh RESISTANCE
vs. TEMPERATURE
DS1859 toc14
TEMPERATURE (°C)
RESISTANCE (kΩ)
80655035205-10-25
51.20
51.40
51.60
51.80
52.00
51.00
-40 95
50kΩ VERSION
POSITION FFh RESISTANCE
vs. TEMPERATURE
DS1859 toc15
TEMPERATURE (°C)
RESISTANCE (kΩ)
80655035205-10-25
19.20
19.40
19.50
19.80
20.00
19.00
-40 95
20kΩ VERSION
TEMPERATURE COEFFICIENT vs. SETTING
DS1859 toc16
SETTING (DEC)
TEMPERATURE COEFFICIENT (ppm/°C)
20015010050
100
50
0
-50
150
200
250
300
350
400
-100
0 250
50kΩ VERSION
+25°C TO +95°C
+25°C TO -40°C
TEMPERATURE COEFFICIENT vs. SETTING
DS1859 toc17
SETTING (DEC)
TEMPERATURE COEFFICIENT (ppm/°C)
20015010050
100
0
200
300
400
500
600
700
800
-100
0 250
+25°C TO +95°C
+25°C TO -40°C
20kΩ VERSION
LSB ERROR vs. FULL-SCALE INPUT
DS1859 toc18
NORMALIZED FULL SCALE (%)
LSB ERROR
755025
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
-8
0 100
+3 SIGMA
-3 SIGMA
MEAN
LSB ERROR vs. FULL-SCALE INPUT
DS1859 toc19
NORMALIZED FULL SCALE (%)
LSB ERROR
9.3756.2503.125
-3
-2
-1
0
1
2
3
-4
0 12.500
+3 SIGMA
-3 SIGMA
MEAN
POSITION 00h RESISTANCE
vs. TEMPERATURE
DS1859 toc13
TEMPERATURE (°C)
RESISTANCE (kΩ)
80655035205-10-25
0.34
0.35
0.36
0.37
0.38
0.33
-40 95
20kΩ VERSION
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
8 _____________________________________________________________________
Detailed Description
The user can read the registers that monitor the VCC,
MON1, MON2, MON3, and temperature analog signals.
After each signal conversion, a corresponding bit is set
that can be monitored to verify that a conversion has
occurred. The signals also have alarm and warning flags
that notify the user when the signals go above or below
the user-defined value. Interrupts can also be set for
each signal.
The position values of each resistor can be independently programmed. The user can assign a unique
value to each resistor for every 2°C increment over the
-40°C to +102°C range.
Two buffers are provided to convert logic-level inputs
into open-drain outputs. Typically, these buffers are
used to implement transmit (Tx) fault and loss-of-signal
(LOS) functionality. Additionally, OUT1 can be asserted
in the event that one or more of the monitored values
go beyond user-defined limits.
2-Wire Serial Data I/O Pin. Transfers serial data to and from the device.
2A2SCL 2-Wire Serial Clock Input. Clocks data into and out of the device.
3C3
Open-Drain Buffer Output
4A1IN1 TTL/CMOS-Compatible Input to Buffer
5B1
Open-Drain Buffer Output
6C2IN2 TTL/CMOS-Compatible Input to Buffer
7C1
Write Protect Enable. The device is not write protected if WPEN is connected to ground. This pin has
an internal pullup (R
WPEN
). See Table 6.
8D1
External Analog Input
10 D4
External Analog Input
11 C4
External Analog Input
12 D2 L0
Low-End Resistor 0 Terminal. It is not required that the low-end terminals be connected to a potential
less than the high-end terminals of the corresponding resistor. Voltage applied to any of the resistor
terminals cannot exceed the power-supply voltage, V
CC
, or go below ground.
13 B3 H0
High-End Resistor 0 Terminal. It is not required that the high-end terminals be connected to a
potential greater than the low-end terminals of the corresponding resistor. Voltage applied to any of
the resistor terminals cannot exceed the power-supply voltage, V
CC
, or go below ground.
14 B4 L1 Low-End Resistor 1 Terminal
15 A4 H1 High-End Resistor 1 Terminal
16 A3 V
CC
Supply Voltage
BALL NAME
SDA
OUT1
OUT2
WPEN
GND
MON1
MON2
MON3
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
_____________________________________________________________________ 9
DEVICE
ADDRESS
AD (AUXILIARY DEVICE ENABLE A0h)
MD (MAIN DEVICE ENABLE)
DEVICE ADDRESS
ADDRESS
ADDRESS
ADDRESS
R/W
R/W
TxF
DATA BUS
R/W
TxF
RxL
LOS
ADEN ADFIX
SDA
SCL
IN1
OUT1
2-WIRE
INTERFACE
MINT
INV1
Tx FAULT
IN2
MON2
MON1
MON3
V
CC
GND
WPEN
OUT2
INV2
EEPROM
128 x 8 BIT
00h-7Fh
STANDARDS
PROT
AUX
AD
ADDRESS
TABLE
SELECT
R/W
EEPROM
72 x 8 BIT
80h-C7h
TABLE 02
RESISTOR 0
LOOK-UP
TABLE
PROT
MAIN
MD
EEPROM
96 x 8 BIT
00h-5Fh
LIMITS
SRAM
32 x 8 BIT
60h-7Fh
NOT PROTECTED
PROT
MAIN
MD
TEMP INDEX
ALARM FLAGS
WARNING FLAGS
MUX
CTRL
MEASUREMENT
ADDRESS
TABLE
SELECT
R/W
EEPROM
72 x 8 BIT
80h-C7h
TABLE 03
RESISTOR 1
LOOK-UP
TABLE
PROT
MAIN
MD
TEMP INDEX
R
WPEN
MONITORS LIMIT
HIGH
MONITORS LIMIT
LOW
TABLE SELECT
TEMP INDEX
MINT (BIT)
INTERNAL
TEMP
V
CC
MUX
ADC
12-BIT
INTERNAL
CALIBRATION
A/D
CTRL
V
CC
V
CC
PROT AUX
PROT MAIN
MPEN
APEN
COMPARATOR
MEASUREMENT
ALARM FLAGS
WARNING FLAGS
MONITORS LIMIT LOW
MONITORS LIMIT HIGH
COMP CTRL
INTERRUPT
MINT
TABLE 01
EEPROM
16 x 8 BIT
80h-8Fh
VENDOR
PROT
MAIN
MD R/W
DEVICE ADDRESS
ADDRESS
TABLE SELECT
MASKING (TMP, V
CC
, MON1, MON2, MON3)
ADFIX (BIT)
ADEN (BIT)
MPEN (BIT)
APEN (BIT)
INV2 (BIT)
INV1 (BIT)
RESISTOR 0
50kΩ OR 20kΩ FULL SCALE
256 POSITIONS
L0
H0
REGISTERREGISTER
RESISTOR 1
50kΩ OR 20kΩ FULL SCALE
256 POSITIONS
L1
H1
RIGHT
SHIFTING
DS1859