MAXIM DS1672 User Manual
TYPICAL OPERATING CIRCUIT
PDIP
µ
TOP VIEW
1
2 3 4 8 7 6 5
VCC
RST
SCL
SDA
X1
X2
V
BACKUP
GND
DS1672
DS1672
I2C 32-Bit Binary Counter RTC
19-6032; Rev 9/11
GENERAL DESCRIPTION
The DS1672 incorporates a 32-bit counter and
power-monito ring funct ions. The 32-bit counter
is designed to count seconds and can be used to
derive time-of-day, week, month, month, and
year by using a software a lgorithm. A p re c is io n,
temperature-compensated reference and
comparator circuit monitors the status of VCC.
When an out-of-tolerance condition occurs, an
inte r na l powe r -fail signal is generated that for ces
the reset to the active stat e. When VCC r eturns to
an in-tolerance cond ition, the reset signal is kept
in the active state for a period of time to allow
the power supply and processor to stabilize.
FEATURES
32-Bit Counter
I2C Serial Interface
Automatic Power -Fail Detect and Switch
Circuitry
Power-Fail Res e t Output
Low-Voltage Oscillator Operat ion
(1.3V min)
Trickle-C harge Capability
Underwriters Labor at or ies (UL) Recog nized
-40°C to +85°C Operating Range
PIN CONFIGURATION
.
SO
SOP
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ORDERING INFORMATION
8 SO (150 mils)/Tape
and Reel
8 SO (150 mils)/Tape
and Reel
1672
rr -2
1672
rr -3
1672
rr -33
8 µSOP(3mm)/Tape
and Reel
1672
rr -33
PART TEMP RANGE VOLTAGE (V) PIN-PACKAGE TOP MARK*
DS1672-2+ -40°C to +85°C 2.0 8 PDIP (300 mils) DS1672-2
DS1672-3+ -40°C to +85°C 3.0 8 PDIP (300 mils) DS1672-3
DS1672-33+ -40°C to +85°C 3.3 8 PDIP (300 mils) DS1672-33
DS1672S-2+ -40°C to +85°C 2.0 8 SO (150 mils) D1672-2
DS1672S-3+ -40°C to +85°C 3.0 8 SO (150 mils) D1672-3
DS1672S-33+ -40°C to +85°C 3.3 8 SO (150 mils) D167233
DS1672
DS1672S-3+T&R -40°C to +85°C 3.0
DS1672S-33+T&R -40°C to +85°C 3.3
DS1672U-2+ -40°C to +85°C 2.0
DS1672U-3+ -40°C to +85°C 3.0
DS1672U-33+ -40°C to +85°C 3.3
8 µSOP(3mm)
8 µSOP(3mm)
8 µSOP(3mm)
DS1672U-33+T&R -40°C to +85°C 3.3
+ Denotes a lead-free/RoHS-compliant de vice.
* A “+” anywh er e on the top mark deno t es a lea d-free device. rr = 2-digit alphanumeric revision code.
D1672-3
D167233
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DS1672
DS1672-2
VCC
1.8
2.0
5.5
DS1672-3
VCC
2.7
3.0
5.5
DS1672-33
VCC
2.97
3.3
5.5
Logic 1
VIH
0.7 x VCC
V
CC
+ 0.5
V
Logic 0
VIL
-0.5
+0.3 x VCC
V
Backup Supply Voltage
V
BACKUP
1.3
3.0
3.63
V
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Active Supply Current
I
-2: VCC = 2.2V
600
µA
-3: VCC = 3.3V
-33: VCC = 3.63V
Standby C urrent
I
-2: VCC = 2.2V
500
µA
-3: VCC = 3.3V
-33: VCC = 3.63V
Power-F ail Vo ltage
VPF
-2:
2.70
2.88
2.97
V
-3:
2.45
2.60
2.70
-33:
1.58
1.70
1.80
V
BACKUP
L eakage Curre n t
I
BACKUPLKG
25
50
nA
Logic 0 Output (Note 4)
IOL
VOL = 0.4V
3
mA
Logic 0 Output (Note 4,
IOL
VCC > 2 V; VOL = 0.4V
3
mA
VCC < 2 V; VOL = VCC
* 0.2
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relat ive to Ground……………………………………………..-0.5V to +6.0V
Operating Temperature Range (noncondensing) ...…………………………………………-40°C to +85°C
Storage Temperature Range……………………………………………………………….-55°C to +125°C
Soldering Temperature (reflow)………………………………………….…………………. +260°C
Lead Temperature (soldering, 10s) ……………………………………………………………….. +260°C
This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operation
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time can affect device
reliability.
RECOMMENDED OPERATING CONDITIONS
(TA = -40°C to +85°C) (Note 1)
PARAMETER SYMBOL MIN TYP MAX UNITS
Supply
Voltage
Note 1: All voltages referenced to ground.
DC ELECTRICAL CHARACTERISTICS
(V
(Note 2)
(Note 3)
CCMIN
< VCC < V
CCMAX, TA
= -40°C to +85°C.) (Note 1)
CCA
CCS
V
DS1672-2 Onl y)
Note 1: All voltages referenced to ground.
Note 2: I
Note 3: I
Note 4: SDA and RST.
specified with SCL clocking at max frequency (400kHz), trickle charger disabled.
CCA
specified with VCC = V
CCS
and SDA, SCL = V
CCTYP
, tr ickle charger disabled.
CCTYP
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DC ELECTRICAL CHARACTERISTICS
V
BACKUP
Cu rrent (Oscillator On)
I
BACKUPOSC
0.425
1
µA
V
BACKUP
Current (Oscillator Off)
I
BACKUP
200
nA
Nomi nal Frequency
fO
32.768
kHz
Series Resistanc e
ESR
45
kΩ
Load Capacitance
CL 6 pF
(VCC = 0V, TA = -40°C to +85°C.) (Note 5)
PARAMETER SYMBOL MIN TYP MAX UNITS
Note 5: Using the recommended crystal on X1 and X2.
CRYSTAL SPECIFICATIONS
PARAMETER SYMBOL MIN TYP MAX UNITS
*The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to Application Note 58: Crystal
Considerations for Dallas Real -Time Clocks for additional specifications
*
DS1672
4 of 15
AC ELECTRICAL CHARACTERISTICS
Bus Free T ime
START Condition
Hold Time
Condition (Note 6 )
Fast mode
1.3
Setup Time for a
Condition
Rise T ime of B oth
Signals (Note 10)
Fall Time of Both
Signals (Note 10)
Ca pacitive Load for
(Note 10)
(VCC = 0V, TA = -40°C to +85°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DS1672
SCL Clock
Frequency
Bet ween a STOP a nd
(R epeated) STA RT
LOW Peri od of SCL
Clock
HIGH Period of SCL
Clock
Repea ted ST ART
Data Hol d Time
(Notes 7, 8)
Data Setup Time
(Note 9)
f
SCL
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
Fast mode 100 400
Standard mod e 100
Fast mode 1.3
Standard mod e 4.7
Fast mode 0.6
Standard mod e 4.0
Standard mod e 4.7
Fast mode 0.6
Standard mod e 4.0
Fast mode 0.6
Standard mod e 4.7
Fast mode 0 0.9
Standard mod e 0
Fast mode 100
Standard mod e 250
kHz
µs
µs
µs
µs
µs
µs
ns
Fast mode 20 + 0.1CB 300
SDA and SC L
SDA and SC L
t
tF
R
Standard mod e 1000
Fast mode 20 + 0.1C
300
B
Standard mod e 300
Setup Time for STOP
Condition
Each Bus Line
I/O Capacitance C
Note 6: After this period, the first clock pulse is generated.
Note 7: A device must internally provide a hold time of at least 300ns for the SDA signal (referenced to the V
order to br i dge the undefined r egion of the fallin g edge of SC L.
Note 8:The maximum t
Note 9: A fast-mode device can be used in a standard-mode system, but the requirement t
automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW
period of the SCL signal, it must output the next data bit to the SDA line t
line is relea sed.
Note 10: C
–Total capacitance of one bus line in pF.
B
HD:DAT
t
SU:STO
CB 400 pF
I/O
has only to be met if the device does not stretch the LOW period (t
Fast mode 0.6
Standard mod e 4.0
10 pF
) of th e SCL sign al.
LOW
≥ to 250ns must then be met. This will
SU:DAT
m ax + t
R
= 1000 + 250 = 1250ns before the SCL
SU:DAT
ns
ns
µs
of the SCL signal) in
IHMIN
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