MAXIM DS1647, DS1647P User Manual

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Nonvolatile Timekeeping RAM

www.maxim-ic.com

FEATURES

 Integrates NV SRAM, Real-Time Clock,

Crystal, Power-Fail Control Circuit, and
Lithium Energy Source

 Clock Registers Are Accessed Identically to

the Static RAM. These Registers are
Resident in the Eight Top RAM Locations.

 Totally Nonvolatile with Over 10 Years of

Operation in the Absence of Power

 BCD Coded Year, Month, Date, Day, Hours,

Minutes, and Seconds with Leap Year
Compensation Valid Through 2099

 Power-Fail Write Protection Allows for

±10% VCC Power-Supply Tolerance

 DS1647 Only (DIP Module):

Standard JEDEC Byte-Wide 128k x 8 RAM

Pinout

 DS1647P Only (PowerCap® Module Board):

Surface Mountable Package for Direct

Connection to PowerCap Containing

Battery and Crystal
Replaceable Battery (PowerCap)
Power-Fail Output
Pin-for-Pin Compatible with Other Densities

PIN CONFIGURATIONS

TOP VIEW

WE

of DS164XP Timekeeping RAM

ORDERING INFORMATION

PART

DS1647-120

DS1647-120+

DS1647P-120
DS1647P-

120+

DS9034PCX

DS9034PCX+

*DS9034PCX required (must be ordered separately).
**A “+” indicates lead-free. The top mark includes a “+” symbol on lead-free devices.

TEMP

RANGE

0°C to
+70°C
0°C to
+70°C
0°C to
+70°C
0°C to
+70°C
0°C to
+70°C
0°C to
+70°C

PIN­PACKAGE

32 EDIP
(0.740a)
32 EDIP
(0.740a)
34
PowerCap*
34
PowerCap*

TOP
MARK**

DS1647­120
DS1647­120
DS1647P­120
DS1647P­120

PowerCap DS9034PC

PowerCap DS9034PC

PowerCap is a registered trademark of Dallas Semiconductor.

N.C.

A15
A16

V

DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

GND

CC

DS1647/DS1647P

A18

A16
A14
A12

DQ0
DQ1
DQ2

GND

32-Pin Encapsulated DIP Package

34-Pin PowerCap Module Board

(Uses DS9034PCX PowerCap)

A7
A6
A5
A4
A3
A2
A1

A0

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

X1 GND V
16
17

1
2

DS1647

3
4

5
6

7
8

9
10

11
12

13
14
15
16

(32 Pin 740)

DS1647P

BAT

32
31

30
29

28
27

26
25

24
23

22
21

20
19
18
17

X2

V

DQ7
DQ6
DQ5
DQ4
DQ3

34
33
32
31
30
29
28

27
26
25
24
23
22
21
20
19
18

CC

15
17

8

11

E

10

E

E

18
17
14

12
10

9
8

7
6

3
2
1
0

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PIN DESCRIPTION

PIN

PDIP PowerCap

1 34 A18
2 3 A16
3 32 A14
4 30 A12
5 25 A7
6 24 A6
7 23 A5
8 22 A4

9 21 A3
10 20 A2
11 19 A1
12 18 A0
23 28 A10
25 29 A11
26 27 A9
27 26 A8
28 31 A13
30 33 A17
31 2 A15
13 16 DQ0
14 15 DQ1
15 14 DQ2
17 13 DQ3
18 12 DQ4
19 11 DQ5
20 10 DQ6
21 9 DQ7
16 17 GND Ground
22 8 CE Active-Low Chip Enable
24 7 OE Active-Low Output Enable
29 6 WE Active-Low Write Enable
32 5 VCC Power-Supply Input

— 4

— 1 N.C. No Connection

—

NAME FUNCTION

Address Input

Data Input/Output

Data Input/Output

PFO

X1, X2,

V

BAT

Active-Low Power-Fail Output, Open Drain. This pin requires a
pullup resistor for proper operation.

Crystal Connections and Battery Connection

DS1647/DS1647P

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DS1647/DS1647P

DESCRIPTION

The DS1647 is a 512k x 8 nonvolatile static RAM with a full-function real-time clock, which are both
accessible in a byte-wide format. The nonvolatile timekeeping RAM is functionally equivalent to any
JEDEC standard 512k x 8 SRAM. The device can also be easily substituted for ROM, EPROM and
EEPROM, providing read/write nonvolatility and the addition of the real-time clock function. The real­time clock information resides in the eight uppermost RAM locations. The RTC registers contain year,
month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for the day of the
month and leap year are made automatically. The RTC clock registers are double-buffered to avoid access
of incorrect data that can occur during clock update cycles. The double-buffered system also prevents
time loss as the timekeeping countdown continues unabated by access to time register data. The DS1647
also contains its own power-fail circuitry, which deselects the device when the VCC supply is in an out-of­tolerance condition. This feature prevents loss of data from unpredictable system operation brought on by
low VCC as errant access and update cycles are avoided.

PACKAGES

The DS1647 is available in two packages: 32-pin DIP and 34-pin PowerCap module. The 32-pin DIP
style module integrates the crystal, lithium energy source, and silicon all in one package. The 34-pin
PowerCap Module Board is designed with contacts for connection to a separate PowerCap (DS9034PCX)
that contains the crystal and battery. This design allows the PowerCap to be mounted on top of the
DS1647P after the completion of the surface mount process. Mounting the PowerCap after the surface
mount process prevents damage to the crystal and battery due to the high temperatures required for solder
reflow. The PowerCap is keyed to prevent reverse insertion. The PowerCap Module Board and PowerCap
are ordered separately and shipped in separate containers. The part number for the PowerCap is
DS9034PCX.

CLOCK OPERATIONS—READING THE CLOCK

While the double-buffered register structure reduces the chance of reading incorrect data, internal updates
to the DS1647 clock registers should be halted before clock data is read to prevent reading of data in
transition. However, halting the internal clock register updating process does not affect clock accuracy.
Updating is halted when a 1 is written into the read bit, the 7th most significant bit in the control register.
As long as 1 remains in that position, updating is halted. After a halt is issued, the registers reflect the
count, that is day, date, and time that was present at the moment the halt command was issued. However,
the internal clock registers of the double-buffered system continue to update so that clock accuracy is not
affected by the access of data. All of the DS1647 registers are updated simultaneously after the clock
status is reset. Updating is within a second after the read bit is written to 0.

The read bit must be a zero for a minimum of 500ms to ensure that the external registers are updated.

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Figure 1. Block Diagram

DS1647/DS1647P

DS1647

Table 1. Truth Table

VCC

5V ±10%

<4.5V >V

<V

BAT

X X X Deselect High-Z CMOS Standby

BAT

X X X Deselect High-Z Data-Retention Mode

CE OE WE

MODE DQ POWER

VIH X X Deselect High-Z Standby

X X X Deselect High-Z Standby
VIL X VIL Write Data In Active
VIL VIL VIH Read Data Out Active
VIL VIH VIH Read High-Z Active

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