_
..
. _
.....
.
regulator senses the current drain and varies
the duty cycle (on time
of
the square wave
compared
to
the total period) of the square
wave.
This assures a constant voltage during
varying levels
of
power consumption.
C.
LOGIC BOARD ASSEMBLY. The
Logic
Board Assembly consists essentially of.
12
integrated circuits and their associated com-
ponents, a channel select switch, and an
RF
modulator, all
of
which are mounted on the
same printed circuit board. A 44-pin connector
is
provided for game cartridge connection.
Two 9-pin connectors are provided for
con-
nection
of
the
Hand
Controllers. The
Logic
Board processes program data from the game
cartridge and also converts the processed
data to an
RF
signal
for
color television
operation.
D.
HAND CONTROLLER ASSEMBLIES.
The
Hand Controller Assemblies each consist
of
a printed
circuit
matrix, a numerical keypad,
two pairs
of
side-mounted push buttons, and
a 16-position directional control disc. The
Hand Controllers provide a means
of
calling
up program
jnformation
from the game cartridge for processing by the Central Processing
Unit (CPU).
ANTENNA SWITCH BOX AND CABLE. The
antenna switch box provides the interface
between the console assembly and television
set.
Two spade lugs
on
the switch box
ar.e
provided for connection
to
the television set.
Two screws on the switch box are provided
for
connection to the antenna. The antenna switch
box serves to select either the console assembly or the external antenna
as
the source
of
RF
input to the television set. For the
75
ohm
impedance antenna systems, a balun transformer
is
required.
TRANSFORMER
UNIT.
The
wall-mounted
transformer
unit
converts 120 Volts AC house-
hold current
to
16 Volts AC. The transformer
unit connects
to
the console assembly through
a 2-wire cable, which may be unplugged from
the console for easy storage.
THEORY OF OPERATION. Referring to Figure
4,
System Block Diagram, the system
is
based
on the use
of
two processors which time-share
a bidirectional bus. The Central Processing
Unit (CPU) algorithmically computes the game
action against program material stored in the
ROM game cartridge. The Standard Television·
Interface
Chip
(STIC) interprets a condensed
memory area and uses the information to
generate the television display.
The STIC also letches moving and background
picture information from the graphics memory
and presents the data
as
video output. This is
done by dividing the television screen into
an
x-v
coordinate system. For example, the
STIC fetches a pattern
or
game figure from
graphics memory to be used in gameplay.
The CPU tells the
STiC
where
to
position it
on the television screen.
CENTRAL PROCESSING
UNIT
(CPU). The
CPU
is
a complete,
16
bit, single chip, high
speed metal oxide semiconductor, large scale
integrated circuit (MOS-LSI) microprocessor.
It
utilizes a 16-bit bidirectional bus to transfer
data, addresses and instructions between the
microprocessor. memory, and peripheral
devices.
Two
phase timing and synchronization signals are applied to the CPU by the
STiC. The CPU bus control
outputs
serve
to
define the status of bus operations.
STANDARD TELEVISION INTERFACE CHIP
(STIC). The STIC operates
within
the system
by time-sharing a 14-bit bidirectional bus.
The STIC's main
function
is
to provide
eight
coordinate-positioned
"foreground"
objects.
The second function provides a
background
display facility. The
"background"
mode
utilizes a dedicated area
of
external
memory
to store character control codes for each
display position. Both modes utilize external
memory
for
the storage
of
character patterns.
The
STIC accepts data, address and graphics
information from a common multiplexed bus.
Demultiplexing and system synchronization
are accomplished
through
three sets
of
control
signals.
Note
that the data bus is always
duplex
or
bidirectional.
The
main synchronization
(which
operates
at television frame rate) synchronizes the CPU
algorithms
to
the intended display sequences,
obtains the
"background"
character descrip-
. tors from the external memory and serves
to
enable the external devices via the 14-bit bus
when in the
CPU-controlled
mode.
The
second
set
of
control
signals is used
to
specify
address,
read and write
of
the external
memory
where
graphic
character patterns are stored. When
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