SimElectronics
Reference
®
1
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SimElectronics
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Revision History
April 2008 Online only New for Version 1.0 (Release 2008a+)
October 2008 Online only Revised for Version 1.1 (Release 2008b)
March 2009 Online only Revised for Version 1.2 (Release 2009a)
September 2009 Online only Revised for Version 1.3 (Release 2009b)
March 2010 Online only Revised for Version 1.4 (Release 2010a)
Reference
Block Reference
1
Actuators & Drivers ............................... 1-2
Drivers
Rotational Actuators
Translational Actuators
.......................................... 1-2
............................... 1-2
............................ 1-3
Contents
Integrated Circuits
Logic
Passive Devices
Semiconductor Devices
Sensors
Sources
Additional Components/SPICE-C om pa tib le
............................................. 1-4
........................................... 1-5
........................................... 1-6
Components
Passive Devices
Semiconductor Devices
Sources
Utilities
.......................................... 1-8
......................................... 1-9
................................ 1-3
................................... 1-4
............................ 1-5
.................................... 1-7
................................... 1-7
............................. 1-7
iii
2
Blocks — Alphabetical List
Index
iv Contents
Block Reference
1
Actuators&Drivers(p.1-2)
Integrated Circuits (p. 1-3)
Logic (p. 1-4)
Passive Devices (p. 1-4)
Semiconductor Devices (p. 1-5) Circuit components made from
Sensors (p. 1-5)
Sources (p. 1-6)
Additional
Components/SPICE-Compatible
Components (p. 1-7)
Mechanical control and motor
devices
Electronic circuits
Logic gates
Passive electrical devices
semiconductor material
Electromechanical sensors
Electrical supplies
SPICE-compatible blocks
1 Block Reference
Actuators & Drivers
Drivers (p. 1-2)
Rotational Actuators (p. 1-2)
Translational Actuators (p. 1-3)
Mechanical control devices
Rotational actuators and motors
Linear actuators and motors
Drivers
Controlled PWM Voltage
H-Bridge Model H-br
Stepper Mo
tor Driver
Model pulse-width modulated
voltage source
Model stepper motor driver
Rotational Actuators
DC Motor
FEM-Parameterized Rotary
Actuator
Generic Rotary Actuator
Model electrical and torque
characteristics of DC motor
Model rotary actuator defined in
terms of magnetic flux
Model generic rotary actuator driven
from DC voltage source or PWM
driver
idge motor driver
1-2
uction Motor
Ind
Piezo Rotary Motor Model torque-speed characteristics
Servomotor
Shunt Motor
el induction motor powered by
Mod
al AC supply
ide
of rotary piezoelectric traveling wave
motor
Model brushless motor with
closed-loop torque control
Model electrical and torque
characteristics of shunt motor
Integrated Circuits
Stepper Motor
Universal Motor Model electrical and torque
Model stepper motor
characteristics of a universal (or
series) motor
Translational Actuators
FEM-Parameterized Linear
Actuator
GenericLinearActuator
Piezo Linear Motor
Piezo Stack Model electrical and force
Solenoid
Model linear actuator defined in
terms of magnetic flux
Model generic linear actuator driven
from DC voltage source or PWM
driver
Model force-speed characteristics of
linear piezoelectric traveling wave
motor
characteristics of piezoelectric
stacked actuator
Model electrical characteristics and
generated force of solenoid
Integrated Circuits
Band-Limited Op-Amp
Comparator
Finite-Gain Op-Amp
Timer Model timer integrated circuit
Model band-limited operational
amplifier
Model a comparator behaviorally
Model gain-limited operational
amplifier
behaviorally
1-3
1 Block Reference
Logic
CMOS AND Model CMOS AND gate behaviorally
CMOS Buffer Model CMOS Buffer gate
behaviorally
CMOS NAND Model CMOS NAND gate
behaviorally
CMOS NOR Model CMOS NOR gate behaviorally
CMOS NOT Model CMOS N OT gate behaviorally
CMOS OR Model CMOS OR gate behaviorally
CMOS XOR Model CMO S XOR gate behaviorally
S-RLatch ModelanS-RLatchbehaviorally
1-4
Passiv
eDevices
Crystal
Fuse
Pote
Relay Model switching and associated
Thermal Resistor Model resis tor with therm al port
hree-Winding Mutual Inductor
T
Variable Capacitor
Variable Inductor Model linear time-varying inductor
ntiometer
Model s
Model fuse that protects against
excessive current
Mode
pote
sign
delay of relay
M
Model linear time-varying capacitor
table resonator
l rotary or linear-travel
ntiometer controlled by physical
al
odel three coupled inductors
Semiconductor Devices
Diode Model piecewise linear, piecewise
N-Channel IGBT Model N-Channel IGBT
N-Channel JFET Model N-Channel JFET
N-Channel MOSFET Model N-Channel MOSFET using
Semiconductor Devices
linear zener, or exponential diode
Shichman-Hodges equation
Sensors
NPN Bipolar
Optocoupl
P-Channel JFET Model P-Channel JFET
P-Channel MOSFET Model P-Channel MOSFET using
PNP Bipolar Transistor Model PNP bipolar transistor using
emental Shaft Encoder
Incr
Light-Emitting Diode Model light-emitting diode as
hotodiode
P
Transistor
er
Model NPN bi
enhanced E
Model optocoupler as LED, current
sensor, and controlled current source
Shichman-Hodges equation
enhanced Ebers-Moll equations
Model device that converts
information about angular s haft
position into electrical pulses
exponential diode and current sensor
in series
odel photodiode as parallel
M
controlled current source and
exponential diode
polar transistor using
bers-Moll equations
Proximity Sensor
PS Sensor
Model s imple distance sensor
Model generic linear sensor
1-5
1 Block Reference
Strain Gauge Model deformation sensor
Sources
Thermistor
Thermocouple Model sensor that converts thermal
Generic Battery
Negative Supply Rail
Positive Supply Rail
Solar Cell
Model NTC thermistor using
B-parameter equation
potential difference into electrical
potential difference
Model simple battery
Model ideal negative supply rail
Model ideal positive supply rail
Model single solar cell
1-6
Additional Components/SPICE-Compatible Components
Additional Components/SPICE-Compatible Components
Passive Devices (p. 1-7) SPICE-compatible passive electrical
devices
Semiconductor Devices (p. 1-7) SPICE-compatible circuit
components made from
semiconductor material
Sources (p. 1-8) SPICE-compatible electrical supplies
Utilities (p. 1-9) System-level parameter specification
Passive Devices
Current-Controlled Switch
SPICE Resistor Model SPICE-compatible resistor
Voltage-Controlled Switch
Model current-controlled switch with
hysteresis
Model vo
hystere
ltage-controlled switch with
sis
Semiconductor Devices
SPICE
SPICE
SPIC
SPI
SP
S
SPICE PNP Model Gummel-Poon PNP Transistor
Diode
NJFET
ENMOS
CE NPN
ICE PJFET
PICE PMOS
Model
Model
JFET
Mode
MOSF
Mod
Tra
Mo
JF
M
M
SPICE-compatible diode
SPICE-compatible N-Channel
l SPICE-compatible N-Channel
ET
el Gummel-Poon NPN
nsistor
del SPICE-compatible P-Channel
ET
odel SPICE-co mpatible P-Channel
OSFET
1-7
1 Block Reference
Sources
DC Current Source
DC Voltage Source
Exponential Current Source
Exponential
PCCCS
PCCCS2
PCCVS
PCCVS2
Pulse Current Source
se Voltage Source
Pul
Voltage S ource
Model constant c
Model constant
Model exponen
source
Model exponential pulse voltage
source
Model polyn omial current-controlled
current source
Model pol
current s
inputs
Model polyn omial current-controlled
voltage source
Model polyn omial current-controlled
voltage source with two controlling
inputs
Mode
sour
Model periodic square pulse voltage
source
ynomial current-controlled
ource with two controlling
l periodic square pulse current
ce
urrent source
voltage source
tial pulse current
1-8
PVCCS
PVCCS2
PVCVS
PVCVS2
PWL Current Source
Model polynomial voltage-controlled
current source
odel polynomial voltage-contro ll ed
M
current source with two controlling
inputs
Model polynomial voltage-controlled
voltage source
Model polynomial voltage-controlled
voltage source with two controlling
inputs
Model lookup table current source
Additional Components/SPICE-Compatible Components
PWL Voltage Source
SFFM Current Source Model single-frequency FM current
SFFM Voltage Source Model single-frequency FM voltage
Sinusoidal Current Source
Sinusoidal Voltage Source
Model lookup table voltage source
source
source
Model damped sinusoidal current
source
Model damped sinusoidal voltage
source
Utilities
SPICE Environme nt Parameters Set parameters that apply to all
connected SPICE-compatible blocks
1-9
1 Block Reference
1-10
2
Blocks — Alphabetical List
Band-Limited Op-Amp
Purpose Model band-limited operational amplifier
Library Integrated Circuits
Description The Band-Limited Op-Amp block models a band-limited operational
amplifier. If the voltages at the positive and negative ports are Vp and
Vm, respectively, the output voltage is:
AV V
-
()
V
=
out
where:
• A is the gain.
pm
s
+
f
21π
IR
−
*
out out
• R
• I
• s is the Laplace operator.
• f is the 3-dB bandwidth.
The input current is:
where Rinis the input resistance.
The block does not use the initial condition you specify using the Initial
output voltage, V0 parameter if you select the Start simulation from
steady state check box in the Simscape™ Solver Configuration block.
is the output resistance.
out
is the output current.
out
VV
-
pm
R
in
2-2
Dialog
Box a nd
Parameters
Band-Limited O p -Amp
Gain
,A
pen-loop g ain of the operational amplifier. The default value
The o
00
10
.
is
2-3
Band-Limited Op-Amp
Input resistance, Rin
The resistance at the input of the operational amplifier that the
block uses to calculate the input current. The default value is
1e+06 Ω.
Output resistance, Rout
The resistance at the output of the operational amplifier that
the block uses to calculate the drop in output voltage due to the
output current. The default value is
Minimum output, Vmin
The lower limit on the operational amplifier no-load output
voltage. The default value is
Maximum output, Vmax
The upper limit on the operational amplifier no-load output
voltage. The default value is
Maximum slew rate, Vdot
The maximum positive or negative rate of change of output
voltage magnitude. The default value is
100 Ω.
-15 V.
15 V.
1000 V/s.
Bandwidth, f
The open-loop bandwidth, that is, the frequency at which the gain
drops by 3 dB compared to the low-frequency gain, A. The default
value is
Initial output voltage, V0
The output voltage at the start of the simulation when the output
current is zero. The default value is
Note This parameter value do es not account for the voltage drop
across the output resistor.
1e+05 Hz.
Ports The block has the following ports:
+
Positive electrical voltage.
2-4
0 V.
Band-Limited O p -Amp
-
Negative electrical voltage.
OUT
Output voltage.
See Also Simscape Op-Amp, Finite-Gain Op-Amp
2-5
CMOS AND
Purpose Model CMOS AND gate behaviorally
Library Logic
Description The CMOS AND block represents a CMOS AND logic gate behaviorally:
• The block output logic level is
gate inputs are 1.
• The block output logic level is
The block determines the logic levels of the gate inputs as follows:
• If the g ate voltage is greater than the threshold voltage, the block
interprets the input as logic 1.
• Otherwise, the block interprets the input as logic 0.
The threshold voltage is the voltage value at midpoint between the
High level input voltage parameter value and the Low level input
voltage parameter value.
Note To improve simulation speed, the block does not model all the
internal individual MOSFET devices that make up the gate. See “Basic
Assumptions and Limitations” on page 2-7 for details.
Theblockmodelsthegateasfollows:
• The gate inputs have infinite resistance and finite or zero capacitance.
HIGH if the logic levels of both of the
LOW otherwise.
2-6
• The gate output offers a selection of two models:
Quadratic. For more informa tion , see “Selecting the Output Model
for Logic Blocks”. Use the Output current-voltage relationship
parameter to specify the output model.
• You can specify propagation delay for both output models. For
output, the block sets the value of the gate output capacitor such that
Linear and
Linear
CMOS AND
the resistor-capacitor time constant equals the Propagation delay
parameter value. For
lagged to approximate the Propagation delay parameter v alu e.
The block output voltage depends on the output model selected:
Quadratic output, the gate input demand is
Basic
Assumptions
and
Limitations
• For
• For
The block does not model the internal individual MOSFET devices
that m ake up the gate (except for the final MOSFET pair if you select
the
parameter). This limitation has the following implications:
• The block does not accurately model the gate’s response to input
• The block does not a ccurately model dynamic response.
Circuits that involve a f eedback path around a set of logic gates may
require a nonzero propag ation delay to be set on one or more gates.
Linear model, output high is the High level output voltage
parameter value, and output low is the Low level output voltage
parameter value.
Quadratic model, the output voltage for High and Low states is
a function of the output current, as explained in “Quadratic Model
Output and Parameters”. For zero load current, output high is Vcc
(the Supply voltage parameter value), and output low is zero volts.
Quadratic option for the Output current-voltage relationship
noise and inputs that are around the logic threshold voltage.
2-7
CMOS AND
Dialog
Box a nd
Parameters
Inputs Tab
Low level input voltage
Voltage value below which the block interprets the input voltage
as logic
High level input voltage
Voltage value above which the block interprets the input voltage
as logic
LOW. The default value is 2 V.
HIGH. The default value is 3 V.
2-8
Average input capacitance
Fixed capacitance that approximates the input capacitance for
a MOSFET gate. The MOSFET capacitance depends on the
applied voltag e. When you drive this block with another gate, the
Average input capacitance produces a rise time similar to that
of the MOSFET. You can usually find this capacitance value on a
manufacturer datasheet. The default v alue is
valuetozeromayresultinfastersimulationtimes.
5 pF. Setting this
Outputs Tab
CMOS AND
2-9
CMOS AND
2-10
Output current-voltage relationship
Select the output model,
is
Linear.
Low level output voltage
Voltage value at the output when the output logic level is
default value is
the
Linear option for the Output current-voltage relationship
parameter.
High level output voltage
Voltage value at the output when the output logic level is
The default value is
0 V. This parameter is available when you select
Linear or Quadratic. The def a ult value
5 V. This parameter is available when
LOW.The
HIGH.
you select the Linear option for the Output current-voltage
relationship parameter.
Output resistance
Value of the series output resistor that is used to model the drop
in output voltage resulting from the output current. The default
value is
25 Ω. You can derive this value from a datasheet by
dividing the high-level output voltage by the maximum low-level
output current. This parameter is available when you select the
Linear option for the Output current-voltage relationship
parameter.
Supply voltage
Supplyvoltagevalueappliedtothegateinyourcircuit. The
default value is
select the
5 V. This parameter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Measurement voltage
The gate supply voltage for which mask data output resistances
and currents are defined. The default value is
is available when you select the
Quadratic option for the Output
5 V. This parameter
current-voltage relationship parameter.
CMOS AND
Logic HIGH output resistance at zero current and at I_OH
A row vector [ R_OH1 R_OH2 ]oftworesistancevalues. The
first value R_OH1 is the gradient of the output voltage-current
relationship when the gate is logic HIGH and there is no output
current. The second value R_OH2 is the gradient of the output
voltage-current relationship when the gate is logic HIGH and the
output current is I_OH. The default value is
parameter is available when you select the
[25250]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic HIGH output current I_OH when shorted to ground
TheresultingcurrentwhenthegateisinthelogicHIGHstate,
but the load forces the output voltage to zero. The default value is
63 mA. This parameter is available when you select the Quadratic
option for the Output current-voltage relationship parameter.
2-11
CMOS AND
Logic LOW output resistance at zero current and at I_OL
A row vector [ R_OL1 R_OL2 ] of two resistance values. The
first value R_OL1 is the gradient of the output voltage-current
relationship when the gate is logic LOW and there is no output
current. The second value R_OL2 is the gradient of the output
voltage-current relationship when the gate is logic LOW and the
output current is I_OL. The default value is
parameter is available when you select the
[30800]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic LOW output current I_OL when shorted to Vcc
The resulting current when the gate is in the logic LOW state,
but the load forces the output voltage to the supply voltage Vcc.
The default value is
you select the
Quadratic option for the Output current-voltage
-45 mA. This parameter is available when
relationship parameter.
Propagation delay
Timeittakesfortheoutputtoswingfrom
LOW after the input logic levels change. The default value is 25 ns.
LOW to HIGH or HIGH to
2-12
Protection diode on resistance
The gradient of the voltage-current relationship for the protection
diodes when forward biased. The default value is
parameter is available when you select the
Quadratic option for
5 Ω.This
the Output current-voltage relationship parameter.
Protection diode forward voltage
The voltage above which the protection diode is turned on. The
default value is
select the
0.6 V. This para meter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Initial Conditions Tab
Output initial state
Specify whether the initial output state of the block is
or Low. This parameter is used for both linear and quadratic
output states, provided that the Propagation delay parameter
is greater than zero and the Solver Configuration block does not
have the Start simulation from steady state option selected.
The default value is
Low.
CMOS AND
High
Ports The block has the following ports:
A
Electrical input port.
B
Electrical input port.
J
Electrical output port.
2-13
CMOS Buffer
Purpose Model CMOS Buffer gate behaviorally
Library Logic
Description The CMOS Buffer block represents a CMOS Buffer logic gate
behaviorally:
• The block output logic level is
is 1.
• The block output logic level is
The block determines the logic levels of the gate inputs as follows:
• If the g ate voltage is greater than the threshold voltage, the block
interprets the input as logic 1.
• Otherwise, the block interprets the input as logic 0.
The threshold voltage is the voltage value at midpoint between the
High level input voltage parameter value and the Low level input
voltage parameter value.
Note To improve simulation speed, the block does not model all the
internal individual MOSFET devices that make up the gate. See “Basic
Assumptions and Limitations” on page 2-15 for details.
Theblockmodelsthegateasfollows:
• The gate inputs have infinite resistance and finite or zero capacitance.
HIGH if the logic level of the gate input
LOW otherwise.
2-14
• The gate output offers a selection of two models:
Quadratic. For more informa tion , see “Selecting the Output Model
for Logic Blocks”. Use the Output current-voltage relationship
parameter to specify the output model.
Linear and
CMOS Buffer
• You can specify propagation delay for both output models. For Linear
output, the block sets the value of the gate output capacitor such that
the resistor-capacitor time constant equals the Propagation delay
parameter value. For
lagged to approximate the Propagation delay parameter v alu e.
The block output voltage depends on the output model selected:
Quadratic output, the gate input demand is
Basic
Assumptions
and
Limitations
• For
• For
The block does not model the internal individual MOSFET devices
that m ake up the gate (except for the final MOSFET pair if you select
the
parameter). This limitation has the following implications:
• The block does not accurately model the gate’s response to input
• The block does not a ccurately model dynamic response.
Circuits that involve a f eedback path around a set of logic gates may
require a nonzero propag ation delay to be set on one or more gates.
Linear model, output high is the High level output voltage
parameter value, and output low is the Low level output voltage
parameter value.
Quadratic model, the output voltage for High and Low states is
a function of the output current, as explained in “Quadratic Model
Output and Parameters”. For zero load current, output high is Vcc
(the Supply voltage parameter value), and output low is zero volts.
Quadratic option for the Output current-voltage relationship
noise and inputs that are around the logic threshold voltage.
2-15
CMOS Buffer
Dialog
Box a nd
Parameters
Inputs Tab
Low level
Voltage
as logic
High lev
el input voltage
Voltage
as logi
input voltage
value below which the block interprets the input voltage
LOW. The default value is 2 V.
value above which the block interprets the input voltage
c
HIGH. The default value is 3 V.
2-16
Averag
Fixed
aMOSF
appli
Avera
of th
manu
valu
e input capacitance
capacitance that approximates the input capacitance for
ET gate. The MOSFET capacitance depends on the
ed voltage. When you drive this block with another gate, the
ge input capacitance produces a rise time similar to that
e MOSFET. You can usually find this capacitance value on a
facturer datasheet. The default value is
etozeromayresultinfastersimulationtimes.
5 pF. Setting this
Outputs Tab
CMOS Buffer
2-17
CMOS Buffer
2-18
Output current-voltage relationship
Select the output model,
is
Linear.
Low level output voltage
Voltage value at the output when the output logic level is
default value is
the
Linear option for the Output current-voltage relationship
parameter.
High level output voltage
Voltage value at the output when the output logic level is
The default value is
you select the
relationship parameter.
0 V. This parameter is available when you select
Linear option for the Output current-voltage
Linear or Quadratic. The def a ult value
5 V. This parameter is available when
LOW.The
HIGH.
CMOS Buffer
Output resistance
Value of the series output resistor that is used to model the drop
in output voltage resulting from the output current. The default
value is
dividing the high-level output voltage by the maximum low-level
output current. This parameter is available when you select the
Linear option for the Output current-voltage relationship
parameter.
Supply voltage
Supplyvoltagevalueappliedtothegateinyourcircuit. The
default value is
select the
relationship parameter.
Measurement voltage
The gate supply voltage for which mask data output resistances
and currents are defined. The default value is
is available when you select the
current-voltage relationship parameter.
25 Ω. You can derive this value from a datasheet by
5 V. This parameter is available when you
Quadratic option for the Output current-voltage
5 V. This parameter
Quadratic option for the Output
Logic HIGH output resistance at zero current and at I_OH
A row vector [ R_OH1 R_OH2 ]oftworesistancevalues. The
first value R_OH1 is the gradient of the output voltage-current
relationship when the gate is logic HIGH and there is no output
current. The second value R_OH2 is the gradient of the output
voltage-current relationship when the gate is logic HIGH and the
output current is I_OH. The default value is
parameter is available when you select the
[25250]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic HIGH output current I_OH when shorted to ground
TheresultingcurrentwhenthegateisinthelogicHIGHstate,
but the load forces the output voltage to zero. The default value is
63 mA. This parameter is available when you select the Quadratic
option for the Output current-voltage relationship parameter.
2-19
CMOS Buffer
Logic LOW output resistance at zero current and at I_OL
A row vector [ R_OL1 R_OL2 ] of two resistance values. The
first value R_OL1 is the gradient of the output voltage-current
relationship when the gate is logic LOW and there is no output
current. The second value R_OL2 is the gradient of the output
voltage-current relationship when the gate is logic LOW and the
output current is I_OL. The default value is
parameter is available when you select the
[30800]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic LOW output current I_OL when shorted to Vcc
The resulting current when the gate is in the logic LOW state,
but the load forces the output voltage to the supply voltage Vcc.
The default value is
you select the
Quadratic option for the Output current-voltage
-45 mA. This parameter is available when
relationship parameter.
Propagation delay
Timeittakesfortheoutputtoswingfrom
LOW after the input logic levels change. The default value is 25 ns.
LOW to HIGH or HIGH to
2-20
Protection diode on resistance
The gradient of the voltage-current relationship for the protection
diodes when forward biased. The default value is
parameter is available when you select the
Quadratic option for
5 Ω.This
the Output current-voltage relationship parameter.
Protection diode forward voltage
The voltage above which the protection diode is turned on. The
default value is
select the
0.6 V. This para meter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Initial Conditions Tab
CMOS Buffer
Output in
itial state
Specify
or Low.T
output s
is great
have th
The def
whether the initial output state of the block is
tates, provided that the Propagation delay parameter
er than zero and the Solver Configuration block does not
e Start simulation from steady state option selected.
ault value is
his parameter is used for both linear and quadratic
Low.
Ports The block has the following ports:
A
Electrical input port.
J
Electrical output port.
High
2-21
CMOS NAND
Purpose Model CMOS NAND gate behaviorally
Library Logic
Description The CMOS NAND block represents a CMOS NAND logic gate
behaviorally:
• The block output logic level is
gate inputs are 0.
• The block output logic level is
The block determines the logic levels of the gate inputs as follows:
• If the g ate voltage is greater than the threshold voltage, the block
interprets the input as logic 1.
• Otherwise, the block interprets the input as logic 0.
The threshold voltage is the voltage value at midpoint between the
High level input voltage parameter value and the Low level input
voltage parameter value.
Note To improve simulation speed, the block does not model all the
internal individual MOSFET devices that make up the gate. See “Basic
Assumptions and Limitations” on page 2-23 for details.
Theblockmodelsthegateasfollows:
• The gate inputs have infinite resistance and finite or zero capacitance.
HIGH if the logic levels of both of the
LOW otherwise.
2-22
• The gate output offers a selection of two models:
Quadratic. For more informa tion , see “Selecting the Output Model
for Logic Blocks”. Use the Output current-voltage relationship
parameter to specify the output model.
Linear and
CMOS NAND
• You can specify propagation delay for both output models. For Linear
output, the block sets the value of the gate output capacitor such that
the resistor-capacitor time constant equals the Propagation delay
parameter value. For
lagged to approximate the Propagation delay parameter v alu e.
The block output voltage depends on the output model selected:
Quadratic output, the gate input demand is
Basic
Assumptions
and
Limitations
• For
• For
The block does not model the internal individual MOSFET devices
that m ake up the gate (except for the final MOSFET pair if you select
the
parameter). This limitation has the following implications:
• The block does not accurately model the gate’s response to input
• The block does not a ccurately model dynamic response.
Circuits that involve a f eedback path around a set of logic gates may
require a nonzero propag ation delay to be set on one or more gates.
Linear model, output high is the High level output voltage
parameter value, and output low is the Low level output voltage
parameter value.
Quadratic model, the output voltage for High and Low states is
a function of the output current, as explained in “Quadratic Model
Output and Parameters”. For zero load current, output high is Vcc
(the Supply voltage parameter value), and output low is zero volts.
Quadratic option for the Output current-voltage relationship
noise and inputs that are around the logic threshold voltage.
2-23
CMOS NAND
Dialog
Box a nd
Parameters
Inputs Tab
Low level
Voltage
as logic
High lev
el input voltage
Voltage
as logi
input voltage
value below which the block interprets the input voltage
LOW. The default value is 2 V.
value above which the block interprets the input voltage
c
HIGH. The default value is 3 V.
2-24
Averag
Fixed
aMOSF
appli
Avera
of th
manu
valu
e input capacitance
capacitance that approximates the input capacitance for
ET gate. The MOSFET capacitance depends on the
ed voltage. When you drive this block with another gate, the
ge input capacitance produces a rise time similar to that
e MOSFET. You can usually find this capacitance value on a
facturer datasheet. The default value is
etozeromayresultinfastersimulationtimes.
5 pF. Setting this
Outputs Tab
CMOS NAND
2-25
CMOS NAND
2-26
Output current-voltage relationship
Select the output model,
is
Linear.
Low level output voltage
Voltage value at the output when the output logic level is
default value is
the
Linear option for the Output current-voltage relationship
parameter.
High level output voltage
Voltage value at the output when the output logic level is
The default value is
you select the
relationship parameter.
0 V. This parameter is available when you select
Linear option for the Output current-voltage
Linear or Quadratic. The def a ult value
5 V. This parameter is available when
LOW.The
HIGH.
CMOS NAND
Output resistance
Value of the series output resistor that is used to model the drop
in output voltage resulting from the output current. The default
value is
dividing the high-level output voltage by the maximum low-level
output current. This parameter is available when you select the
Linear option for the Output current-voltage relationship
parameter.
Supply voltage
Supplyvoltagevalueappliedtothegateinyourcircuit. The
default value is
select the
relationship parameter.
Measurement voltage
The gate supply voltage for which mask data output resistances
and currents are defined. The default value is
is available when you select the
current-voltage relationship parameter.
25 Ω. You can derive this value from a datasheet by
5 V. This parameter is available when you
Quadratic option for the Output current-voltage
5 V. This parameter
Quadratic option for the Output
Logic HIGH output resistance at zero current and at I_OH
A row vector [ R_OH1 R_OH2 ]oftworesistancevalues. The
first value R_OH1 is the gradient of the output voltage-current
relationship when the gate is logic HIGH and there is no output
current. The second value R_OH2 is the gradient of the output
voltage-current relationship when the gate is logic HIGH and the
output current is I_OH. The default value is
parameter is available when you select the
[25250]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic HIGH output current I_OH when shorted to ground
TheresultingcurrentwhenthegateisinthelogicHIGHstate,
but the load forces the output voltage to zero. The default value is
63 mA. This parameter is available when you select the Quadratic
option for the Output current-voltage relationship parameter.
2-27
CMOS NAND
Logic LOW output resistance at zero current and at I_OL
A row vector [ R_OL1 R_OL2 ] of two resistance values. The
first value R_OL1 is the gradient of the output voltage-current
relationship when the gate is logic LOW and there is no output
current. The second value R_OL2 is the gradient of the output
voltage-current relationship when the gate is logic LOW and the
output current is I_OL. The default value is
parameter is available when you select the
[30800]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic LOW output current I_OL when shorted to Vcc
The resulting current when the gate is in the logic LOW state,
but the load forces the output voltage to the supply voltage Vcc.
The default value is
you select the
Quadratic option for the Output current-voltage
-45 mA. This parameter is available when
relationship parameter.
Propagation delay
Timeittakesfortheoutputtoswingfrom
LOW after the input logic levels change. The default value is 25 ns.
LOW to HIGH or HIGH to
2-28
Protection diode on resistance
The gradient of the voltage-current relationship for the protection
diodes when forward biased. The default value is
parameter is available when you select the
Quadratic option for
5 Ω.This
the Output current-voltage relationship parameter.
Protection diode forward voltage
The voltage above which the protection diode is turned on. The
default value is
select the
0.6 V. This para meter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Initial Conditions Tab
CMOS NAND
Output in
itial state
Specify
or Low.T
output s
is great
have th
The def
whether the initial output state of the block is
tates, provided that the Propagation delay parameter
er than zero and the Solver Configuration block does not
e Start simulation from steady state option selected.
ault value is
his parameter is used for both linear and quadratic
Low.
Ports The block has the following ports:
A
Electrical input port.
B
Electrical input port.
J
Electrical output port.
High
2-29
CMOS NOR
Purpose Model CMOS NOR gate behaviorally
Library Logic
Description The CMOS NOR block represents a CMOS NOR logic gate behaviorally:
• The block output logic level is
gate inputs are 1.
• The block output logic level is
The block determines the logic levels of the gate inputs as follows:
• If the g ate voltage is greater than the threshold voltage, the block
interprets the input as logic 1.
• Otherwise, the block interprets the input as logic 0.
The threshold voltage is the voltage value at midpoint between the
High level input voltage parameter value and the Low level input
voltage parameter value.
Note To improve simulation speed, the block does not model all the
internal individual MOSFET devices that make up the gate. See “Basic
Assumptions and Limitations” on page 2-31 for details.
Theblockmodelsthegateasfollows:
• The gate inputs have infinite resistance and finite or zero capacitance.
LOW if the logic levels of any of the
HIGH otherwise.
2-30
• The gate output offers a selection of two models:
Quadratic. For more informa tion , see “Selecting the Output Model
for Logic Blocks”. Use the Output current-voltage relationship
parameter to specify the output model.
• You can specify propagation delay for both output models. For
output, the block sets the value of the gate output capacitor such that
Linear and
Linear
CMOS NOR
the resistor-capacitor time constant equals the Propagation delay
parameter value. For
lagged to approximate the Propagation delay parameter v alu e.
The block output voltage depends on the output model selected:
Quadratic output, the gate input demand is
Basic
Assumptions
and
Limitations
• For
• For
The block does not model the internal individual MOSFET devices
that m ake up the gate (except for the final MOSFET pair if you select
the
parameter). This limitation has the following implications:
• The block does not accurately model the gate’s response to input
• The block does not a ccurately model dynamic response.
Circuits that involve a f eedback path around a set of logic gates may
require a nonzero propag ation delay to be set on one or more gates.
Linear model, output high is the High level output voltage
parameter value, and output low is the Low level output voltage
parameter value.
Quadratic model, the output voltage for High and Low states is
a function of the output current, as explained in “Quadratic Model
Output and Parameters”. For zero load current, output high is Vcc
(the Supply voltage parameter value), and output low is zero volts.
Quadratic option for the Output current-voltage relationship
noise and inputs that are around the logic threshold voltage.
2-31
CMOS NOR
Dialog
Box a nd
Parameters
Inputs Tab
Low level
Voltage
as logic
High lev
el input voltage
Voltage
as logi
input voltage
value below which the block interprets the input voltage
LOW. The default value is 2 V.
value above which the block interprets the input voltage
c
HIGH. The default value is 3 V.
2-32
Averag
Fixed
aMOSF
appli
Avera
of th
manu
valu
e input capacitance
capacitance that approximates the input capacitance for
ET gate. The MOSFET capacitance depends on the
ed voltage. When you drive this block with another gate, the
ge input capacitance produces a rise time similar to that
e MOSFET. You can usually find this capacitance value on a
facturer datasheet. The default value is
etozeromayresultinfastersimulationtimes.
5 pF. Setting this
Outputs Tab
CMOS NOR
2-33
CMOS NOR
2-34
Output current-voltage relationship
Select the output model,
is
Linear.
Low level output voltage
Voltage value at the output when the output logic level is
default value is
the
Linear option for the Output current-voltage relationship
parameter.
High level output voltage
Voltage value at the output when the output logic level is
The default value is
you select the
relationship parameter.
0 V. This parameter is available when you select
Linear option for the Output current-voltage
Linear or Quadratic. The def a ult value
5 V. This parameter is available when
LOW.The
HIGH.
Output resistance
Value of the series output resistor that is used to model the drop
in output voltage resulting from the output current. The default
value is
25 Ω. You can derive this value from a datasheet by
dividing the high-level output voltage by the maximum low-level
output current. This parameter is available when you select the
Linear option for the Output current-voltage relationship
parameter.
Supply voltage
Supplyvoltagevalueappliedtothegateinyourcircuit. The
default value is
select the
5 V. This parameter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Measurement voltage
The gate supply voltage for which mask data output resistances
and currents are defined. The default value is
is available when you select the
Quadratic option for the Output
5 V. This parameter
current-voltage relationship parameter.
CMOS NOR
Logic HIGH output resistance at zero current and at I_OH
A row vector [ R_OH1 R_OH2 ]oftworesistancevalues. The
first value R_OH1 is the gradient of the output voltage-current
relationship when the gate is logic HIGH and there is no output
current. The second value R_OH2 is the gradient of the output
voltage-current relationship when the gate is logic HIGH and the
output current is I_OH. The default value is
parameter is available when you select the
[25250]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic HIGH output current I_OH when shorted to ground
TheresultingcurrentwhenthegateisinthelogicHIGHstate,
but the load forces the output voltage to zero. The default value is
63 mA. This parameter is available when you select the Quadratic
option for the Output current-voltage relationship parameter.
2-35
CMOS NOR
Logic LOW output resistance at zero current and at I_OL
A row vector [ R_OL1 R_OL2 ] of two resistance values. The
first value R_OL1 is the gradient of the output voltage-current
relationship when the gate is logic LOW and there is no output
current. The second value R_OL2 is the gradient of the output
voltage-current relationship when the gate is logic LOW and the
output current is I_OL. The default value is
parameter is available when you select the
[30800]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic LOW output current I_OL when shorted to Vcc
The resulting current when the gate is in the logic LOW state,
but the load forces the output voltage to the supply voltage Vcc.
The default value is
you select the
Quadratic option for the Output current-voltage
-45 mA. This parameter is available when
relationship parameter.
Propagation delay
Timeittakesfortheoutputtoswingfrom
LOW after the input logic levels change. The default value is 25 ns.
LOW to HIGH or HIGH to
2-36
Protection diode on resistance
The gradient of the voltage-current relationship for the protection
diodes when forward biased. The default value is
parameter is available when you select the
Quadratic option for
5 Ω.This
the Output current-voltage relationship parameter.
Protection diode forward voltage
The voltage above which the protection diode is turned on. The
default value is
select the
0.6 V. This para meter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Initial Conditions Tab
CMOS NOR
Output in
itial state
Specify
or Low.T
output s
is great
have th
The def
whether the initial output state of the block is
tates, provided that the Propagation delay parameter
er than zero and the Solver Configuration block does not
e Start simulation from steady state option selected.
ault value is
his parameter is used for both linear and quadratic
Low.
Ports The block has the following ports:
A
Electrical input port.
B
Electrical input port.
J
Electrical output port.
High
2-37
CMOS NOT
Purpose Model CMOS NOT gate behaviorally
Library Logic
Description The CM OS NOT block represents a CMOS N OT logic gate behaviorally:
• The block output logic level is
is 0.
• The block output logic level is
The block determines the logic levels of the gate inputs as follows:
• If the g ate voltage is greater than the threshold voltage, the block
interprets the input as logic 1.
• Otherwise, the block interprets the input as logic 0.
The threshold voltage is the voltage value at midpoint between the
High level input voltage parameter value and the Low level input
voltage parameter value.
Note To improve simulation speed, the block does not model all the
internal individual MOSFET devices that make up the gate. See “Basic
Assumptions and Limitations” on page 2-39 for details.
Theblockmodelsthegateasfollows:
• The gate inputs have infinite resistance and finite or zero capacitance.
HIGH if the logic level of the gate input
LOW otherwise.
2-38
• The gate output offers a selection of two models:
Quadratic. For more informa tion , see “Selecting the Output Model
for Logic Blocks”. Use the Output current-voltage relationship
parameter to specify the output model.
Linear and
CMOS NOT
• You can specify propagation delay for both output models. For Linear
output, the block sets the value of the gate output capacitor such that
the resistor-capacitor time constant equals the Propagation delay
parameter value. For
lagged to approximate the Propagation delay parameter v alu e.
The block output voltage depends on the output model selected:
Quadratic output, the gate input demand is
Basic
Assumptions
and
Limitations
• For
• For
The block does not model the internal individual MOSFET devices
that m ake up the gate (except for the final MOSFET pair if you select
the
parameter). This limitation has the following implications:
• The block does not accurately model the gate’s response to input
• The block does not a ccurately model dynamic response.
Circuits that involve a f eedback path around a set of logic gates may
require a nonzero propag ation delay to be set on one or more gates.
Linear model, output high is the High level output voltage
parameter value, and output low is the Low level output voltage
parameter value.
Quadratic model, the output voltage for High and Low states is
a function of the output current, as explained in “Quadratic Model
Output and Parameters”. For zero load current, output high is Vcc
(the Supply voltage parameter value), and output low is zero volts.
Quadratic option for the Output current-voltage relationship
noise and inputs that are around the logic threshold voltage.
2-39
CMOS NOT
Dialog
Box a nd
Parameters
Inputs Tab
Low level
Voltage
as logic
High lev
el input voltage
Voltage
as logi
input voltage
value below which the block interprets the input voltage
LOW. The default value is 2 V.
value above which the block interprets the input voltage
c
HIGH. The default value is 3 V.
2-40
Averag
Fixed
aMOSF
appli
Avera
of th
manu
valu
e input capacitance
capacitance that approximates the input capacitance for
ET gate. The MOSFET capacitance depends on the
ed voltage. When you drive this block with another gate, the
ge input capacitance produces a rise time similar to that
e MOSFET. You can usually find this capacitance value on a
facturer datasheet. The default value is
etozeromayresultinfastersimulationtimes.
5 pF. Setting this
Outputs Tab
CMOS NOT
2-41
CMOS NOT
2-42
Output current-voltage relationship
Select the output model,
is
Linear.
Low level output voltage
Voltage value at the output when the output logic level is
default value is
the
Linear option for the Output current-voltage relationship
parameter.
High level output voltage
Voltage value at the output when the output logic level is
The default value is
you select the
relationship parameter.
0 V. This parameter is available when you select
Linear option for the Output current-voltage
Linear or Quadratic. The def a ult value
5 V. This parameter is available when
LOW.The
HIGH.
Output resistance
Value of the series output resistor that is used to model the drop
in output voltage resulting from the output current. The default
value is
25 Ω. You can derive this value from a datasheet by
dividing the high-level output voltage by the maximum low-level
output current. This parameter is available when you select the
Linear option for the Output current-voltage relationship
parameter.
Supply voltage
Supplyvoltagevalueappliedtothegateinyourcircuit. The
default value is
select the
5 V. This parameter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Measurement voltage
The gate supply voltage for which mask data output resistances
and currents are defined. The default value is
is available when you select the
Quadratic option for the Output
5 V. This parameter
current-voltage relationship parameter.
CMOS NOT
Logic HIGH output resistance at zero current and at I_OH
A row vector [ R_OH1 R_OH2 ]oftworesistancevalues. The
first value R_OH1 is the gradient of the output voltage-current
relationship when the gate is logic HIGH and there is no output
current. The second value R_OH2 is the gradient of the output
voltage-current relationship when the gate is logic HIGH and the
output current is I_OH. The default value is
parameter is available when you select the
[25250]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic HIGH output current I_OH when shorted to ground
TheresultingcurrentwhenthegateisinthelogicHIGHstate,
but the load forces the output voltage to zero. The default value is
63 mA. This parameter is available when you select the Quadratic
option for the Output current-voltage relationship parameter.
2-43
CMOS NOT
Logic LOW output resistance at zero current and at I_OL
A row vector [ R_OL1 R_OL2 ] of two resistance values. The
first value R_OL1 is the gradient of the output voltage-current
relationship when the gate is logic LOW and there is no output
current. The second value R_OL2 is the gradient of the output
voltage-current relationship when the gate is logic LOW and the
output current is I_OL. The default value is
parameter is available when you select the
[30800]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic LOW output current I_OL when shorted to Vcc
The resulting current when the gate is in the logic LOW state,
but the load forces the output voltage to the supply voltage Vcc.
The default value is
you select the
Quadratic option for the Output current-voltage
-45 mA. This parameter is available when
relationship parameter.
Propagation delay
Timeittakesfortheoutputtoswingfrom
LOW after the input logic levels change. The default value is 25 ns.
LOW to HIGH or HIGH to
2-44
Protection diode on resistance
The gradient of the voltage-current relationship for the protection
diodes when forward biased. The default value is
parameter is available when you select the
Quadratic option for
5 Ω.This
the Output current-voltage relationship parameter.
Protection diode forward voltage
The voltage above which the protection diode is turned on. The
default value is
select the
0.6 V. This para meter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Initial Conditions Tab
CMOS NOT
Output in
itial state
Specify
or Low.T
output s
is great
have th
The def
whether the initial output state of the block is
tates, provided that the Propagation delay parameter
er than zero and the Solver Configuration block does not
e Start simulation from steady state option selected.
ault value is
his parameter is used for both linear and quadratic
Low.
Ports The block has the following ports:
A
Electrical input port.
J
Electrical output port.
High
2-45
CMOS OR
Purpose Model CMOS OR gate behaviorally
Library Logic
Description The CMO S OR block represents a CMOS OR logic gate behaviorally:
• The block output logic level is
gate inputs are 1.
• The block output logic level is
The block determines the logic levels of the gate inputs as follows:
• If the g ate voltage is greater than the threshold voltage, the block
interprets the input as logic 1.
• Otherwise, the block interprets the input as logic 0.
The threshold voltage is the voltage value at midpoint between the
High level input voltage parameter value and the Low level input
voltage parameter value.
Note To improve simulation speed, the block does not model all the
internal individual MOSFET devices that make up the gate. See “Basic
Assumptions and Limitations” on page 2-47 for details.
Theblockmodelsthegateasfollows:
• The gate inputs have infinite resistance and finite or zero capacitance.
HIGH if the logic levels of any of the
LOW otherwise.
2-46
• The gate output offers a selection of two models:
Quadratic. For more informa tion , see “Selecting the Output Model
for Logic Blocks”. Use the Output current-voltage relationship
parameter to specify the output model.
• You can specify propagation delay for both output models. For
output, the block sets the value of the gate output capacitor such that
Linear and
Linear
CMOS OR
the resistor-capacitor time constant equals the Propagation delay
parameter value. For
lagged to approximate the Propagation delay parameter v alu e.
The block output voltage depends on the output model selected:
Quadratic output, the gate input demand is
Basic
Assumptions
and
Limitations
• For
• For
The block does not model the internal individual MOSFET devices
that m ake up the gate (except for the final MOSFET pair if you select
the
parameter). This limitation has the following implications:
• The block does not accurately model the gate’s response to input
• The block does not a ccurately model dynamic response.
Circuits that involve a f eedback path around a set of logic gates may
require a nonzero propag ation delay to be set on one or more gates.
Linear model, output high is the High level output voltage
parameter value, and output low is the Low level output voltage
parameter value.
Quadratic model, the output voltage for High and Low states is
a function of the output current, as explained in “Quadratic Model
Output and Parameters”. For zero load current, output high is Vcc
(the Supply voltage parameter value), and output low is zero volts.
Quadratic option for the Output current-voltage relationship
noise and inputs that are around the logic threshold voltage.
2-47
CMOS OR
Dialog
Box a nd
Parameters
Inputs Tab
Low level
Voltage
as logic
High lev
el input voltage
Voltage
as logi
input voltage
value below which the block interprets the input voltage
LOW. The default value is 2 V.
value above which the block interprets the input voltage
c
HIGH. The default value is 3 V.
2-48
Averag
Fixed
aMOSF
appli
Avera
of th
manu
valu
e input capacitance
capacitance that approximates the input capacitance for
ET gate. The MOSFET capacitance depends on the
ed voltage. When you drive this block with another gate, the
ge input capacitance produces a rise time similar to that
e MOSFET. You can usually find this capacitance value on a
facturer datasheet. The default value is
etozeromayresultinfastersimulationtimes.
5 pF. Setting this
Outputs Tab
CMOS OR
2-49
CMOS OR
2-50
Output current-voltage relationship
Select the output model,
is
Linear.
Low level output voltage
Voltage value at the output when the output logic level is
default value is
the
Linear option for the Output current-voltage relationship
parameter.
High level output voltage
Voltage value at the output when the output logic level is
The default value is
you select the
relationship parameter.
0 V. This parameter is available when you select
Linear option for the Output current-voltage
Linear or Quadratic. The def a ult value
5 V. This parameter is available when
LOW.The
HIGH.
Output resistance
Value of the series output resistor that is used to model the drop
in output voltage resulting from the output current. The default
value is
25 Ω. You can derive this value from a datasheet by
dividing the high-level output voltage by the maximum low-level
output current. This parameter is available when you select the
Linear option for the Output current-voltage relationship
parameter.
Supply voltage
Supplyvoltagevalueappliedtothegateinyourcircuit. The
default value is
select the
5 V. This parameter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Measurement voltage
The gate supply voltage for which mask data output resistances
and currents are defined. The default value is
is available when you select the
Quadratic option for the Output
5 V. This parameter
current-voltage relationship parameter.
CMOS OR
Logic HIGH output resistance at zero current and at I_OH
A row vector [ R_OH1 R_OH2 ]oftworesistancevalues. The
first value R_OH1 is the gradient of the output voltage-current
relationship when the gate is logic HIGH and there is no output
current. The second value R_OH2 is the gradient of the output
voltage-current relationship when the gate is logic HIGH and the
output current is I_OH. The default value is
parameter is available when you select the
[25250]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic HIGH output current I_OH when shorted to ground
TheresultingcurrentwhenthegateisinthelogicHIGHstate,
but the load forces the output voltage to zero. The default value is
63 mA. This parameter is available when you select the Quadratic
option for the Output current-voltage relationship parameter.
2-51
CMOS OR
Logic LOW output resistance at zero current and at I_OL
A row vector [ R_OL1 R_OL2 ] of two resistance values. The
first value R_OL1 is the gradient of the output voltage-current
relationship when the gate is logic LOW and there is no output
current. The second value R_OL2 is the gradient of the output
voltage-current relationship when the gate is logic LOW and the
output current is I_OL. The default value is
parameter is available when you select the
[30800]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic LOW output current I_OL when shorted to Vcc
The resulting current when the gate is in the logic LOW state,
but the load forces the output voltage to the supply voltage Vcc.
The default value is
you select the
Quadratic option for the Output current-voltage
-45 mA. This parameter is available when
relationship parameter.
Propagation delay
Timeittakesfortheoutputtoswingfrom
LOW after the input logic levels change. The default value is 25 ns.
LOW to HIGH or HIGH to
2-52
Protection diode on resistance
The gradient of the voltage-current relationship for the protection
diodes when forward biased. The default value is
parameter is available when you select the
Quadratic option for
5 Ω.This
the Output current-voltage relationship parameter.
Protection diode forward voltage
The voltage above which the protection diode is turned on. The
default value is
select the
0.6 V. This para meter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Initial Conditions Tab
CMOS OR
Output in
itial state
Specify
or Low.T
output s
is great
have th
The def
whether the initial output state of the block is
tates, provided that the Propagation delay parameter
er than zero and the Solver Configuration block does not
e Start simulation from steady state option selected.
ault value is
his parameter is used for both linear and quadratic
Low.
Ports The block has the following ports:
A
Electrical input port.
B
Electrical input port.
J
Electrical output port.
High
2-53
CMOS XOR
Purpose Model CMOS XOR gate behaviorally
Library Logic
Description The CMOS XOR block represents a CMOS XOR logic gate behaviorally:
• The block output logic level is
thegateinputsis1.
• The block output logic level is
The block determines the logic levels of the gate inputs as follows:
• If the g ate voltage is greater than the threshold voltage, the block
interprets the input as logic 1.
• Otherwise, the block interprets the input as logic 0.
The threshold voltage is the voltage value at midpoint between the
High level input voltage parameter value and the Low level input
voltage parameter value.
Note To improve simulation speed, the block does not model all the
internal individual MOSFET devices that make up the gate. See “Basic
Assumptions and Limitations” on page 2-55 for details.
Theblockmodelsthegateasfollows:
• The gate inputs have infinite resistance and finite or zero capacitance.
HIGH if the logic level of exactly one of
LOW otherwise.
2-54
• The gate output offers a selection of two models:
Quadratic. For more informa tion , see “Selecting the Output Model
for Logic Blocks”. Use the Output current-voltage relationship
parameter to specify the output model.
• You can specify propagation delay for both output models. For
output, the block sets the value of the gate output capacitor such that
Linear and
Linear
CMOS XOR
the resistor-capacitor time constant equals the Propagation delay
parameter value. For
lagged to approximate the Propagation delay parameter v alu e.
The block output voltage depends on the output model selected:
Quadratic output, the gate input demand is
Basic
Assumptions
and
Limitations
• For
• For
The block does not model the internal individual MOSFET devices
that m ake up the gate (except for the final MOSFET pair if you select
the
parameter). This limitation has the following implications:
• The block does not accurately model the gate’s response to input
• The block does not a ccurately model dynamic response.
Circuits that involve a f eedback path around a set of logic gates may
require a nonzero propag ation delay to be set on one or more gates.
Linear model, output high is the High level output voltage
parameter value, and output low is the Low level output voltage
parameter value.
Quadratic model, the output voltage for High and Low states is
a function of the output current, as explained in “Quadratic Model
Output and Parameters”. For zero load current, output high is Vcc
(the Supply voltage parameter value), and output low is zero volts.
Quadratic option for the Output current-voltage relationship
noise and inputs that are around the logic threshold voltage.
2-55
CMOS XOR
Dialog
Box a nd
Parameters
Inputs Tab
Low level
Voltage
as logic
High lev
el input voltage
Voltage
as logi
input voltage
value below which the block interprets the input voltage
LOW. The default value is 2 V.
value above which the block interprets the input voltage
c
HIGH. The default value is 3 V.
2-56
Averag
Fixed
aMOSF
appli
Avera
of th
manu
valu
e input capacitance
capacitance that approximates the input capacitance for
ET gate. The MOSFET capacitance depends on the
ed voltage. When you drive this block with another gate, the
ge input capacitance produces a rise time similar to that
e MOSFET. You can usually find this capacitance value on a
facturer datasheet. The default value is
etozeromayresultinfastersimulationtimes.
5 pF. Setting this
Outputs Tab
CMOS XOR
2-57
CMOS XOR
2-58
Output current-voltage relationship
Select the output model,
is
Linear.
Low level output voltage
Voltage value at the output when the output logic level is
default value is
the
Linear option for the Output current-voltage relationship
parameter.
High level output voltage
Voltage value at the output when the output logic level is
The default value is
you select the
relationship parameter.
0 V. This parameter is available when you select
Linear option for the Output current-voltage
Linear or Quadratic. The def a ult value
5 V. This parameter is available when
LOW.The
HIGH.
Output resistance
Value of the series output resistor that is used to model the drop
in output voltage resulting from the output current. The default
value is
25 Ω. You can derive this value from a datasheet by
dividing the high-level output voltage by the maximum low-level
output current. This parameter is available when you select the
Linear option for the Output current-voltage relationship
parameter.
Supply voltage
Supplyvoltagevalueappliedtothegateinyourcircuit. The
default value is
select the
5 V. This parameter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Measurement voltage
The gate supply voltage for which mask data output resistances
and currents are defined. The default value is
is available when you select the
Quadratic option for the Output
5 V. This parameter
current-voltage relationship parameter.
CMOS XOR
Logic HIGH output resistance at zero current and at I_OH
A row vector [ R_OH1 R_OH2 ]oftworesistancevalues. The
first value R_OH1 is the gradient of the output voltage-current
relationship when the gate is logic HIGH and there is no output
current. The second value R_OH2 is the gradient of the output
voltage-current relationship when the gate is logic HIGH and the
output current is I_OH. The default value is
parameter is available when you select the
[25250]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic HIGH output current I_OH when shorted to ground
TheresultingcurrentwhenthegateisinthelogicHIGHstate,
but the load forces the output voltage to zero. The default value is
63 mA. This parameter is available when you select the Quadratic
option for the Output current-voltage relationship parameter.
2-59
CMOS XOR
Logic LOW output resistance at zero current and at I_OL
A row vector [ R_OL1 R_OL2 ] of two resistance values. The
first value R_OL1 is the gradient of the output voltage-current
relationship when the gate is logic LOW and there is no output
current. The second value R_OL2 is the gradient of the output
voltage-current relationship when the gate is logic LOW and the
output current is I_OL. The default value is
parameter is available when you select the
[30800]Ω.This
Quadratic option for
the Output current-voltage relationship parameter.
Logic LOW output current I_OL when shorted to Vcc
The resulting current when the gate is in the logic LOW state,
but the load forces the output voltage to the supply voltage Vcc.
The default value is
you select the
Quadratic option for the Output current-voltage
-45 mA. This parameter is available when
relationship parameter.
Propagation delay
Timeittakesfortheoutputtoswingfrom
LOW after the input logic levels change. The default value is 25 ns.
LOW to HIGH or HIGH to
2-60
Protection diode on resistance
The gradient of the voltage-current relationship for the protection
diodes when forward biased. The default value is
parameter is available when you select the
Quadratic option for
5 Ω.This
the Output current-voltage relationship parameter.
Protection diode forward voltage
The voltage above which the protection diode is turned on. The
default value is
select the
0.6 V. This para meter is available when you
Quadratic option for the Output current-voltage
relationship parameter.
Initial Conditions Tab
CMOS XOR
Output in
itial state
Specify
or Low.T
output s
is great
have th
The def
whether the initial output state of the block is
tates, provided that the Propagation delay parameter
er than zero and the Solver Configuration block does not
e Start simulation from steady state option selected.
ault value is
his parameter is used for both linear and quadratic
Low.
Ports The block has the following ports:
A
Electrical input port.
B
Electrical input port.
J
Electrical output port.
High
2-61
Comparator
Purpose Model a comparator behaviorally
Library Integrated Circuits
Description The Comparator block is an abstracted behavioral model of a comparator
integrated circuit. It does not model an internal transistor-level
implementation. T herefore, the block runs quickly during simulation
but retains the correct I/O behavior. The block models differential
inputs electrically as having infinite resistance and a finite or zero
capacitance.
The block models the gate output as a voltage source driving a series
resistor and a capacitor that connects to ground. The output pin
connects to the resistor-capacitor connection node. If the difference in
the inputs is greater than the input thre shold voltage, then the output
is equal to the High level output voltage (
output is equal to the Low level output voltage (
V
). Otherwise, the
OL
).
V
OH
2-62
The output model is shown in the following illustration.
Comparator
Basic
Assumption
and
Limitations
Modeling of the output as a controlled voltage source is representative
of a totem-pole or push-pull output stage. To model a device with an
s
open-collector:
1 Connect the output pin to the base of an NPN Bipolar Transistor
or PNP Bipolar Transistor block.
2 Set the Output resistance parameter to a suitable value.
2-63
Comparator
Dialog
Box a nd
Parameters
Inputs Tab
Input offset voltage
The voltage which the difference in the input voltages must be
greater than so that the comparator gives a logic output 1. The
default value is
Average input capacitance
You can usually find this capacitance value on a manufacturer
datasheet. The default value is
result in faster simulation times.
5 mV.
0 pF.Settingthisvaluetozerocan
2-64
Outputs Tab
Low level output voltage
V
The steady-state output voltage,
, when the voltage difference
OL
across the inputs is less than or equal to the threshold voltage,
and the output current is zero. The default value is
Comparator
0 V.
High level output voltage
V
Thesteady-stateoutputvoltage,
, when the voltage
OH
difference across the inputs is greater than the threshold voltage,
and the output current is zero. The default value is
Output resistance
This parameter is the ratio of output voltage drop to output
current. Set this parameter to
()/VV I
−
OH OH OH
11
,where
is the reduced output high voltage when the output current is
I
. The default value is 50 Ω.
OH1
Propagation delay
Set this value based on the high-to-low and low-to-high
propagation delays. The default value is
0 s.
5 V.
V
OH1
2-65
Comparator
Ports This block has the following ports:
+
Positive electrical input port.
-
Negative electrical input port.
OUT
Electrical output port.
See Also CMOS Buffer .
2-66
Controlled PWM Voltage
Purpose Model pulse-width modulated voltage source
Library Drivers
Description The Controlled PWM Voltage block represents a pulse-width modulated
(PWM) voltage source that depends on the reference voltage V
its +ref and -ref ports. The duty cycle is
VV
−
min
100 *
where:
ref
VV
−
max min
percent
ref
across
Basic
Assumptions
and
Limitations
• V
• V
The value of the Output voltage amplitude parameter determines
amplitude of the output voltage.
At time zero, the pulse is initialized as high, unless the duty cycle is
set to zero.
The model is based on the following assumptions:
• The REF output of this block is floating, i.e. it is not tied to the
• Do not use the Controlled PWM block to drive a motor block directly.
• When driving a motor via the H-Bridge block, set the Simulation
is the minimum reference voltage
min
is the maximum reference voltage
max
Electrical Reference. One consequence of this is that if you connect
the PWM and REF electrical ports directly to the H-Bridge PWM and
REF electrical ports, you must attach an Electrical Reference block
to the REF connection line.
A PWM motor driver goes open circuit in betw een pulses. Use the
H-Bridge block to drive a motor block.
mode para m eter to
also set the Simulation mode parameter of the H-Brid g e block
to
Averaged mode. This applies the average of the dem anded
Averaged tospeedupsimulations. Youmust
2-67
Controlled PWM Voltage
PWM voltage to the motor. The Averaged mode assumes that
the impedance of the motor inductive term is small at the PWM
frequency. To verify this assumption, run the simulation using
the
PWM mode and compare the results to those obtained from using
the
Averaged mode.
• If you are linearizing your model, set the Simulation mode
parameter to
operating point of the block correctly. You can only linearize the
block for inputs corresponding to a duty cycle greater than zero and
less than 100 percent.
Dialog
Box a nd
Parameters
Averaged and ensure that you have specified the
2-68
Controlled PWM Voltage
PWM frequency
Frequency of the PWM output signal. The default value is
Hz.
Input value Vmin for 0% duty cycle
Value of the input voltage at which the PWM signal has a 0% duty
cycle. The default value is
Input value Vmax for 100% duty cycle
Value of the input voltage at which the PWM signal has a 100%
duty cycle. The default value is
Output voltage amplitude
Amplitude of the PWM signal when the output is high. The
default value is
Simulation mode
Thetypeofoutputvoltagecanbe
mode,
mode, the output is a constant whose value is equal to the average
value of the PWM signal.
PWM, produces a pulse-width modulated signal. In Averaged
5 V.
0 V.
5 V.
PWM or Averaged. The default
1000
Ports The block has the following ports:
+ref
Positive electrical reference voltage.
-ref
Negative electrical reference voltage.
PWM
Pulse-width modulated signal.
REF
Floating zero volt reference.
Examples See the Linear Electrical Actuator (System-Level Model) and Linear
Electrical Actuator (Implementation Model) demos.
See Also Stepper Motor Driver
2-69
Crystal
Purpose Model stable resonator
Library Passive Devices
Description The Crystal block represents the electrical characteristics of a crystal.
The following figure shows the equivalent circuit model of the Crystal
block.
C
0
C
You specify the equivalent circuit parameters for this model when
you set the Parameterization parameter to
parameters
• The capacitor C0 corresponds to the capacitance you specify in the
Shunt capacitance, C0 parameter.
• The capacitor C1 corresponds to the capacitance you specify in the
Motional capacitance, C1 parameter.
• The inductor L1 corresponds to the inductance you specify in the
Motional inductance, L1 parameter.
• The resistor R1 corresponds to the resistance you specify in the
Equivalent series resistance, R1 parameter.
Most datasheets specify crystal frequency rather than inductance, so
the block optionally accepts frequency data.
L
1
1
.
R
1
Equivalent circuit
2-70
• When you set the Parameterization parameter to Series
resonance data
calculate L1 from the series resonant frequency:
, the block uses the following relationship to
Crystal
f
s
Where fsis the Series resonance, fs parameter value.
• When you set the Parameterization parameter to
resonance data
calculate L1 from the parallel resonant frequency:
f
a
Where:
- f
is the Parallel resonance, fa parameter value.
a
- C
is the Load capacitance, CL parameter value.
L
Some datasheets specify quality factor rather than equivalent series
resistance, so the block optionally accepts quality factor data. When you
set the R1 parameterization parameter to
block uses the following relationship to calculate R1 from the quality
factor:
2
Q
=
Where Q is the Quality factor, Q parameter value.
1
=
LC
2
11
Parallel
, the block uses the following relationship to
=
LC C C C C C
2
fL
1
R
1
()
11 0 1 0
1
+
LL
++
/( )
Quality factor Q,the
Note The R1 parameterization parameter is only visible when y o u
select
Series resonance data or Parallel resonance data for the
Parameterization parameter.
2-71
Crystal
Basic
Assumptions
and
Limitations
Dialog
Box a nd
Parameters
The Crystal block models only the fundamental crystal vibration mode.
Parameterization
Select one of the following methods for block parameterization:
2-72
•
Series resonance data — Provide series resonant frequency
and capacitance data for the crystal. This method is the default.
•
Parallel resonance data — Provide parallel resonant
frequency a nd capacitance data for the crystal.
•
Equivalent circuit parameters — Provide electrical
parameters for an equivalent circuit model of the crystal.
Series resonance, fs
Crystal series resonant frequency. This parameter is only
visible when you select
Series resonance data for the
Parameterization parameter. The default value is
Parallel resonance, fa
Crystal parallel resonant frequency that corresponds to
operating with a parallel load capacitance specified by the Load
capacitance, CL parameter. This parameter is only visible when
you select
parameter. The default value is
Parallel resonance data for the Parameterization
32.768 kHz.
Motional inductance, L1
Inductance that represents the mechanical mass of the crystal.
This parameter is only visible when you select
circuit parameters
default value is
for the Parameterization parameter. The
6.742e+03 H.
Equivalent
R1 parameterization
Select one of the following methods for series resista n c e
parameterization:
Crystal
32.764 kH z.
•
Equivalent series resistance R1 — Provide the resistance
value directly. This is the default method.
•
Quality factor Q — Provide the quality factor that the block
uses to calculate the resistance value.
This parameter is only visible when you select
or Parallel resonance data for the Parameterization
data
Series resonance
parameter.
Quality factor, Q
Crystal quality factor. This parameter is only visible when you
make one of the following selections:
•
Series resonance data for the Parameterization parameter
and
Quality factor Q for the R1 parameterization
parameter
2-73
Crystal
• Parallel resonance data for the Parameteriz ation
parameter and
Quality factor Q for the R1
parameterization parameter
The default value is
9e+04.
Equivalent series r esistance, R1
Motional damping term. This parameter is only visible when you
make one of the following selections:
•
Series resonance data for the Parameterization
parameter and
Equivalent series resistance R1 for the R1
parameterization parameter
•
Parallel resonance data for the Parameterization
parameter and
Equivalent series resistance R1 for the R1
parameterization parameter
•
Equivalent circuit parameters for the Parameterization
parameter
The default value is
15 kΩ.
Motional capacitance, C1
Capacitance that represents crystal mechanical stiffness unde r
load. The default value is
0.0035 pF.
Load capacitance, CL
Load capacitance that corresponds to the Parallel resonance,
fa parameter value. This parameter is only visible when you
select
Parallel resonance data for the Parameterization
parameter. The default value is
Shunt capacitance, C0
Electrical capacitance between the two crystal electrical
connections.Theparametervaluemustbegreaterthanzero. The
default value is
Initial voltage
The output voltage at the start of the simulation when the output
current is zero. The default value is
Ports The block has the following ports:
2-74
12.5 pF.
1.6 pF.
0 V.
+
Positive electrical port.
-
Negative electrical port.
Crystal
2-75
Current-Controlled Switch
Purpose Model current-controlled switch with h ys teresis
Library SPICE-Compatible Components/Passive Devices
Description The Current-Controlled Switch block represents the electrical
characteristics of a switch whose state is controlled by the current
through the input ports (the controlling current):
• When the controlling current is greater than the sum of the
Threshold current, IT and Hysteresis current, IH parameter
values, the switch i s closed and has a resistance equal to the On
resistance, RON parameter va lue.
• When the controlling current is less than the Threshold current,
IT parameter value minus the Hysteresis current, IH parameter
value, the switch is open and has a resistance equal to the Off
resistance, ROFF parameter value.
• When the controlling current is greater than or less than the
Threshold current, IT parameter value by an amount less than or
equal to the Hysteresis current, IH parameter value, the current is
in the crossover region and the state of the switch remains unchanged.
Basic
Assumptions
and
Limitations
2-76
The block output resistance model is discontinuous during switching.
The discontinuity might cause numerical issues. Try the following
actions to resolve the issues:
• Set the On resistance, RON and Off resistance, ROFF parameter
values to keep the ratio RON /RO FF as small as possible, and less
than 1e+12.
• Increase the Hysteresis current, IH parameter value to reduce
switch chatter.
• Decrease the Max step size parameter value (in the Configuration
Parameters block dialog box).
Dialog
Box a nd
Parameters
Current-Controlled Switch
Note This increases the simulation time.
Threshold current, IT
The current above which the block interprets the controlling
current as HIGH . The default value is
Note The controlling current must differ from the threshold
current by at least the Hysteresis current, IH parameter value
to change the state of the switch.
Hysteresis current, IH
The amount by which the controlling current must exceed or fall
below the Threshold current, IT parameter value to change the
state of the switch. The default value is
0 A.
0 A.
2-77
Current-Controlled Switch
On resistance, RON
The resistance of the switch when it is closed. The default value
is
1 Ω.
Off resistance, ROFF
The resistance of the switch when it is open. The default value
is
1e+12 Ω.
Initial switch state
Select one of the following options for the state of the switch at
the start of the simulation:
•
On — The switch is initially closed and its resistance value is
equal to the On resistance, RON parameter value. This is
the default option.
•
Off — The switch is initially open and its resistance value is
equal to the Off resistance, ROFF parameter value.
Ports The block has the following ports:
2-78
+
Positive electrical input and output ports.
-
Negative electrical input and output ports.
DC Current Source
Purpose Model constant current source
Library SPICE-Compatible Components/Sources
Description The DC Current Source block represents a constant current source
whose output current value is independent of the voltage across its
terminals.
The block uses a small conductance internally to prevent numerical
simulation issues. The conductance connects the + and - ports of the
device and has a conductance GMIN:
• By default, GMIN matches the Minimum conductance GMIN
parameter of the SPICE Environment Parameters block, whose
default value is 1e–12.
• To change GMIN, add a SPICE Environment Parameters block to
your m odel and set the Minimum conductance GMIN parameter
to the desired value.
Dialog
Box a nd
Parameters
Constant value, DC
The value of the DC output current. The default value is
Ports The block has the following ports:
0 A.
2-79
DC Current Source
+
Positive electrical voltage.
-
Negative electrical voltage.
See Also DC Voltage Source
2-80
DC Motor
Purpose Model electrical and torque characteristics of DC motor
Library Rotational Actuators
Description The DC Motor block represents the electrical and torque characteristics
of a DC motor using the following equivalent circuit model:
LR
+
v
b
−
You specify the equivalent circuit parameters for this model when
you set the Model parameterization parameter to
circuit parameters
you specify in the Armature resistance parameter. T he inductor L
corresponds to the inductance you specify in the Armature inductance
parameter. The permanent magnets in the motor induce the following
back emf v
vk
=
bv
where kvis the Back-emf constant and ω is the angular velocity.
The motor produces the following torque, which is proportional to the
motor current i:
Tki
=
where ktis the Torque constant. The DC Motor block assumes that
there are no electromagnetic losses. This means that mechanical power
is equal to the electrical power dissipated by the back emf in the
armature. Equating these two terms gives:
in the armature:
b
t
. The resistor R corresponds to the resistance
i
V
By equivalent
2-81
DC Motor
Tvi
=
b
ki k i
=
tv
kk
=
vt
As a result, you specify either kvor ktin the block dialog box.
The torque-speed characteristic for the DC Motor block is related to
the parameters in the preceding figure. When you set the Model
parameterization parameter to
or By rated power, rated speed & no-load s peed,theblocksolves
for the equivalent circuit parameters as follows:
1 For the steady-state torque-speed relationship, L has no effect.
2 Sum the voltages around the loop and rearrange for i:
By stall torque & no-load speed
VvRVk
−
i
=
bv
=
−
R
3 Substitute this value of i into the equation for torque:
k
t
T
When you set the Model parameterization parameter to By stall
torque & no-load speed
determine values for R and k
When you set the Model parameterization parameter to
power, rated speed & no-load speed
speed and power to calculate the rated torque. The block uses the
rated torque and no-load speed values in the preceding equation to
determine values for R and k
The block models motor inertia J and damping B for all values of the
Model parameterization parameter. The output torque is:
Vk
=−
()
R
v
, the block uses the preceding equation to
(and equivalently kv).
t
By rated
, the block uses the rated
.
t
2-82
DC Motor
k
t
T
load
When a positive current flows from the electrical + to - ports, a positive
torque acts from the mechanical C to R ports.
Vk J B
=−
()
R
v
−−
Dialog
Box a nd
Parameters
Electrical Torque Tab
Model parameterization
Select one of the following methods for block parameterization:
2-83
DC Motor
• By equivalent circuit parameters — Provide electrical
parameters for an equivalent circuit model of the motor. This
is the default method.
•
By stall torque & no-lo ad speed — Provide torque and
speed parameters that the block converts to an equivalent
circuit model of the motor.
•
By rated power, rated s peed & no-load speed —Provide
power and speed param eters that the block converts to an
equivalent circuit model of the motor.
Armature resistance
Resistance of the conducting portion of the motor. T his parameter
is only visible when you select
parameters
default value is
for the Model parameterization parameter. The
3.9 Ω.
By equivalent circuit
Armature inductance
Inductance of the conducting portion of the motor. If you do
not have information about this inductance, set the value of
this parameter to a small, nonzero number. The default value
is
1.2e-05 H.
2-84
Define back-emf or torque constant
Indicate w hether you will specify the motor’s back-emf constant
or torque constant. When you specify them in SI units, these
constants have the same value, so you only specify one or the
other in the block dialog box. This parameter is only visible when
you select
By equivalent circuit parameters for the Model
parameterization parameter. The default value is
back-emf constant
.
Back-emf constant
The ratio of the voltage generated by the motor to the speed at
which the motor is spinning. The default value is
This parameter is only visible when you select
constant
for the Define back-emf or torque con stant
7.2e-05 V/rpm.
Specify back-emf
parameter.
Specify
Torque constant
The ratio of the torque generated by the motor to the current
delivered to it. This parameter is only visible when you select
Specify torque constant for the Define back-emf or torque
constant parameter. The default value is
6.876e-04 N*m/A.
Stall torque
The amount of torque generated by the motor when the speed
is approximately zero. This parameter is only visible when
you select
By stall torque & no-load speed for the Model
parameterization parameter. The default value is
N*m.
No-load speed
Speed of the motor when not driving a load. This parameter
is only visible when you select
speed
or By rated power, rated speed & no-load speed for
By stall torque & no-load
the Model parameterization parameter. The default value is
1.91e+04 rpm.
Rated speed (at rated load)
Motor speed at the rated mechanical power level. This parameter
is only visible when you select
& no-load speed
Thedefaultvalueis
for t he Model parameterization parameter.
1.5e+04 rpm.
By rated power, rated speed
DC Motor
2.4e-04
Rated load (mechanical power)
The mechanical power the motor is designed to deliver at the
rated speed. T his parameter is only visible when y ou select
rated power, rated spee d & no-load speed
parameterization parameter. The default value is
Rated DC supply voltage
The voltage at which the motor is rated to operate. This
parameter is only visib le when you select
no-load speed
speed
value is
for the Model parameterization parameter. The default
1.5 V.
or By rated power, rated speed & no-load
By stall torque &
By
for the Model
0.08 W.
2-85
DC Motor
Mechanical Tab
2-86
Rotor inertia
Resistance of the rotor to change in motor motion. The default
value is
Rotor damping
Energy dissipated by the rotor. The default value is
N*m/(rad/s). The value can be zero.
0.01 g*cm
2
.Thevaluecanbezero.
1e-08
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