Marktech TB62709N, TB62709F Datasheet

TOSHIBA Bi-CMOS Integrated

Circuit Silicon Monolithic

TB62709N/FTB62709N/F

TB62709N/F

TB62709N/FTB62709N/F

Intelligent, Constant Current, 7 segment LED numeric display
decoder/driver. For use with common anode configuration
numeric displays.

The TB62709N/F is an intelligent Constant Current LED display
driver designed specifically for seven segment LED display ap­plications. The stand alone device includes all of the decode,
multiplex and driver circuitry necessary to control up to four seven
segment LED digits. All of the information required to program
up to four LED digits is input serially including a 16 step bright­ness control. Expansion beyond four digits is possible with a
cascade connection to a second device. The device automati­cally refreshes and maintains the displayed information.

Features

• Constant Current segment drivers for consistent display
brightness.

• Single device saves labor and board space.

• Internal character set simplifies design efforts.

• Automatically handles multiplex and display refresh tasks.

• 16 step programmable brightness control.

• Single device controls up to four digits.

• Available in thru hole and surface mount packages.

• Data out cascade port for expansion beyond four digits.

TB62709N

SDIP24-P-300-1.78 Weight: 1.62g (Typ.)

TB62709F

SSOP24-P-300-1.00 Weight: 0.32g (Typ.)

Performance Characteristics

VDD = 4.5V~5.5V
Digit enable: 17V / 400mA
Segment select: 17V / 0-40mA
Max transition frequency: 15Mhz

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TOSHIBA Bi-CMOS Integrated

Circuit Silicon Monolithic

TB62709N/FTB62709N/F

TB62709N/F

TB62709N/FTB62709N/F

Block Diagram:

Maximum Ratings:

CHAR ACTERIST ICS SYMBOL RATING UNIT

Sup ply Volt ag e VD D 7.0 volt s

LED Supply Voltage VCC 17 volts

Sourc e Output C urrent
Digit 0~3

Segment Drive Current
Segment a~DP

Output Curre nt IOH/IOL +/- 5 mA

Inp ut V o lta ge V IN

Clock Frequency FCLK 15 MHz

Total Outp ut Cur rent IVD D 40 0 mA

Power Dissipation PD

Operation Temperature Topr -40 ~ +85 °C

Storage Temperature Tstg -55 ~+150 °C

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ID IG -40 0 m A

IOU T 5 0 m A

-0.3 ~ VD D
~+0.3

TB62709N: 1.78

TB62709F: 0.62

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TOSHIBA Bi-CMOS Integrated

Circuit Silicon Monolithic

TB62709N/FTB62709N/F

TB62709N/F

TB62709N/FTB62709N/F

Recommended Operating Conditions:

CHAR ACTER IST ICS SYMBOL

Output Stage

Supply Current ICC1 1

IC C2 1

Digit 0~3 Scanning Freq. fOSC 2

Out a~DP Output Current ISEG 3

Digit 0~3 Leakage Current ILEAK1 4 All off mode, VCC=17V — — -20 µA

Out a~DP Leakage Current ILEAK2 4 All off mode, VCC=17V — — 20 µA

Digit 0~3 Output Voltage VOUT 5

Logic

Supply Current

Operating Supply Current IDD3 6

High Level Input Current IIH — Data-in, Load& Clock VIN=5V — — 1 µA

Low Level Output Current IIL — Data-in, Load&Clock VIN=0V — — -1 µA

High Le vel Output Voltage

Low Level Output Voltage

Clock Frequency FCLK 6

IDD1 6 Standby Mode, Ta=25°C — — 200 µA

IDD2 6 Blank Mode, Ta=25°C — — 12.5 mA

VOH1 6 Data out, IOH=-1mA 4.6 — — V

VOH2 6 Data-out, IOH=-1µA — VDD — V

VOL1 6 Data out, IOH=-1mA — — 0.4 V

VOL2 6 Data-out, IOH=-1µA — 0.1 — V

TEST

CIRCUIT

CONDITION MIN. TYP. MAX. UNIT

Set normal operation mode,

Ω,

Rext=760
ON VCC = 5V, Ta=25°C

Set normal operation mode,
Rext=760
ON VCC = 5V, Ta=25°C

Normal operation mode,
VDD=4.5 - 5.5V

Normal operation mode,
VDD=4.5 - 5.5V

Normal operation mode
ID IG = 3 20 mA

Normal operating mode
fCLK=10MHz, Ta=25°C
Data-i n:output a~DP o n

CASCADE connected,
TA = -40 ~ 85ºC

Out a~DP, all

Ω,

Out a~DP, all

—300—mA

—320—mA

240 480 960 Hz

29 34 40 mA

3.0 — — V

— — 20.5 mA

10 — — MHz

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optoelectronics

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TOSHIBA Bi-CMOS Integrated

Circuit Silicon Monolithic

TB62709N/FTB62709N/F

TB62709N/F

TB62709N/FTB62709N/F

Switching Characteristics:

CH ARACTER ISTICS SYMBOL CONDITION MIN. TYP. MAX. UNIT

Data Hold Time (D-IN Clock) tDHO — 10 — ns

Data Set-up Time (D-IN Clock) tDS T — 20 — ns

Propagation Delay (Clock D-OUT)

High Level Pulse Wi dth Of Clock tCLK H — 30 — ns

Low Level Pulse Width Of Clock tCLKL — 30 — ns

Pulse Width Of Load tw LD — 100 — ns

Setup Time (Clock-Load) tCLK-LD — 50 — ns

Setup Time (Load-Clock) tLD-CLK — 50 — ns

Out a ~ DP Propagation Delay
(Load-Outn)

Out a ~ DP Rise Time (OUTn) trSEG CL=10pf 0.2 1.0 — µs

Out a ~ DP Fall Time (OUTn) tfSEG CL=10pf 0.2 1.0 — µs

Digit 0 ~ 3 Propagation Delay
(Load-DIGn)

Digit 0 ~ 3 Rise Time (DIGn) trDIG CL=10pf 0.4 2.0 — µs

Digit 0 ~ 3 Fall Time (DIGn) tfDIG CL=10pf 0.4 2.0 — µs

tPHL-SO CL=10pf — 25 — ns

tPLH-SO CL=10pf — 25 — ns

tpHL-S EG CL=1 0pf — — 5.0 ns

tpLH-SEG CL=10pf — — 5.0 ns

tpHL-D IG CL=10pf — — 10.0 µs

tpLH-DIG CL=10pf — — 10.0 µs

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optoelectronics

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587

TOSHIBA Bi-CMOS Integrated

Circuit Silicon Monolithic

TB62709N/FTB62709N/F

TB62709N/F

TB62709N/FTB62709N/F

Recommended Operating Conditions:

CHARACTERISTICS SYMBOL CONDITION MIN. TYP. MAX. UNIT

Output Sta ge

Supply Voltage VCC 4.0 — 6.0 V

Digit 0~3 Output Current IDIG VOUT=3.0V — — -320 mA

Out a~DP Output Current ISEG VCE=0.7V — — 40 mA

Logic

Supply Voltage VDD 4.5 — 5.5 V

High Level Input Current IIH

Low Level Input Current IIL Data-In, Load&Clock,VIN=0V — — -1 µA

High Level Input Voltage VIH

Low Level Input Voltage VIL — —

Switching Condition

Data Hold Time (D-IN Clock) tDHO 30 — — ns

Data Setup Time (D-IN Clock ) tDST 50 — — ns

Propagation Delay (Clock D-Out) tPDSO CL=10pf 50 — — ns

High Level Pulse Width Of Clock tCLKH 30 — — ns

Low Level Pulse Width Of Clock tCLKL 30 — — ns

Pulse Width Of Load twLD 150 — — ns

Setup Time (Clock-Load) tCKLD 100 — — ns

Setup Time (Load-Clock) tLDCLK 100 — — ns

Data-In,
Load&Clock,VIN=VDD

—— 1µA

0.7
—— V

VDD

0.3
V

VDD

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588

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TOSHIBA Bi-CMOS Integrated

Circuit Silicon Monolithic

TB62709N/FTB62709N/F

TB62709N/F

TB62709N/FTB62709N/F

Terminal Description:

PIN No. NAME FUNCTION

1V

2 Serial Data IN (SI) Serial Data Input To Shift Register

3 Clock (CK) Clock Input Terminal

4 Load (LD) Load Input Terminal

5-12 OUT a~DP Output Terminal to Cathodes of Seven Segment Display

13 P-GND Power Ground Terminal

14 Test In 2 Test Terminal - Grounded During Normal Operation

15 Test In 1 Test Terminal - Grounded During Normal Operation

6,17,19,2 Digit 0~3 Output Terminal to Anodes of Seven Segment Display

18 V

21 P-GND Power Ground Terminal

22 Rext Constant Current Progra mming Terminal

23 Data Out (DO) Cascade Connection To Next Display Stage

24 L-GND Logi c Ground Terminal

Timing Diagram:

DD

CC

Logic Supply Voltage

Supply Voltage For LEDs

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589

TOSHIBA Bi-CMOS Integrated

Circuit Silicon Monolithic

TB62709N/FTB62709N/F

TB62709N/F

TB62709N/FTB62709N/F

Data Input

Data is input on the SERIAL-IN terminal. Each 16 bit serial word includes an address (D15 ~ D8)
and data (D7 ~ D0). A low to high transition load command on the LOAD terminal loads the data
into the appropriate registers following the 16th clock pulse.

Operation

Serial data is input on the DATA-IN terminal beginning with the most significant bit (MSB). Data
is clocked through the 16 bit shift register on the rising edge of the clock. A Low to High transi­tion on the LOAD input following the 16th (LSB) bit latches the 16 bit word into the 16 bit D-type
latch.

Expansion beyond four digits is possible through the use of a cascade connection from the
DATA-OUT terminal. The data-out lags data-in by one bit through the data-out terminal.

Each 16 bit word typically includes 8 address bits and 8 data bits. The first four data bits,
beginning with D15 (MSB) ~ D12 select the Action mode (see figure 1). These global com­mands determine the overall function the device is to perform and includes Blank, Normal
Operation, Load Register, All On and Stand-by. Data bits D11~D8 select the particular register to
be loaded (see figure 2) should the load register function be selected. Data bits D7~D0 (LSB)
define the specific commands required to program the display and define the brightness setting
(duty cycle).

Figure 1. Action Mode

FUNCTION

Blank
(OUTn & Dig it 0~3 All Off)

Normal Operation 0 0 0 1 — — — 1 - - - H

Load Register
(Duty, Decode, Digit & Data)

All On (OUTn ALL On) 0 0 1 1 — — — 3 - - - H

Stand-By 0 1 0 0 — — — 4 - - - H

REGISTER DATA

D15 D14 D13 D12 D11~D8 D7~D4 D3~D0 Hex Code

0 0 0 0 — — — 0 - - - H ⇐

0 0 1 0 X X X 2 xxx H

INITIAL

STATE

“x” indicates that data is required in this field to execute the function. “-” indicates that data in
this field is not required and not recognized.

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590

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TOSHIBA Bi-CMOS Integrated

Circuit Silicon Monolithic

TB62709N/FTB62709N/F

TB62709N/F

TB62709N/FTB62709N/F

Action Mode

1. Blank - Constant current segment drivers are off resulting in an all segments off condition.

Data D15 ~ D12 are 0. D11~D0 are not relevent in blank mode.

2. Normal (Operation) - Instructs device to display data loaded during previous steps. D11~ D0
are not relevent in the Normal Operation mode.

3. Load Register - Directs the device to recognize and load D11~ D0. In this mode D11 ~ D8
determines the specific register to be loaded (see figure 2) and D7 ~ D0 serves as the actual
data to be loaded for programming the brightness (duty cycle) or the particular digit.

4. All On - All constant current segment drivers are on resulting in an all segments illuminated
condition. D11 ~ D0 are not relevent in this mode.

5. Stand By - All display segments off condition. The Stand-By command turns off all internal
bias currents and serves as a low power consumption mode (<.2mA). Used with Stand-By set
up commands “All Data Clear” or “Data Not Cleared” (table 7).

The initial state, upon power up, is the BLANK state.

Application Note:
Stand-By and Blank perform similar functions in that the display is totally blank when either
command is input. Stand-By provides a low power consumption (<.2ma current draw on VDD)
mode by turning off all internal bias currents in the internal driver circuits. The Stand-By com­mand also cuts off the Rext bias current used to regulate the programmed constant current
within the device.

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591