–PSD = Programmable System Device
–Dual bank Flash Memory … Superior IAP
–Memory Management … Seamless paging and memory placement
–Programmable Logic … Consolidate external logic chips
–JTAG ISP … perfect for lab and manufacturing
•Some µPSDs have Big Memory up to 288K bytes…
When is larger Flash and SRAM needed?
–The use of C language
µ
PSD
µ
PSD
different?
different?
–Elaborate user interfaces … menus, graphics, screens
–Multiple languages and fonts, data tables
–Faster data transfers
–Data recording
•Low Cost
–Save $ compared to other 8051 and 8-bit MCU devices with
www.st.com/micropsd
larger SRAM and Flash Memories
4
Unique
Unique
•Excellent Memory Management
•Flexible Memory Allocation
•Remote Field Updates
•JTAG In System Programming
µ
PSD
µ
PSD
features
features
www.st.com/micropsd
•Programmable Logic
PSD
PSD
Architecture !!!
Architecture !!!
5
Excellent Memory Management
Excellent Memory Management
•Built-in Address Decoding PLD
–Map any µPSD memory sector to any address
–Easily convert existing 8051 designs into µPSD
–Total memory mapping flexibility for new designs
8032
8032
8032
MCU
MCU
MCU
•Memory Paging is Easy using Decode PLD
–Break traditional 8051 64K Byte address limit imposed by only 16 address lines
–8-bit page register is built into Decode PLD … it’s like having 8 more address lines
–Paging (or banking) is directly supported by most 8051 C compilers
FFFF
Page 0
Page 0
Page 1
Page 1
Page 2
Page 2
Address
Page 3
Page 3
Page
Register
DECODE
DECODE
DECODE
PLD
PLD
PLD
Sector
Selects
Sector
Selects
SRAM
SRAM
SRAM
MAIN FLASH
MAIN FLASH
MAIN FLASH
MAIN FLASH
MAIN FLASH
MA I N FLAS H
MAIN FLASH
MAIN FLASH
MAIN FLASH
nd
nd
nd
nd
nd
nd
FLASH
FLASH
FLASH
2
2
2
FLASH
FLASH
FLASH
2
2
2
2ndFLASH
2ndFLASH
2ndFLASH
Page 7
Page 7
1
Sector
8
8
Sectors
Sectors
4
4
Sectors
Sectors
64K
0000
www.st.com/micropsd
32K Main
32K Main
Flash
Flash
32K Main
32K Main
Flash
Flash
Map here: SRAM, 2ndFlash, I/O, etc
32K Main
32K Main
Flash
Flash
32K Main
32K Main
Flash
Flash
Common to All Pages
32K Main
32K Main
Flash
Flash
6
Flexible Memory Allocation
Flexible Memory Allocation
•8051 Architecture uses a separate address space for code and for data
•Allocate dual banks of Flash to meet A pplicat ion De mands
–The Decode PLD controls where Flash memory resides
•You decide how to split the Flash memory
Can use
EEPROM
Emulation
Big Code
(complex
algorithms)
nd
nd
nd
FLASH
2
FLASH
2
FLASH
2
DATA
DATA
DATA
MAIN FLASH
MAIN FLASH
MAIN FLASH
CODE
CODE
CODE
-OR -
Big Data
(printers, big
GUI, tables)
nd
nd
nd
FLASH
2
FLASH
2
FLASH
2
CODE
CODE
CODE
MAIN FLASH
MAIN FLASH
MAIN FLASH
DATA
DATA
DATA
-OR -
All Code
(like typical
flash 8051s)
nd
nd
nd
FLASH
2
FLASH
2
FLASH
2
CODE
CODE
CODE
MAIN FLASH
MAIN FLASH
MAIN FLASH
CODE
CODE
CODE
www.st.com/micropsd
7
Remote Field Updates with IAP
Remote Field Updates with IAP
1. Before IAP
READ &
READ &
WRITE
WRITE
8032
8032
8032
8032
MCU
MCU
MCU
MCU
READ
READ
READ
ONLY
ONLY
ONLY
•MCU reading program
from Main Flash
Updated
Updated
Program
Program
nd
nd
nd
nd
2
2
Flash
Flash
2
2
Flash
Flash
DATA
DATA
DATA
DATA
MAIN
MAIN
MAIN
MAIN
FLASH
FLASH
FLASH
FLASH
OLD
OLD
OLD
OLD
CODE
CODE
CODE
CODE
USB, UART,
2
I
C, Modem…
•8051s typically cannot write to “code” space
–Special µPSD register eliminates this limitation
•Typical Flash memory cannot be read and written
at the same time
–Dual Banks of Flash eliminate this limitation
–Read program from one bank while writing to the other bank
2. During IAP
READ &
READ &
READ &
WRITE
WRITE
WRITE
READ
READ
READ
ONLY
ONLY
8032
8032
8032
8032
MCU
MCU
MCU
MCU
ONLY
READ &
READ &
READ &
WRITE
WRITE
WRITE
READ
READ
READ
ONLY
ONLY
ONLY
•Special Register temporarily reclassifies Main Flash as Data
•MCU now reads IAP program
from 2ndFlash while receiving
bytes of new program from
USB, UART, Modem, I2C, etc.
and writes the new program to
Main Flash
nd
nd
nd
nd
Flash
Flash
2
2
Flash
Flash
2
2
CODE
CODE
CODE
CODE
MAIN
MAIN
MAIN
MAIN
FLASH
FLASH
FLASH
FLASH
TREAT
TREAT
TREAT
TREAT
AS DATA
AS DATA
AS DATA
AS DATA
•Special Register classifies
Main Flash as Code again
•MCU now reading new
program from Main Fla sh
3. After IAP
READ &
READ &
WRITE
8032
8032
8032
8032
MCU
MCU
MCU
MCU
WRITE
READ
READ
READ
ONLY
ONLY
ONLY
nd
nd
nd
nd
Flash
Flash
2
2
Flash
Flash
2
2
DATA
DATA
DATA
DATA
MAIN
MAIN
MAIN
MAIN
FLASH
FLASH
FLASH
FLASH
NEW
NEW
NEW
NEW
NEW
NEW
CODE
CODE
CODE
CODE
CODE
CODE
www.st.com/micropsd
8
In--
In
•Program blank device, no interaction of 8032 MCU required
•Entire chip programs in 10-25 seconds
•JTAG serial connection is industry standard
•Speedy lab development and manufacturing
System Programming (ISP)
System Programming (ISP)
µ
PSD
µ
PSD
µ
PSD
µ
PSD
g
n
E
a
h
C
n
No soc kets or
pre-programmed
parts needed
g
n
i
r
e
e
n
i
O
e
g
r
e
d
r
Last minute
www.st.com/micropsd
JIT
changes are
OK
Just-In-Time
Inventory
Management
9
Programmable Logic
Programmable Logic
•Built-in 16 MacroCell PLD for General Purpose Logic
•Similar to standard 22V10 architecture
PAL
•Eliminate small PLDs, PALs, 74XXX series discrete logic
•Easy Point-and-Click PLD configuration with PSDsoft Express
•Build:
–Glue logic
–State-machines
–Shifters
–Counters
–Chip-selects for extern al device s
–Keypad interfaces
•ST is the only large manufacturer that can bring:
- so much memory
- so many perip herals
- and programmable logic
In a cost effective device
•Excellent Flexibility to adapt designs and
grow wi th future product requirements
•Versatile, easy to use Programmable Logic
16 macrocells today, 32 coming in 2003
•1 and 2Mbits Flash today …
4Mbits coming in 2003
www.st.com/micropsd
11
Consolidate Devices
Consolidate Devices
•What common devices can uPSD eliminate from
your circuit board?
Sockets – not needed using J T AG ISP
Glue-logic chips – Use on-chip PLD
EEPROM chip – Emulate EEPROM using the second Flash memory
Supervisor chip – Low Vcc Detect and Watchdog included!
•Windows PC USB progra m to
demonstrate USB capabilities
including IAP (program flash).
•Visual C++ source code for
Windows USB program is
included.
•App note/Users guide and uPSD
data sheets
www.st.com/micropsd
16
Nohau
Nohau
•In-Circuit Emulator
–Hardware Em ula t ion, repl aces uP S D chi p
–Full Speed Operation , 5V and 3.3V
–Supports Memory Paging and uPSD architecture
–Connects directly to DK3000 with no TQFP adapter
–Hardware Breakpoints
–256K Deep Trace
–Filtered Triggers
–Timestamps
–Mixed Source Support
•C and Assembly
–Performance Analysis
–USB, Parallel, or ISA
In--
In
Circuit Emulator
Circuit Emulator
interface to PC
www.st.com/micropsd
17
Manley In--
Manley In
•In-Circuit Emulator
–Hardware Em ula t ion, repl aces uP S D chi p
–Full Speed Operation , 5V and 3.3V
–Supports Memory Paging and uPSD architecture
–ICE operates from it’s own SRAM (up to 288K Bytes) or
directly from uPSD Flash Memory.
–Breakpoints from hardware compare or external signal
–128K trace events (optional)
–PC Parallel support port today, USB in Q303
–Includes proprietary 8051 A51 assembler and L51 linker.
–Supports source code debugging for 3
Assembler
Circuit Emulator
Circuit Emulator
rd
party C and
–Low cost … US$250.00
–See www.manley.com.cn and www.st.com/micropsd for
more detail s
www.st.com/micropsd
18
Programming Support
Programming Support
•FlashLINK JTAG ISP Programming Cable, ST
–Plugs into an PC/Notebook Parallel Port
–Driven by PSDsoft Express
–Programs entire part in 10-25 seconds
–Included in DK3200 Kits, or sold US$59 individually
–Inexpensive solution for lab or manufacturing
–Gang many EMP-21 programmers together on USB hub
–1 for US$680, 4 for $2200, 8 for $4000, adapters included
–Low cost EMP-11 for $425 for PC parallel port (no gang)
•Single-Site In serti on Programmers, BP Micro and HiLo/Tr ibal
www.st.com/micropsd
–Industry Standard Insertion Programmers
–Tribal ALL-11P2 is US$1195 + adapter (~$300)
–All BP Microsystems Engineering programmers support uPSD, contact
BP Micro for model and price
•Gang JTAG ISP Programmer, JTAG Technologies
–4-way gang JTAG In-System Programmer for high volume manufacturing
–Supports many buses: ISA, PCI, VXI, PXI, USB and Agilent (HP) ATE
–Contact JTAG Technologies for pricing
HP3070
19
µ
µ
CPU
CPU
CPU
CPU
PSD
PSD
Family Growth
Family Growth
SRAM
SRAM
SRAM
SRAM
• Up to 32K byte SRAM
• Turbo 4-cycle 8032 Core
• 10+ MIPs at 40MHz
• Up from 3 MIPs, 12-cycle core
• Enhanced timer block with six
16-bit capture/compare,
timer/counters, or PWM units
(qty 1) EMP-21 for $680
(qty 4) EMP-21 for $2200
(qty 8) EMP-21 for $4000
Prices include one adaptor for
ALL-11P2 is $1195
80-PIN-QFP is $300
52-PIN-QFP is $260
Contact BP Micro for
$149
or
$59
each unit.
pricing.
* 8051 C language compilers or 8051 assembly compilers from any tool vender will work as long the tool complies to standard 8051 architecture. However, tools from Keil support the uPSD 3200
family directly, and all example uPSD firmware supplied by ST will compile directly with Keil tools with no modifications required.
Contact
www.st.com/micropsd
www.keil.com
www.st.com/micropsd
www.needhams.com
www.tribalmicro.com
www.bpmicro.com
www.st.com/micropsd
28
PSD Features
µµPSD
Summary
Summary
PSD Benefits
µµPSD
Large Integrated SRAM and Flash Memories
Programmable Memory Management
Dual Bank Flash Memories
General Purpose Programmable Logic
Broad Peripheral Set
Large Firmware Library and Excellent Tools
Low Cost Relative to other Flash 8051/8bit MCU
Rich
µµµµPSD Roadmap
Single Secure Device Fulfills Memory Requirements
Flexibility for New Designs, Easily Convert 8051 Designs
Robust and Flexib le IAP, Enables EEPROM Emulation
Eliminate External Logic Devices
Accommodates Wide Variety of Applications
Get Designs to Market Very Quickly, Even if New to 8051
Cost Reduce Your Product in Very Short Time
Extend the life of your 8051 Investment for Years to Come
www.st.com/micropsd
29
µ
µ
PSD
PSD
www.st.com/micropsd
Thank You.
Thank You.
Visit Us Soon
Visit Us Soon
www.st.com/micropsd
…
…
30
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