M A COM MRF166W Datasheet
SEMICONDUCTOR TECHNICAL DATA
The RF MOSFET Line
Power Field Effect Transistor
N–Channel Enhancement–Mode MOSFET
Designed primarily for wideband large–signal output and driver stages to
30 – 500 MHz.
• Push–Pull Configuration Reduces Even Numbered Harmonics
• Guaranteed Performance at 500 MHz, 28 Vdc
Output Power = 40 Watts
Gain = 14 dB
Efficiency = 50%
• Typical Performance at 175 MHz, 28 Vdc
Output Power = 40 Watts
Gain = 17 dB
Efficiency = 60%
• Excellent Thermal Stability , Ideally Suited for Class A Operation
• Facilitates Manual Gain Control, ALC and Modulation Techniques
• 100% Tested for Load Mismatch at All Phase Angles with 30:1 VSWR
• Low C
— 4.0 pF @ VDS = 28 Volts
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by MRF166W/D
MRF166W
40 W, 500 MHz
TMOS BROADBAND
RF POWER FET
MAXIMUM RATINGS
Drain–Gate Voltage V
Drain–Gate Voltage (RGS = 1.0 MΩ) V
Gate–Source Voltage V
Drain Current — Continuous I
Total Device Dissipation @ TC = 25°C
Derate above 25°C
Storage Temperature Range T
Operating Junction Temperature T
(TJ = 25°C unless otherwise noted)
Rating
THERMAL CHARACTERISTICS
Thermal Resistance — Junction to Case R
CASE 412–01, Style 1
1
3
5
4
Symbol Value Unit
DSS
DGR
GS
D
P
D
stg
J
θJC
–65 to +150 °C
FLANGE
2
65 Vdc
65 Vdc
± 20 Adc
8.0 ADC
175
1.0
200 °C
1.0 °C/W
Watts
°C/W
NOTE — CAUTION — MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
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ELECTRICAL CHARACTERISTICS (T
Characteristic Symbol Min Typ Max Unit
= 25°C unless otherwise noted)
C
OFF CHARACTERISTICS (1)
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 5.0 mA)
Zero Gate Voltage Drain Current
(VDS = 28 Vdc, VGS = 0 Vdc)
Gate–Source Leakage Current
(VGS = 20 Vdc, VDS = 0 Vdc)
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS= 10 Vdc, ID = 25 mA)
Forward Transconductance
(VDS= 10 Vdc, ID = 1.5 A)
DYNAMIC CHARACTERISTICS (1)
Input Capacitance
(VDS = 28 Vdc, VGS = 0 Vdc, f = 1.0 MHz)
Output Capacitance
(VDS = 28 Vdc, VGS = 0 Vdc, f = 1.0 MHz)
Reverse Transfer Capacitance
(VDS = 28 Vdc, VGS = 0 Vdc, f = 1.0 MHz)
FUNCTIONAL CHARACTERISTICS (2)
Common Source Power Gain
(VDD = 28 Vdc, P
Drain Efficiency
(VDD = 28 Vdc, P
Electrical Ruggedness
(VDD = 28 Vdc, P
Load VSWR = 30:1, All phase angles at frequency of test
Series Equivalent Input Impedance
(VDD = 28 Vdc, P
Series Equivalent Output Impedance
(VDD = 28 Vdc, P
(1) Each transistor chip measured separately.
(2) Both transistor chips operating in a push–pull amplifier.
= 40 W, f = 500 MHz, IDQ = 100 mA)
out
= 40 W, f = 500 MHz, IDQ = 100 mA)
out
= 40 W, f = 500 MHz, IDQ = 100 mA)
out
= 40 W, f = 500 MHz, IDQ = 100 mA)
out
= 40 W, f = 500 MHz, IDQ = 100 mA)
out
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
g
fs
C
iss
C
oss
C
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G
ps
η
Ψ
Z
in
Z
out
65 — —
Vdc
mA
— — 0.5
µA
— — 1.0
Vdc
1.5 3.0 4.5
mS
0.9 1.1 —
pF
— 28 —
pF
— 30 —
pF
— 4.0 —
dB
14 16 —
%
50 55 —
No Degradation in Output Power
Ohms
— 2.88 –j7.96 —
Ohms
— 6.12 –j9.43 —
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2
BIAS SUPPLY
R1
C11
R2
C12 C14
C13
+
–
VDD = 28 Vdc
RF INPUT
B1
C2
C1
C3
C9
C4
C3
R3
R4
L1
D.U.T.
L2
Inputs Line
70 mils x 2460 mils
C4
490 mils
C5
C6
C10
C5
680 mils
C7
C8
Output Lines
70 mils x 2380 mils
B2
RF OUTPUT
C6
C1, C2, C7, C8 220 pF, 100 mil Chip Capacitor, ATC
C3, C6 0 – 10 pF, Johanson
C4 27 pF, 100 mil Chip Capacitor, ATC
C5 22 pF, 100 mil Chip Capacitor, ATC
C9, C10, C1 1, C12 0.01 µF Blue Capacitor
C13 470 pF, 100 mil Chip Capacitor, ATC
C14 50 mF, 50 V Electrolytic Capacitor
L1, L2 8 Turns #20 A WG, 0.100 mils ID
B1, B2 6″ long, ID = 550 mils, 50 W Semi–Rigid Coax
R1 1.0 kW 1/2 Watt
R2 10 kW 1/2 Watt
R3, R4 45 W 1/2 Watt
Board Material – Teflon
Dielectric Thickness = 0.30″,
Fiberglass
εr = 2.55 Copper Clad, 2.0 oz. Copper
Figure 1. MRF166W 500 MHz T est Circuit Schematic
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