M A COM MRF158 Datasheet

SEMICONDUCTOR TECHNICAL DATA

The RF TMOS Line

Power Field Effect Transistor

N–Channel Enhancement Mode

Designed for wideband large–signal amplifier and oscillator applications to

500 MHz.

• Guaranteed 28 Volt, 500 MHz Performance

Output Power = 2.0 Watts
Minimum Gain = 16 dB (Min)
Efficiency = 55% (Typ)

• Facilitates Manual Gain Control, ALC and Modulation

Techniques

• 100% Tested for Load Mismatch at All Phase Angles with

30:1 VSWR

• Excellent Thermal Stability, Ideally Suited for Class A

Operation

Order this document

by MRF158/D

MRF158

To 500 MHz, 2 W, 28 V

TMOS

BROADBAND

RF POWER FET

G

MAXIMUM RATINGS

Rating Symbol Value Unit

Drain–Source Voltage V

Drain–Gate Voltage (RGS = 1.0 MΩ) V

Gate–Source Voltage V

Drain Current — Continuous I

Total Device Dissipation @ TC = 25°C

Derate above 25°C

Storage Temperature Range T

Operating Junction Temperature T

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Thermal Resistance, Junction to Case R

D

DGR

DSS

GS

D

P

D

stg

J

θJC

CASE 305A–01, STYLE 2

S

65 Vdc

65 Vdc

±20 Vdc

0.5 Adc

8.0
45

– 65 to +150 °C

200 °C

13.2 °C/W

Watts

mW/°C

NOTE — CAUTION — MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.

REV 9

1

ELECTRICAL CHARACTERISTICS (T

Characteristic

= 25°C unless otherwise noted.)

C

OFF CHARACTERISTICS

Drain–Source Breakdown Voltage (VGS = 0, ID = 1.0 mA) V

Zero Gate Voltage Drain Current (VDS = 28 V, VGS = 0) I

Gate–Source Leakage Current (VGS = 20 V, VDS = 0) I

ON CHARACTERISTICS

Gate Threshold Voltage (ID = 10 mA, VDS = 10 V) V

Forward Transconductance (VDS = 10 V, ID = 100 mA) g

DYNAMIC CHARACTERISTICS

Input Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) C

Output Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) C

Reverse Transfer Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) C

FUNCTIONAL CHARACTERISTICS (Figure 1)

Common Source Power Gain

(VDD = 28 Vdc, P

Drain Efficiency (Figure 1)

(VDD = 28 Vdc, P

Electrical Ruggedness (Figure 1)

(VDD = 28 Vdc, P
VSWR 30:1 at all Phase Angles)

Series Equivalent Input Impedance

(VDD = 28 V, P

Series Equivalent Output Impedance

(VDD = 28 V, P

= 2.0 W, f = 500 MHz, IDQ = 25 mA)

out

= 2.0 W, f = 500 MHz, IDQ = 25 mA)

out

= 2.0 W, f = 500 MHz, IDQ = 25 mA,

out

= 2.0 W, f = 500 MHz, IDQ = 25 mA)

out

= 2.0 W, f = 500 MHz, IDQ = 25 mA)

out

Symbol Min Typ Max Unit

(BR)DSS

DSS

GSS

GS(th)

fs

iss

oss

rss

G

ps

η 50 55 — %

ψ

Z

in

Z

out

65 — — Vdc

— — 0.5 mAdc

— — 1.0 µAdc

2.0 4.0 5.0 Vdc

80 110 — mmhos

— 3.0 — pF

— 4.0 — pF

— 0.45 — pF

16 18 — dB

No Degradation in Output Power

— 5.9 – j19.4 — Ohms

— 14.5 – j29 — Ohms

REV 9

2

RF Input

R3

C1

R2

C2

C12

C3

C7

R1

C8

RFC2

DUT

C9

C13

RFC1

C4

C5

C6

C10

VDD 28 V

+

C11

–

RF Output

+

V

DC

C1, C6, C12 270 pF, Chip Capacitors
C2, C5 1– 10 pF, Johanson Trimmer Capacitors
C3 30 pF, 100 mil ATC Chip Capacitor
C4 3.9 pF, 100 mil ATC Chip Capacitor
C7, C8 0.1 mF, Blue Capacitors
C9, C10 680 pF, Feed Through Capacitors
C11 50 mF, 50 V Electrolytic Capacitor
C13 240 pF, 100 mil ATC Chip Capacitor

C2

110 mils

from Outside Corner

Input Line

160 mils X 5315 mils

C3

130 mils

from Outside Corner

Figure 1. MRF158 500 MHz Test Circuit

R1 150 Ω, 1/2 Watt
R2 10 kΩ, 1/2 Watt
R3 1 kΩ, 1/2 Watt
RFC1 Ferroxcube VK200–19/4B
RFC2 8 Turns, #20 AWG, Enameled, ID 110 mils

Board Material — 0.062″, Teflon Fiberglass, 1 oz.,
Copper clad both sides, εr = 2.55

C4

280 mils

from Inside Corner

Output Line

160 mils X 4345 mils

C5

At Inside End

of C6

NOTE: Due to variation in Chip Capacitor values and
board material, these are approximate positions.

REV 9

3

Figure 2. MRF158 Broadband Test Fixture

REV 9

4

TYPICAL CHARACTERISTICS

10

C

5

2

1

0.5

C, CAPACITANCE (pF)

0.2

0.1

VGS = 0 V

f = 1 MHz

01020515

V

DRAIN–SOURCE VOLT AGE (VOL TS)

DS,

oss

C

iss

C

rss

25

1

0.1

D

I , DRAIN CURRENT (AMPS)

0.01
110

VDS, DRAIN–SOURCE VOLTAGE (VOLTS)

Figure 3. Capacitance versus Drain–Source Voltage Figure 4. DC Safe Operating Area

100

2.8

2.4

2.0

1.6

1.2

0.8

out

P , OUTPUT POWER (WATTS)

0.4

55 mW

0

1612 20 24

1814 22 26

VDS, DRAIN–SOURCE VOLTAGE (VOLTS)

out

P , OUTPUT POWER (WATTS)

2.6

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

f = 500 MHz
VDS = 28 V
IDQ = 25 mA

0

Pin, INPUT POWER (mW)

5020 70 90

400608010 30

100

Pin = 80 mW

30 mW

f = 500 MHz

IDQ = 25 mA

28

Figure 5. Output Power versus Input Power Figure 6. Output Power versus Voltage

REV 9

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