MACOM AM52-0001, AM52-0001TR, AM52-0001SMB Datasheet

1.2 W High Efficiency Power Amplifier

Preliminary Release

800 - 960 MHz

Features

• SOIC-8 Thermally Efficient Plastic Package

• +30.8 dBm Typical Power Out

• Greater than 50% Typical Power Added Efficiency

• 21 dB typical Power Gain

• Flexible External Output Matching

Description

M/A-COM’s AM52-0001 is a GaAs power amplifier in a thermally
efficient low cost SOIC-8 plastic package. The AM52-0001 is
designed for high efficiency 1.2 W output power and 21 dB of
associated gain in the 800-960 MHz frequency band. The
AM52-0001 is unconditionally stable in both small and large signal
operation. It features flexible biasing for improved dynamic range
and off-chip matching for improved efficiency and flexibility.

The AM52-0001 is specifically designed for high efficiency final
output power amplification in FM, GFSK and FSK type systems,
such as AMPS, ETACS, NTACS, CT1, CDPD and ISM.

M/A-COM's AM52-0001 is fabricated using a mature 0.5 micron
gate length GaAs MESFET power process. The process features
full passivation for increased performance and reliability. The
AM52-0001 can be used with standard automated SMT assembly
equipment (See M/A-COM application note M558).

AM52-0001

SOIC-8P

.2284/.2440

(5.80/6.20)

MM

.010(.25) B

.1497/.1574
(3.80/4.00)

-B-

.1890/.1968
(4.80/5.00)

-A-

.0532/.0688

(1.35/1.75)

.004 (.10)

.050 (1.27)

.013/.020 (8 PL)

(.33/.51)

Ordering Information

Part Number Package

AM52-0001 SOIC-8 Lead Plastic
AM52-0001TR Forward Tape and Reel *
AM52-0001SMB Designer’s Kit

* If specific reel size is required, consult factory for part number
assignment.

CHAMF ER

-C-

MSMBAC.010 (.25)

V1.00

Electrical Specifications: V

= VD2 = 4.8V ±± 5%, TA = +25°°C, Freq. = 824-849 MHz, VGG = VG2 = VG1 adjusted for 150 mA quiescent

D1

drain Current.

Parameter Test Conditions Units Min. Typ. Max.

Linear Gain Pin ≤ -20 dBm dB 29
Output Power Pin = 10 dBm dBm 30.8
Power Gain dB 21
Power Added Efficiency % 55
Second Harmonic dBc -30
Third Harmonic dBc -50
Noise Power
Stability
Load Mismatch

1

2

3

dBm -92
VSWR 10:1
VSWR 10:1

Gate Current mA 5
Adjustable Power Control (APC) VD1 = 0 → 4.8V VD2 = 4.8 V dB 27

1. Noise power (30 KHz RBW), 45 MHz above TX Freq range, measured under rated output power conditions.

2. Parasitic Oscillation defined as any spurious output less than 60 dBc with respect to desired signal level. Measured with nominal Pin and an output
VSWR of 10:1 any phase, V

3. No permanent degradation with nominal Pin and an output VSWR of 10:1 at any phase (360° rotation in 10 sec.) with V

Specifications Subject to Change Without Notice.

= 4.8 V.

DD

up to 6V. .

DD

M/A-COM Inc. 1

North America: Tel. [phone] ♦ Asia/Pacific: Tel. [phone] ♦ Europe: Tel. [phone]
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1.2 W High Efficiency Power Amplifier AM52-0001

C11

C9

V1.00

VD2

RF OUT

VG2

Absolute Maximum Ratings

1

Parameter Absolute Maximum

Input Power
Operating Voltage

2

2

+23 dBm
VDD = + 10 Volts
VGG = - 6 Volts

Junction Temperature

3

+150 °C
Storage Temperature -65 °C to +150 °C
Operating Temperature -40 °C to +85 °C

1. Exceeding any one or combination of these limits may cause
permanent damage.

2. Ambient Temperature (T

3. See temperature derating curve.

) = + 25°C

A

Functional Block Diagram

(AMPS 824-849 MHz)

C10

C6

C1

C3

1

2

3

4

9

C7

VG1

RF IN

VD1

C2

T1

8

7

T2

6

C8

5

C4 C5

External Circuitry Parts List

Pin Configuration

Pin No. Pin Name Description

1VG1Negative supply voltage, First stage
2 RF IN RF Input of the amplifier
3 GND DC and RF Ground
4VD1Positive supply voltage, First stage
5VG2Negative supply voltage, First stage
6 GND DC and RF Ground
7 RF OUT RF Output of the amplifier
8VD2Positive supply voltage, Second stage

9 Puck DC and RF Ground

(AMPS 824-849 MHz)

Part Value Purpose

C1 - C3 220 pF By-Pass
C4 - C7 0.1 uF By-Pass

C8 8 pF Power Tuning

C9, C10 56 pF DC Block

C11 1.0 uF By-Pass

T1 0.470” Matching Transmission
T2 0.250”

1.) The recommended layout is specifically for the AMPS application. It
shows EIA code size 0603 standard SMT capacitors with the exception of
C11 which is a EIA code size 3528

2.) The location of C9, C10 and C11 is not critical to the performance of
the amplifier.

Lines (50 Ω)

Recommended PCB Configuration

Layout View (AMPS 824-849 MHz)

Cross Section View

RF Traces + Components

C7

C11

C2

RF Ground
DC Routing
Customer Defined

C3

0.47" (T1)

The PCB dielectric between RF traces and RF ground layers should
be chosen to reduce RF discontinuities between 50 Ω lines and

C10

C6

0.25" (T2)

package pins. M/A-COM recommends an FR-4 dielectric thickness
of 0.008”(0.2 mm) yielding a 50 Ω line width of 0.015”(0.38 mm).
The recommended metalization thickness is 1 oz. copper and ground
metalization thickness is 2 oz.. Shaded traces are vias to DC
Routing layer and traces on DC Routing layer.

C1

C4

C8

Biasing Procedure

The AM52-0001 requires that VGG bias be applied prior to ANY
V

bias. Permanent damage will occur if this procedure is not

DD

followed. All FETs in the PA will draw IDSS and damage internal
circuitry. Resistance added in seiries with V

and V

g1

may degrade

g2

C5

C9

performance.

Specifications Subject to Change Without Notice.

2 M/A-COM Inc.

North America: Tel. [phone] ♦ Asia/Pacific: Tel. [phone] ♦ Europe: Tel. [phone]
Fax [phone] Fax [phone] Fax [phone]