LSI LS7338, LS7338-S Datasheet

DELAYED-OFF LIGHT SWITCH

WITH PROGRAMMABLE ON-TIMER

FEATURES:

• Phase-Lock Loop Synchronization allows use in
Wall Switch Applications.

• Operation automatically sequences from Timed-On to
Delayed-Off to Off.

• On-Timer programmable with external R-C.

• Transition from Timed-On to Delayed Off indicated by
31% drop in Delivered Power.

• Delayed-Off period denoted by Dim-to-Off operation.
(See Note 1)

• Control input initiates Operating Sequence and can override

Automatic Sequencing.

• 50/60Hz Line Frequency.

• +12V to +18V Operation (VSS - VDD).

• LS7338 (DIP); LS7338-S (SOIC) - See Figure 1

NOTE 1: Dim-to-Off time is Mask Programmable. The standard
IC is fixed at 209 seconds for 60Hz. Dim-to-Off time can be pro­grammed within a range of 6.5 to 836 seconds.

APPLICATIONS:

• WALL SWITCH for incandescent lighting in garage, corridor,

staircase, child’s bedroom, teenage study area.

• IN-LINE SWITCH for table lamps.

DESCRIPTION:

The LS7338 is a monolithic MOS integrated circuit designed to turn a
triac On and Off in a Power Switch for Incandescent Lighting. Ac­tivation of SENSE or SLAVE inputs turns the triac On and starts a
timer. The triac remains On for the duration of the Timer which is
controlled by an external R-C connected to the OSCILLATOR input.
When Time-out occurs, the power delivered by the triac is stepped
down by 31% and then slowly reduced to Off over a fixed period of
time.

In a typical application (Figure 5), the output of the LS7338 drives
the gate of a triac in series with the load.

There are three states through which the LS7338 can be stepped.
The states and their corresponding operating mode, phase angles
and delivered power levels are shown in Table 1.

OPERATING DESCRIPTION:

Upon power up, internal power-on-reset starts the LS7338 in
STATE 0. When the SENSE input transitions to logic 0, or the
SLAVE input transitions to logic 1, the IC steps to STATE 1.
When implemented as shown in the application example (Fig­ure 5), this is accomplished by touching the appropriate Sensor
Plate. Subsequent similar transitions at SENSE or SLAVE in­puts cause the LS7338 to step through the sequence:

STATE 0 --> STATE 1 --> STATE 2 --> STATE 0, etc.
STATE 1 and STATE 2 are quasi-stable states. If left in STATE

1, after a time-out period determined by the frequency set at
the OSC input (See I/O Description, Pin 6), the IC automatically
steps to STATE 2. (If the OSC input is deactivated, STATE 1
becomes stable and its OPERATING MODE is denoted as On).
When the IC steps from STATE 1 to STATE 2, the output
phase angle ø changes from 159˚ to 107˚. This corresponds to
a delivered power reduction of 31%, which causes a reduction
of lamp brightness. This brightness change provides the user
with a positive indication that the transition from STATE 1 to
STATE 2 has occurred. The Time-out period for STATE 2 is
fixed at 209 seconds for 60Hz operation. (See Note 1.)

TD1 = STATE 1 Time-out period.
TD2 = STATE 2 Time-out period.

June 2001

LSI/CSI

LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 [phone] FAX [phone]

LS7338

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A3800

7338-062001-1

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2

3

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LSI

8

PIN ASSIGNMENT - TOP VIEW

FIGURE 1

SENSE

SLAVE

VDD(-V)

TRIG

VSS (+V)

SYNC

CAP

OSC

LS7338

TABLE 1

(See Figures 2 and 3) STATE 0 STATE 1 STATE 2
OPERATING MODE OFF Timed-On Delayed -Off
PHASE ANGLE, ø No Output 159˚ 107˚ to 41˚
% LOAD POWER (1) 0 99 68 to 7

During the STATE 2 Time-out, the TRIG phase angle ø (See
Figure 2) is ramped down from 107˚ to 41˚ in decrements of

1.4˚. When ø reaches 41˚, the IC automatically steps to STATE
0, shutting the TRIG and lamp Off.

The slow Dim-to-Off in STATE 2 gives the user a continuing re­minder that Delayed-Off is operating and provides the time and
light with which to leave the area or to recycle the Light Switch.
A new operating sequence from STATE 0 can be started only by
transitions at the SENSE and SLAVE inputs.

(1) The percentage of full power delivered to a resistive load by the
triac switch.

INPUT/OUTPUT DESCRIPTION:
SENSE (Pin 1)

A logic 0 applied to this input for a minimum of three SYNC cy­cles, TS1 (50ms for 60Hz, 60ms for 50Hz), causes the circuit to
step to the next state in the operating sequence.

SLAVE (Pin 2)

Same description as SENSE (Pin 1) except that logic 1 replaces
logic 0. This input is designed to be used with Remote Exten­sions (See Figure 5 and Figure 6.)

VDD (Pin 3)

Supply voltage negative terminal.

TRIG (Pin 4)

TRIG is a negative-going pulse occurring once every half cycle
of the SYNC input. Pulse width is 33µs. Table 1 in the General
Description shows values of the TRIG phase angle for the differ­ent states. (See Figure 2 and Figure 3.)

VSS (Pin 5)

Supply voltage positive terminal.

OSC (Pin 6)

An R-C network connected to this input controls the frequency of
oscillation which determines the Time-out, TD1, in State 1. TD1 is
approximately 255RC. The Oscillator is active only in State 1. Chip
to chip Oscillation Tolerance is ±10% for fixed value of RC. Tie Pin
6 to VSS if a Time-out is not desired. (See Figure 5.)

CAP (Pin 7)

The CAP input is for external component connection for the PLL fil­ter capacitor. (See Figure 5.)

SYNC (Pin 8)

The AC Line Frequency (50/60Hz) is applied to this input. The
Phase-Lock Loop synchronizes all internal timings to the AC signal
at the SYNC input. (See Figure 5.)

7338-112497-2

ABSOLUTE MAXIMUM RATINGS:
PARAMETER SYMBOL VALUE UNIT

DC supply voltage VSS - VDD +20 V
Any input voltage VIN VSS-20 to VSS + .5 V
Operating temperature TA 0 to +85 °C
Storage temperature TSTG -65 to +150 °C

DC ELECTRICAL CHARACTERISTICS:

(TA = 25°C, all voltages referenced to VDD)

PARAMETER SYMBOL MIN TYP MAX UNIT CONDITIONS

Supply Voltage VSS +12 - +18 V ­Supply Current ISS - 1.6 2.2 mA VSS = +15V,

Output off

Input Voltages

SYNC Lo VIRL 0 - VSS-9.5 V -

SYNC Hi VIRH VSS-5.5 - VSS V ­SENSE Lo VIOL 0 - VSS-8 V ­SENSE Hi VIOH VSS-2 - VSS V ­SLAVE Lo VIVL 0 - VSS-8 V ­SLAVE Hi VIVH VSS-2 - VSS V -

Input Current

SYNC, SENSE & IIH - - 110 uA With Series 1.5MΩ
SLAVE Hi Resistor to 115VAC

SYNC, SENSE &
SLAVE Lo IIL - - 100 nA -

TRIG Hi Voltage VOH - VSS - V ­TRIG Lo Voltage VOL - VSS-8 - V VSS = +15V
TRIG Sink Current IOS 25 - - mA VSS = +15V,VOL = VSS -4V

TRANSIENT CHARACTERISTICS (See Fig. 2 and 3)
(All timings are based on Fs = 60Hz, unless otherwise specified.)

PARAMETER SYMBOL MIN TYP MAX UNIT

SYNC Frequency Fs 40 - 70 Hz
SENSE/SLAVE Sense Time Ts1 50 - Infinite ms

TRIG Pulse Width Tw - 33 - µs
STATE 1 Time-out period TD1 - 255RC - s

STATE 2 Time-out period TD2 - 209 - s