LOGIC LSH33JC30 Datasheet

DEVICES INCORPORATED

LSH33

32-bit Barrel Shifter with Registers

LSH33

DEVICES INCORPORATED

32-bit Barrel Shifter with Registers

FEATURES DESCRIPTION

❑❑

❑ 32-bit Input, 32-bit Output Multi-

❑❑

plexed to 16 Lines

❑❑

❑ Full 0-31 Position Barrel Shift

❑❑

Capability

❑❑

❑ Integral Priority Encoder for 32-bit

❑❑

Floating Point Normalization

❑❑

❑ Sign-Magnitude or Two’s Comple-

❑❑

ment Mantissa Representation

❑❑

❑ 32-bit Linear Shifts with Sign or

❑❑

Zero Fill

❑❑

❑ Independent Priority Encoder

❑❑

Outputs for Block Floating Point

❑❑

❑ 68-pin PLCC, J-Lead

❑❑

The LSH33 is a 32-bit high speed
shifter designed for use in floating
point normalization, word pack/
unpack, field extraction, and similar
applications. It has 32 data inputs,
and 16 output lines. Any shift con­figuration of the 32 inputs, including
circular (barrel) shifting, left shifts
with zero fill, and right shifts with
sign extension are possible. In addi­tion, a built-in priority encoder is
provided to aid floating point normal­ization.

Input/Output registers provide
complete pipelined operation. Both
have independent bypass paths for
complete flexibility. When FTI = 1,
the input registers are bypassed.
Likewise, when FTO= 1, the output
registers are bypassed.

LSH33 BLOCK DIAGRAM

I31-I

0

32

32-bit

SHIFT

ARRAY

GG

2:1

16

RIGHT/LEFT

FILL/WRAP

NORM

32:5

PRIORITY

ENCODE

2:1

5

SI/O4-SI/O

SIGN

GG

32

5

2:1

G

5

0

2:1 2:1

BARREL

16

2:1 2:1

SHIFT ARRAY

The 32 inputs, which can be regis­tered, to the LSH33 are applied to a
32-bit shift array. The 32 outputs,
which can also be registered, of this
array are then multiplexed down to
16 lines for presentation at the device
outputs. The array may be configured
such that any contiguous 16-bit field
(including wraparound of the 32
inputs) may be presented to the
output pins under control of the shift
code field (wrap mode). Alterna­tively, the wrap feature may be
disabled, resulting in zero or sign bit
fill, as appropriate (fill mode). The
shift code control assignments and the
resulting input to output mapping for
the wrap mode are shown in Table 1.

Essentially the LSH33 is configured as
a left shift device. That is, a shift code
of 000002 results in no shift of the
input field. A code of 000012 provides
an effective left shift of 1 position, etc.

CLK
ENI

When viewed as a right shift, the shift
code corresponds to the two’s comple­ment of the shift distance, i.e., a shift

FTI

code of 111112 (–110) results in a right
shift of one position, etc.

When not in the wrap mode, the
LSH33 fills bit positions for which
there is no corresponding input bit.
The fill value and the positions filled
depend on the RIGHT/LEFT (R/L)
direction pin. This pin is a don’t care
input when in wrap mode. For left
shifts in fill mode, lower bits are filled

16

CLK
ENO

FTO

with zero as shown in Table 2. For
right shifts, however, the SIGN input
is used as the fill value. Table 3
depicts the bits to be filled as a
function of shift code for the right shift
case. Note that the R/L input changes
only the fill convention, and does not

MS/LS

OE

affect the definition of the shift code.

Y15-Y

0

Special Arithmetic Functions

1

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DEVICES INCORPORATED

LSH33

32-bit Barrel Shifter with Registers

TABLE 1. WRAP MODE SHIFT CODE DEFINITIONS

Shift CodeShift Code

Shift Code

Shift CodeShift Code

00000 I31 I30 I29 • • • I16 I 15 • • • I2 I1 I0
00001 I30 I29 I28 • • • I15 I 14 • • • I1 I0 I31
00010 I29 I28 I27 • • • I14 I 13 • • • I0 I31 I 30
00011 I28 I27 I26 • • • I13 I 12 • • • I31 I 30 I 29

• •••• • •• •• • ••••

• •••• • •• •• • ••••

• •••• • •• •• • ••••

01111 I16 I15 I14 • • • I1 I0• • •I19 I18 I17
10000 I15 I14 I13 • • • I0 I31 • • • I18 I 17 I16
10001 I14 I13 I12 • • • I31 I 30 • • • I17 I16 I15
10010 I13 I12 I11 • • • I30 I 29 • • • I16 I15 I14

• •••• • •• •• • ••••

• •••• • •• •• • ••••

• •••• • •• •• • ••••

11100 I3 I2 I1• • •I20 I 19 • • • I6 I5 I 4
11101 I2 I1 I0• • •I19 I 18 • • • I5 I4 I 3
11110 I1 I0 I31 • • • I18 I 17 • • • I4 I3 I2
11111 I0 I31 I30 • • • I17 I 16 • • • I3 I2 I1

YY

YY

3131

Y

31

3131

YY

YY

3030

30

3030

2929

Y

29

2929

YY

Y

YY

• • •• • •

• • •

• • •• • •

YY

YY

1616

16

1616

1515

Y

15 • • •

1515

YY

Y

YY

YY

YY

22

Y

2

22

YY

YY

11

Y

YY

00

1

Y

0

11

00

YY

In fill mode, as in wrap mode, the shift
code input represents the number of
shift positions directly for left shifts,
but the two’s complement of the shift
code results in the equivalent right
shift. However, for fill mode the R/L
input can be viewed as the most
significant bit of a 6-bit two’s comple­ment shift code, comprised of R/L
concatenated with the SI4–SI0 lines.
Thus, a positive shift code (R/L = 0)
results in a left shift of 0–31 positions,
and a negative code (R/L = 1) a right
shift of up to 32 positions. The LSH33
can thus effectively select any contigu­ous 32-bit field out of a (sign extended
and zero filled) 96-bit "input."

OUTPUT MULTIPLEXER

The shift array outputs can be regis­tered and then applied to a 2:1 multi­plexer controlled by the MS/LS select
line. This multiplexer makes available
at the output pins either the most
significant or least significant 16
outputs of the shift array.

TABLE 2. FILL MODE SHIFT CODE DEFINITIONS — LEFT SHIFT

Shift CodeShift Code

Shift Code

Shift CodeShift Code

00000 I31 I30 I29 • • • I16 I 15 • • • I2 I1 I0
00001 I30 I29 I28 • • • I15 I 14 • • • I1 I0 0
00010 I29 I28 I27 • • • I14 I 13 • • • I0 00
00011 I28 I27 I26 • • • I13 I 12 • • • 000

• •••• • •• •• • ••••

• •••• • •• •• • ••••

• •••• • •• •• • ••••

01111 I16 I15 I14 • • • I1 I0• • •000
10000 I15 I14 I13 • • • I0 0 • • • 000
10001 I14 I13 I12 • • • 00• • • 000
10010 I13 I12 I11 • • • 00• • • 000

• •••• • •• •• • ••••

• •••• • •• •• • ••••

• •••• • •• •• • ••••

11100 I3 I2 I1• • • 00• • • 000
11101 I2 I1 I0• • • 00• • • 000
11110 I1 I0 0 • • • 00• • • 000
11111 I0 00• • • 00• • • 000

YY

YY

3131

Y

31

3131

YY

YY

3030

30

3030

2929

Y

29

2929

YY

Y

YY

• • •• • •

• • •

• • •• • •

YY

YY

1616

16

1616

1515

Y

15 • • •

1515

YY

Y

YY

YY

YY

22

Y

2

22

YY

YY

11

Y

YY

00

1

Y

0

11

00

YY

PRIORITY ENCODER

The 32-bit input bus drives a priority
encoder which is used to determine
the first significant position for
purposes of normalization. The
priority encoder produces a five-bit
code representing the location of the
first non-zero bit in the input word.
Code assignment is such that the
priority encoder output represents the
number of shift positions required to
left align the first non-zero bit of the
input word. Prior to the priority
encoder, the input bits are individu­ally exclusive OR’ed with the SIGN
input. This allows normalization in
floating point systems using two’s
complement mantissa representation.
A negative value in two’s complement
representation will cause the exclusive
OR gates to invert the input data to
the encoder. As a result, the leading
significant digit will always be "1."

Special Arithmetic Functions

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08/16/2000–LDS.33-O

DEVICES INCORPORATED

LSH33

32-bit Barrel Shifter with Registers

TABLE 3. FILL MODE SHIFT CODE DEFINITIONS — RIGHT SHIFT

Shift CodeShift Code

Shift Code

Shift CodeShift Code

00000 S S S • • • SS• • •SSS
00001 S S S • • • SS• • •SSI31
00010 S S S • • • SS• • •SI31 I30
00011 S S S • • • SS• • •I31 I30 I 29

• •••• • •• •• • ••••

• •••• • •• •• • ••••

• •••• • •• •• • ••••

01111 S S S • • • SS• • •I19 I18 I 17
10000 S S S • • • SI31 • • • I18 I17 I16
10001 S S S • • • I31 I 30 • • • I17 I16 I15
10010 S S S • • • I30 I 29 • • • I16 I15 I14

• •••• • •• •• • ••••

• •••• • •• •• • ••••

• •••• • •• •• • ••••

11100 S S S • • • I20 I 19 • • • I6 I5 I4
11101 S S S • • • I19 I 18 • • • I5 I4 I3
11110 S S I31 • • • I18 I 17 • • • I4 I3 I 2
11111 S I31 I30 • • • I17 I 16 • • • I3 I2 I1

YY

YY

3131

Y

31

3131

YY

YY

3030

30

3030

2929

Y

29

2929

YY

Y

YY

• • •• • •

• • •

• • •• • •

YY

YY

1616

16

1616

1515

Y

15 • • •

1515

YY

Y

YY

YY

YY

22

Y

2

22

YY

YY

11

Y

YY

00

1

Y

0

11

00

YY

TABLE 4. PRIORITY ENCODER FUNCTION TABLE

This affects only the encoder inputs;
the shift array always operates on the
raw input data. The priority encoder
function table is shown in Table 4.

NORMALIZE MULTIPLEXER

The NORM input, when asserted,
results in the priority encoder output
driving the internal shift code inputs
directly. When using the NORM
function, the LSH33 should be placed
in fill mode, with the R/L input low.

When NORM is high (not asserted),
the SI/O4–SI/O0 port acts as the shift
code input to the shifter.

APPLICATIONS EXAMPLES

Normalization of mantissas up to 32
bits can be accomplished directly by a
single LSH33. To do this, the NORM
input is asserted, and fill mode and
left shift are selected. The normalized
mantissa is then available at the
device output in two 16-bit segments,
under the control of the output data
multiplexer select, the MS/LS signal.

II

II

3131

I

31

3131

II

II

3030

30

3030

2929

I

29

2929

II

I

II

• • •• • •

• • •

• • •• • •

II

II

1616

1515

I

16

1616

II

• • •• • •

I

15

• • •

1515

• • •• • •

II

II

II

II

22

I

II

11

2

I

1

22

11

II

Shift CodeShift Code

00

I

0

Shift Code

00

II

Shift CodeShift Code

1XX• • • XX• • •X X X 00000
01X• • •XX• • •X X X 00001
001• • •XX• • •X X X 00010

•••• • •• •• • •••• •

•••• • •• •• • •••• •

000• • •1X• • •X X X 01111
000• • •01• • •X X X 10000
000• • •00• • •X X X 10001

•••• • •• •• • •••• •

•••• • •• •• • •••• •

000• • •00• • •0 1 X 11110
000• • •00• • •0 0 1 11111
000• • •00• • •0 0 0 11111

If it is desirable to avoid the necessity
of multiplexing output data in 16-bit
segments, two LSH33 devices can be
used in parallel. Both devices receive
the same input word, with the MS/LS
select line of one wired high, and the
other low. Each device will then
independently determine the shift
distance required for normalization,
and the full 32 bits of output data will
be available simultaneously.

Special Arithmetic Functions

3

08/16/2000–LDS.33-O