DEVICES INCORPORATED
LMA1010/2010
16 x 16-bit Multiplier-Accumulator
LMA1010/2010
DEVICES INCORPORATED
16 x 16-bit Multiplier-Accumulator
FEATURES DESCRIPTION
❑❑
❑ 20 ns Multiply-Accumulate Time
❑❑
❑❑
❑ Replaces Fairchild TMC2210,
❑❑
Cypress CY7C510, IDT 7210L,
and AMD Am29510
❑❑
❑ Two’s Complement or Unsigned
❑❑
Operands
❑❑
❑ Accumulator Performs Preload,
❑❑
Accumulate, and Subtract
❑❑
❑ Three-State Outputs
❑❑
❑❑
❑ 68-pin PLCC, J-Lead
❑❑
The LMA1010 and LMA2010 are
high-speed, low power 16-bit
multiplier-accumulators. The LMA1010
and LMA2010 are functionally identical;
they differ only in packaging. Full military ambient temperature range operation is achieved with advanced CMOS
technology.
The LMA1010 and LMA2010 produce
the 32-bit product of two 16-bit numbers.
The results of a series of multiplications
may be accumulated to form the sum of
products. Accumulation is performed to
35-bit precision with the multiplier product sign extended as appropriate.
Data present at the A and B input registers is latched on the rising edges of
CLK A and CLK B respectively. RND,
LMA1010/2010 BLOCK DIAGRAM
15-0
A
16
CLK A
CLK B
A REGISTER B REGISTER
TC, ACC, and SUB controls are latched
on the rising edge of the logical OR of
CLK A and CLK B. TC specifies the
input as two’s complement
(TC HIGH) or unsigned magnitude
(TC LOW). RND, when HIGH, adds ‘1’
to the most significant bit position of
the least significant half of the product.
Subsequent truncation of the 16 least
significant bits produces a result
correctly rounded to 16-bit precision.
ACC and SUB control accumulator
operation. ACC HIGH results in
addition of the multiplier product and
the accumulator contents, with the result
stored in the accumulator register on the
rising edge of CLK R. ACC and SUB
HIGH results in subtraction of the
accumulator contents from the
multiplier product, with the result stored
B
15-0
R
15-0
16
in the accumulator register. With ACC
LOW and SUB LOW, no accumulation
occurs and the next product is loaded
directly into the accumulator register.
ACC LOW and SUB HIGH is undefined.
RND
TC
ACC
SUB
OEX
OEM
OEL
PREL
CLK R ACCUMULATOR
PRELOAD
CONTROL
LOGIC
REGISTER
3
3
OEX
OEM
OEL
LEX
LEM
LEL
35
LEM LELLEX
3 16 16
OEX
3
R
34-32
R
R + A
R – A
PASS R
16
R
31-16
32
OEM
A
35
REGISTER
1
16
OEL
The LMA1010/2010 output register
(accumulator register) is divided into
three independently controlled sections. The least significant result
(LSR) and most significant result
(MSR) registers are 16 bits in length.
The extended result register (XTR) is
3 bits long. The output signals R15-0
and input signals B15-0 share the same
bidirectional pins.
Each output register has an independent output enable control. In addition
to providing three-state control of the
output buffers, when OEX, OEM, or OEL
are HIGH and PREL is HIGH, data can be
preloaded via the bidirectional output
pins into the respective output registers.
Data present on the output pins is
latched on the rising edge of CLK R. The
interrelation of PREL and the enable
controls is summarized in Table 1.
Multiplier-Accumulators
08/16/2000–LDS.10/2010-P
DEVICES INCORPORATED
LMA1010/2010
16 x 16-bit Multiplier-Accumulator
TABLE 1. PRELOAD TRUTH TABLE
PREL OEX OEM OEL XTR MSR LSR
L L L L OUT OUT OUT
L L L H OUT OUT Z
L L H L OUT Z OUT
L L H H OUT Z Z
L H L L Z OUT OUT
L H L H Z OUT Z
L H H L Z Z OUT
LHHHZZZ
HL L LZZZ
H L L H Z Z PREL
H L H L Z PREL Z
H L H H Z PREL PREL
H H L L PREL Z Z
H H L H PREL Z PREL
H H H L PREL PREL Z
H H H H PREL PREL PREL
PREL= Preload data to appropriate register
OUT = Register available on output pins
Z = High impedance state
FIGURE 1A.INPUT FORMATS
A
IN
Fractional Two’s Complement (TC = 1)
15 14 13 2 1 0
0
–2
(Sign)
15 14 13 2 1 0
15
–2
(Sign)
15 14 13 2 1 0
–12–22–3
2
15 14 13 2 1 0
15214213
2
2–12
2142
–2
–132–142–15
2
Integer Two’s Complement (TC = 1)
13
22212
Unsigned Fractional (TC = 0)
–142–152–16
2
Unsigned Integer (TC = 0)
22212
B
IN
15 14 13 2 1 0
–2
(Sign)
0
2–12
–2
–132–142–15
2
15 14 13 2 1 0
0
15
–2
(Sign)
2142
13
22212
0
15 14 13 2 1 0
–12–22–3
2
–142–152–16
2
15 14 13 2 1 0
0
15214213
2
22212
0
FIGURE 1B.OUTPUT FORMATS
XTR
34 33 32
4
–2
(Sign)
34 33 32
34
–2
(Sign)
34 33 32
22120
2
34 33 32
34233232
2
232
2332
2
32
MSR LSR
Fractional Two’s Complement
31 30 29 18 17 16
1202–1
2
–122–132–14
2
Integer Two’s Complement
31 30 29 18 17 16
31230229
2
2182172
Unsigned Fractional
31 30 29 18 17 16
–12–22–3
2
–142–152–16
2
Unsigned Integer
31 30 29 18 17 16
31230229
2
2182172
15 14 13 2 1 0
–152–162–17
2
–282–292–30
2
15 14 13 2 1 0
16
15214213
2
22212
0
15 14 13 2 1 0
–172–182–19
2
–302–312–32
2
15 14 13 2 1 0
16
15214213
2
22212
0
Multiplier-Accumulators
2
08/16/2000–LDS.10/2010-P
DEVICES INCORPORATED
LMA1010/2010
16 x 16-bit Multiplier-Accumulator
MAXIMUM RATINGS
Storage temperature ........................................................................................................... –65°C to +150°C
Operating ambient temperature........................................................................................... –55°C to +125°C
VCC supply voltage with respect to ground............................................................................ –0.5 V to +7.0V
Input signal with respect to ground ........................................................................................ –3.0 V to +7.0 V
Signal applied to high impedance output ............................................................................... –3.0 V to +7.0 V
Output current into low outputs............................................................................................................. 25 mA
Latchup current ............................................................................................................................... > 400 mA
OPERATING CONDITIONS
Active Operation, Commercial 0°C to +70°C 4.75 V ≤ VCC ≤ 5.25V
Active Operation, Military –55°C to +125°C 4.50 V ≤ VCC ≤ 5.50 V
ELECTRICAL CHARACTERISTICS
Above which useful life may be impaired (Notes 1, 2, 3, 8)
To meet specified electrical and switching characteristics
Mode Temperature Range (Ambient) Supply Voltage
Over Operating Conditions (Note 4)
Symbol Parameter Test Condition Min Typ Max Unit
VOH Output High Voltage VCC = Min., IOH = –2.0 mA 2.4 V
VOL Output Low Voltage VCC = Min., IOL = 8.0 mA 0.5 V
VIH Input High Voltage 2.0 VCC V
VIL Input Low Voltage (Note 3) 0.0 0.8 V
IIX Input Current Ground ≤ VIN ≤ VCC (Note 12) ±20 µA
IOZ Output Leakage Current Ground ≤ VOUT ≤ VCC (Note 12) ±20 µA
ICC1 VCC Current, Dynamic (Notes 5, 6) 12 25 mA
ICC2 VCC Current, Quiescent (Note 7) 1.0 mA
Multiplier-Accumulators
3
08/16/2000–LDS.10/2010-P
DEVICES INCORPORATED
0
0
0
0
0
0
0
0
0
0
0
0
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0
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0
0
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1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
SWITCHING CHARACTERISTICS
LMA1010/2010
16 x 16-bit Multiplier-Accumulator
COMMERCIAL OPERATING RANGE (0°C to +70°C)
Symbol Parameter Min Max Min Max Min Max Min Max Min Max Min Max
tMC Clocked Multiply Time 65 5 5 45 3 5 25 20
tPW Clock Pulse Width 15 1 5 1 5 1 0 10 9
tS Input Register Setup Time 15 15 1 2 12 1 2 10
tH Input Register Hold Time 2 2 2 2 2 2
tSP Preload Setup Time 1 5 15 12 1 2 1 2 10
tHP Preload Hold Time 2 2 2 2 2 2
tD Output Delay 30 2 5 2 5 25 2 0 1 8
tENA Three-State Output Enable Delay (Note 11) 30 30 25 25 20 18
DIS Three-State Output Disable Delay (Note 11) 30 25 25 25 20 18
t
MILITARY OPERATING RANGE (–55°C to +125°C)
Symbol Parameter Min Max Min Max Min Max Min Max Min Max Min Max
tMC Clocked Multiply Time 75 65 55 40 30 2 5
tPW Clock Pulse Width 20 15 15 15 10 1 0
tS Input Register Setup Time 20 15 15 15 12 1 2
tH Input Register Hold Time 2 2 2 2 2 2
tSP Preload Setup Time 20 15 15 15 12 1 2
tHP Preload Hold Time 2 2 2 2 2 2
tD Output Delay 35 30 30 25 20 2 0
tENA Three-State Output Enable Delay (Note 11) 35 30 30 25 20 20
DIS Three-State Output Disable Delay (Note 11) 35 25 25 25 20 20
t
Notes 9, 10 (ns)
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55
*
LMA1010/2010–
45
*
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Notes 9, 10 (ns)
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65
*
LMA1010/2010–
55
*
40
*
30
*
25
*
SWITCHING WAVEFORMS
A
15-0
B
15-0
CLK A
CLK B
CLK R
PREL
OE*
R
34-0
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*DISCONTINUED SPEED GRADE
*includes OEX, OEM, OEL
t
SP
PRELOAD
t
t
S
t
PW
t
HP
H
t
PW
t
MC
t
DIS
4
t
PW
HIGH IMPEDANCE
t
ENA
Multiplier-Accumulators
t
D
OUTPUT
08/16/2000–LDS.10/2010-P
DEVICES INCORPORATED
S1
I
OH
I
OL
V
TH
C
L
DUT
OE
0.2 V
t
DIS
t
ENA
0.2 V
1.5 V 1.5 V
3.5V Vth
1
Z
0
Z
Z
1
Z
0
1.5 V
1.5 V
0V Vth
VOL*
V
OH
*
V
OL
*
V
OH
*
Measured V
OL
with IOH = –10mA and IOL = 10mA
Measured V
OH
with IOH = –10mA and IOL = 10mA
NOTES
LMA1010/2010
16 x 16-bit Multiplier-Accumulator
1. Maximum Ratings indicate stress
specifications only. Functional operation of these products at values beyond
those indicated in the Operating Conditions table is not implied. Exposure to
maximum rating conditions for extended periods may affect reliability.
2. The products described by this specification include internal circuitry designed to protect the chip from damaging substrate injection currents and accumulations of static charge. Nevertheless, conventional precautions should
be observed during storage, handling,
and use of these circuits in order to
avoid exposure to excessive electrical
stress values.
3. This device provides hard clamping of
transient undershoot and overshoot. Input levels below ground or above VCC
will be clamped beginning at –0.6 V and
VCC + 0.6 V. The device can withstand
indefinite operation with inputs in the
range of –0.5 V to +7.0 V. Device operation will not be adversely affected, however, input current levels will be well in
excess of 100 mA.
9. AC specifications are tested with
input transition times less than 3 ns,
output reference levels of 1.5 V (except
tDIS test), and input levels of nominally
0 to 3.0 V. Output loading may be a
resistive divider which provides for
specified IOH and IOL at an output
voltage of VOH min and VOL max
respectively. Alternatively, a diode
bridge with upper and lower current
sources of IOH and IOL respectively,
and a balancing voltage of 1.5 V may be
used. Parasitic capacitance is 30 pF
minimum, and may be distributed.
This device has high-speed outputs capable of large instantaneous current
pulses and fast turn-on/turn-off times.
As a result, care must be exercised in the
testing of this device. The following
measures are recommended:
a. A 0.1 µF ceramic capacitor should be
installed between VCC and Ground
leads as close to the Device Under Test
(DUT) as possible. Similar capacitors
should be installed between device VCC
and the tester common, and device
ground and tester common.
11. For the tENA test, the transition is
measured to the 1.5 V crossing point
with datasheet loads. For the tDIS test,
the transition is measured to the
±200mV level from the measured
steady-state output voltage with
±10mA loads. The balancing voltage, VTH, is set at 3.5 V for Z-to-0
and 0-to-Z tests, and set at 0 V for Zto-1 and 1-to-Z tests.
12. These parameters are only tested at
the high temperature extreme, which is
the worst case for leakage current.
FIGURE A. OUTPUT LOADING CIRCUIT
FIGURE B. THRESHOLD LEVELS
4. Actual test conditions may vary from
those designated but operation is guaranteed as specified.
5. Supply current for a given application can be accurately approximated by:
2
NCV F
where
4
N = total number of device outputs
C = capacitive load per output
V = supply voltage
F = clock frequency
6. Tested with all outputs changing every cycle and no load, at a 5 MHz clock
rate.
7. Tested with all inputs within 0.1 V of
VCC or Ground, no load.
8. These parameters are guaranteed
but not 100% tested.
b. Ground and VCC supply planes
must be brought directly to the DUT
socket or contactor fingers.
c. Input voltages should be adjusted to
compensate for inductive ground and VCC
noise to maintain required DUT input
levels relative to the DUT ground pin.
10. Each parameter is shown as a minimum or maximum value. Input requirements are specified from the point
of view of the external system driving
the chip. Setup time, for example, is
specified as a minimum since the external system must supply at least that
much time to meet the worst-case requirements of all parts. Responses from
the internal circuitry are specified from
the point of view of the device. Output
delay, for example, is specified as a
maximum since worst-case operation of
any device always provides data within
that time.
5
Multiplier-Accumulators
08/16/2000–LDS.10/2010-P
LMA1010/2010
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DEVICES INCORPORATED
LMA1010 — ORDERING INFORMATION
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64-pin
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12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901
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B10, R10
B11, R11
B12, R12
B13, R13
B14, R14
B15, R15
B0, R0
B1, R1
B2, R2
B3, R3
B4, R4
B5, R5
B6, R6
B7, R7
GND
B
8, R8
B9, R9
R16
R17
R18
R19
R20
R21
R22
R23
1
A6
2
A5
3
A4
4
A3
5
A2
6
A1
7
A0
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Sidebraze Hermetic DIP
Speed
(D6)
0°C to +70°C — COMMERCIAL SCREENING
–55°C to +125°C — COMMERCIAL SCREENING
–55°C to +125°C — MIL-STD-883 COMPLIANT
64
A7
63
A8
62
A9
61
A10
60
A11
59
A12
58
A13
57
A14
56
A15
55
OEL
54
RND
53
SUB
52
ACC
51
CLK A
50
CLK B
49
V
CC
48
TC
47
OEX
46
PREL
45
OEM
44
CLK R
43
R
34
42
R33
41
R32
40
R31
39
R30
38
R29
37
R28
36
R27
35
R26
34
R25
33
R24
16 x 16-bit Multiplier-Accumulator
68-pin
1234567 8 9 10 11
A
B
C
D
E
F
G
H
J
K
L
B/R
B/R
B/R
GND
B/R
B/R
B/R
B/R
NC
NC
B/R
0
A
1
A
3
A
5
A
7
A
9
2
1
A
0
B/R
4
B/R
6
B/R
B/R
9
B/R
11
B/R
10
13
B/R
12
15
B/R
14
R
16
R
17
A
2
A
3
5
7
8
R
18
R
19
Through Package
(i.e., Component Side Pinout)
R
20
R
R
21
R
4
Top View
22
23
A
6
A
8
A
10
R
24
R
26
R
28
R
25
R
27
R
29
Discontinued PackageDiscontinued Package
Ceramic Pin Grid Array
(G2)
Multiplier-Accumulators
6
08/16/2000–LDS.10/2010-P
A
13
A
11
NC
A
14
A
12
A
OEL
15
RND
SUB
ACC
CLK A
V
CC
CLK B
OEX
TC
PREL
OEM
R
34
CLK R
R
32
33
R
30
R
31
R
NC
DEVICES INCORPORATED
LMA2010 — ORDERING INFORMATION
68-pin
10
A
15
11
OEL
12
RND
13
SUB
14
ACC
15
CLK A
16
CLK B
17
CC
V
18
V
CC
19
V
CC
20
V
CC
21
TC
22
OEX
23
PREL
24
OEM
25
CLK R
26
34
R
27 32 33 34 35 36 37 386139 40941 42 43
0
, R
A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0B
5867
3
46663 6212
6768 6465
0
Top
View
28 29 30 31
R33R32R31R30R29R28R27R26R25R24R23R22R21R20R19R18R
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
1
, R
1
B
17
B2, R
B3, R
B4, R
B5, R
B6, R
B7, R
GND
GND
8
, R
B
B9, R
B10, R
B11, R
B12, R
B13, R
B14, R
B15, R
R
16
LMA1010/2010
16 x 16-bit Multiplier-Accumulator
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Speed
35 ns
25 ns
Plastic J-Lead Chip Carrier
(J2)
0°C to +70°C — COMMERCIAL SCREENING
LMA2010JC35
LMA2010JC25
–55°C to +125°C — COMMERCIAL SCREENING
–55°C to +125°C — MIL-STD-883 COMPLIANT
Multiplier-Accumulators
7
08/16/2000–LDS.10/2010-P
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