LOGIC L2340QC20 Datasheet
DEVICES INCORPORATED
L2340
Digital Synthesizer
L2340
DEVICES INCORPORATED
FEATURES DESCRIPTION
❑❑
❑ Digital Waveform Synthesis at
❑❑
50 MHz
❑❑
❑ 24-Bit Polar Phase Angle Accuracy
❑❑
❑❑
❑ User-selectable Waveform Synthesis,
❑❑
Frequency Modulation, or Phase
Modulation.
❑❑
❑ Amplitude Input for Amplitude
❑❑
Modulation and Gain Adjustment.
❑❑
❑ Replaces TRW/Raytheon/Fairchild
❑❑
TMC2340A
❑❑
❑ 120-pin PQFP
❑❑
The L2340 is a digital synthesizer that
performs waveform synthesis, modulation, and demodulation.
The L2340 automatically generates
quadrature matched pairs of 16-bit
sine and cosine waves in DACcompatible 16-bit offset binary format
with15-bit amplitude and 32-bit phase
inputs.
Output waveforms can be phase or
frequency modulated. Digital output
frequencies are restricted to the
Nyquist limit.
Functional Description
The L2340 converts Polar (Phase and
Magnitude) data into Rectangular
(Cartesian) coordinates. The user
Digital Synthesizer
selects the numeric format. A valid
transformed result is seen at the
output after 22 clock cycles and will
continue upon every clock cycle
thereafter.
15-bit amplitude and 32-bit phase data
are input into the L2340 to produce an
output of 16-bit rectangular data. The
user may select the data format to
either 16-bit offset binary or 15-bit
unsigned magnitude format. High
accuracy phase increment values with
minimal accumulation error is accomplished by use of a 32-bit phase
accumulator.
The phase accumulator structure
supports frequency or phase modulation and is selected by ENP1-0 and
accumulator controls FM and PM.
L2340 BLOCK DIAGRAM
ENP
ENA
AM
PH
OBIQ
14-0
1-0
31-0
FM
PM
15
32
2
16
OEI
I
15-0
Digital
Synthesizer
OEQ
16
Q
15-0
CLK
Special Arithmetic Functions
1
08/16/2000–LDS.2340-E
DEVICES INCORPORATED
L2340
Digital Synthesizer
L2340 FUNCTIONAL BLOCK DIAGRAM
14-0
OBIQ
OEI
15
15
15
16
16
AM
ENA ENP
32
AM
TRANSFORM
*
PROCESSOR
PH
MC
31-0
Outputs
I15-0 — x-coordinate Data Output
1-0
FM PM
I15-0 is the 16-bit Cartesian x-coordi-
32
2
nate Data output port. When OEI is
HIGH, I15-0 is forced into the highimpedance state. I15 is forced HIGH if
OBIQ is LOW.
Q15-0 — y-coordinate Data Output
32
PM
32
Q15-0 is the 16-bit Cartesian y-coordinate Data output port. When OEQ is
HIGH, Q15-0 is forced into the highimpedance state. Q15 is forced HIGH
if OBIQ is LOW.
FM
24
32
Controls
ENA — Amplitude Modulation Data
Input Enable
24
When ENA is HIGH, AM is latched
into the input register on the rising
16
edge of clock. When ENA is LOW, the
value stored in the register is unchanged.
16
OEQ
ENP1-0 — Phase Modulation Data Input
Control
I
15-0
REQUIRES 18 CYCLES TO COMPLETE AND IS FULLY PIPELINED*
SIGNAL DEFINITIONS
Power
Vcc and GND
+5V power supply. All pins must be
connected.
Clock
CLK — Master Clock
The rising edge of CLK strobes all
enabled registers.
Q
15-0
Inputs
AM14-0 — Amplitude Modulation Data
Input
AM14-0 is the 15-bit Amplitude
Modulation Data input port. AM14-0
is latched on the rising edge of CLK.
PH31-0 — Phase Angle Data Input
PH31-0 is the 32-bit Phase Angle Data
input port. Input phase accumulators
are loaded through this port into
registers enabled by ENP1-0. PH31-0 is
latched on the rising edge of CLK.
ENP1-0 is the 2-bit Phase Modulation
Data Input Control that determines
one of the four modes shown in Table
1. ‘M’ is the Modulation Register and
‘C’ is the Carrier Register as shown in
the Functional Block Diagram.
TABLE 1. REGISTER OPERATION
ENP1-0 Configuration
0 0 No registers enabled, current data held
0 1 M register input enabled, C data held
1 0 C register input enabled, M data held
1 1 M register = 0, C register input enabled
TABLE 2. ACCUMULATOR CONTROL
FM PM Configuration
00No accumulation (normal operation)
01PM accumulator path enabled
10FM accumulator path enabled
11Logical OR of PM and FM (Nonsensical)
Special Arithmetic Functions
2
08/16/2000–LDS.2340-E
DEVICES INCORPORATED
L2340
Digital Synthesizer
FM, PM — Frequency Modulation,
Phase Modulation Control
FM and PM is the 2-bit Frequency
Modulation/Phase Modulation
Control that determines one of the
four modes shown in Table 2. When
full-scale is exceeded, the accumulator
will roll over correctly allowing
continuous phase accumulation
through 2π radians.
FIGURE 1A.INPUT FORMATS
AM PH
14 13 12 2 1 0
2142132
12
OBIQ — Data Input/Output Format
Select
When OBIQ is HIGH, offset binary
format is selected. When OBIQ is
LOW, unsigned format is selected.
OEI — x-coordinate Data Output
Enable
When OEI is LOW, I15-0 is enabled for
data output. When OEI is HIGH, I15-0
is placed in a high-impedance state.
(RTP = 0)
Fract. Unsigned Mag./Two's Comp.Integer Unsigned Magnitude
22212
0
OEQ — y-coordinate Data Output
Enable
When OEQ is LOW, Q15-0 is enabled
for data output. When OEQ is HIGH,
Q15-0 is placed in a high-impedance
state.
31 30 29 2 1 0
*±202–12
–2
–292–302–31
2
*±20 denotes two's complement sign or highest magnitude bit. Since phase angles are modulo 2π
and phase accumulator is modulo 2
FIGURE 1B.OUTPUT FORMATS
IQ
14 13 12 2 1 0
14213212
2
15 14 13 2 1 0
14213
NS 2
NS denotes negative sign. (i.e. '1' negates the number)
32
, this bit may be regarded as ±π
.
Integer Unsigned Magnitude (OBIQ = 0)
14 13 12 2 1 0
22212
0
14213212
2
Offset Binary (OBIQ = 1)
15 14 13 2 1 0
22212
0
NS 2
14213
22212
22212
0
0
Special Arithmetic Functions
3
08/16/2000–LDS.2340-E
DEVICES INCORPORATED
L2340
Digital Synthesizer
Circle Test
When performing a coordinate
transformation, inaccuracies are
introduced by a combination of
quantization and approximation
errors. The accuracy of a coordinate
transformer is dependent on the
word length used for the input
variables, the word length used for
internal calculations, as well as the
number of iterations or steps performed. Truncation errors are due
to the finite word length and approximation errors are due to the
finite number of iterations. For
example, in the case of performing a
polar-to-rectangular transformation,
the accuracy of the rotation will be
determined by how closely the input
rotation angle was approximated by
the summation of sub-rotation
angles.
In this study, we compare how
accurately a coordinate transformer
with a 16-bit internal processor
versus a 24-bit internal processor
can calculate all the coordinates of a
circle. By setting the radius to
7FFFH, θ is incremented using the
accumulator of the L2340 in steps of
0000 4000H until all the points of a
full circle are calculated into rectangular coordinates.
error will introduce noise when
performing waveform sythesis,
modulation, and demodulation.
Data values for Figure 2 and Figure
3 are shown in Table 3. By looking
at these values, we observe the step
resolution on a 16-bit internal
processor is not 1 unit in the x and
y. In most cases, the minimum step
resolution is 2 units in the x and y.
On the other hand, step resolution
on a 24-bit internal processor is 1
unit in the x and y thus resulting in
greater accuracy.
The minimum theoretical angle
resolution that could be produced is
0.00175° when x = 7FFFH and y = 1H.
A 16-bit internal processor can
produce a minimum angle resolution of only 0.00549° and will not be
able to properly calculate the
theoretical minimum angle resolution. On the other hand, a 24-bit
internal processor can produce a
minimum angle resolution of
0.00002° and could therefore properly calculate the theoretical minimum angle resolution.
FIGURE 2. CIRCLE TEST RESULT NEAR 45° (16-BIT INTERNAL PROCES-
SOR)
23200
23190
23180
23170
Y
23160
23150
23140
23140 23150 23160 23170 23180 23190 23200
X
The resulting rectangular coordinates were plotted and graphed. A
graphical representation of the
resulting vectors for both 16-bit and
24-bit internal processors are compared at 45°. Theoretically, a
perfect circle is the desired output
but when the resulting vectors from
a coordinate transformer with 16-bit
internal processor are graphed and
displayed as shown in Figure 2, we
see significant errors due to the
inherent properties of a digital
synthesizer. In comparison, the 24bit internal processor proves to be
significantly more accurate than a
16-bit internal processor due to
minimization of truncation errors.
In many applications, this margin of
FIGURE 3. CIRCLE TEST RESULT NEAR 45° (24-BIT INTERNAL PROCES-
SOR)
23200
23190
23180
23170
Y
23160
23150
23140
23140 23150 23160 23170 23180 23190 23200
X
Special Arithmetic Functions
4
08/16/2000–LDS.2340-E
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